JPS5835965A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5835965A JPS5835965A JP13571981A JP13571981A JPS5835965A JP S5835965 A JPS5835965 A JP S5835965A JP 13571981 A JP13571981 A JP 13571981A JP 13571981 A JP13571981 A JP 13571981A JP S5835965 A JPS5835965 A JP S5835965A
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- resistance
- laser
- poly
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 6
- 238000000034 method Methods 0.000 abstract description 12
- 239000000758 substrate Substances 0.000 abstract description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 3
- 238000005468 ion implantation Methods 0.000 abstract description 2
- 238000005229 chemical vapour deposition Methods 0.000 abstract 1
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- 239000010408 film Substances 0.000 description 16
- 239000010409 thin film Substances 0.000 description 8
- 238000009966 trimming Methods 0.000 description 8
- 239000002184 metal Substances 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 7
- 239000002245 particle Substances 0.000 description 7
- 239000012535 impurity Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000007796 conventional method Methods 0.000 description 4
- 238000002844 melting Methods 0.000 description 4
- 230000008018 melting Effects 0.000 description 4
- 238000000137 annealing Methods 0.000 description 3
- 238000011109 contamination Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000010894 electron beam technology Methods 0.000 description 3
- 230000001678 irradiating effect Effects 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000020169 heat generation Effects 0.000 description 2
- 238000005224 laser annealing Methods 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 239000000523 sample Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- -1 Boron ions Chemical class 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 239000002362 mulch Substances 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000011856 silicon-based particle Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Recrystallisation Techniques (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は半導体装置に関し、特性が優れかつ高精度の多
結晶抵抗体を有した半導体装置を提供するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and provides a semiconductor device having a polycrystalline resistor with excellent characteristics and high precision.
従来より、６ビツトや８ビツトの並列形い変換器等に用
いられる基準抵抗などでは、非常に高精度なものが要求
されている。第１図は従来の薄膜抵抗体を示すものであ
る。同図において、１は基板、２は基板１上に形成され
た絶縁膜であシ、３は薄膜抵抗体である。尚、４は薄膜
抵抗体３の両端電極である。従来の抵抗体においては、
この薄膜抵抗体３の抵抗値を所定値に設定するため、レ
ーザートリミング等が用いられていた。Conventionally, reference resistors used in 6-bit and 8-bit parallel converters have been required to have extremely high precision. FIG. 1 shows a conventional thin film resistor. In the figure, 1 is a substrate, 2 is an insulating film formed on the substrate 1, and 3 is a thin film resistor. Note that 4 represents electrodes at both ends of the thin film resistor 3. In conventional resistors,
In order to set the resistance value of the thin film resistor 3 to a predetermined value, laser trimming or the like has been used.
このトリミング法を第１図の上面図である第２図（＆）
、 （ｂ）を用いて説明する。大きな抵抗値修正を行
う時には、第２図（ＩＬ）のように横断的に切断部分５
と、残った狭い接続部分５′に電流集中が生じ発熱する
恐れが大きいため、第２図（ｂ）に示すようにＬ字型に
切断部分６を形成して、この障害を防ぐように工夫して
いる。また、例えば通常よく用いられている不純物拡散
を行ったポリシリコンを抵抗体として用いた場合のよう
に、トリミング調整直後は所定値になっているが、８６
°Ｃ３００時間の加速テストで明らかにされるように、
５ｏ。This trimming method is shown in Figure 2 (&) which is a top view of Figure 1.
, (b). When making a large resistance value correction, cut the section 5 transversely as shown in Figure 2 (IL).
In this case, there is a great possibility that current concentration will occur in the remaining narrow connection part 5' and heat will be generated. Therefore, as shown in Fig. 2 (b), an L-shaped cut part 6 is formed to prevent this problem. are doing. In addition, for example, when polysilicon with impurity diffusion, which is commonly used, is used as a resistor, the predetermined value is set immediately after trimming adjustment, but 86
As revealed by accelerated testing of 300 hours at °C,
5o.
〜ｓ ｏ ｏ ｏ ｐｐｍの抵抗変化が認められる。こ
のような特性変化は、さらに高精度のム／Ｄ変換器（例
えば１０ビツト）に適用するのは困難である。A resistance change of ˜sooo ppm is observed. Such a characteristic change is difficult to apply to a highly accurate MU/D converter (for example, 10 bits).
又、トリミングして狭くなった部分での電流集中による
過渡的な過大電流に対して弱点となっている。In addition, it is vulnerable to transient excessive current due to current concentration in the narrowed portion after trimming.
本発明は、このような不安定性を改良した多結晶金属抵
抗体を有した半導体装置を提供せんとするものである。The present invention aims to provide a semiconductor device having a polycrystalline metal resistor that improves such instability.
本発明者らは、多結晶金属抵抗体に高エネルギービーム
を照射し、その抵抗変化を検討していたが、現在知られ
ているようなレーザーアニール法などで粒成長させると
抵抗が下がるという現象以外に、抵抗の経時変化が小さ
くなるという新しい現象を見い出した。本発明はこのよ
うな現象にかんがみて、レーザーを多結晶抵抗体に照射
する等によシ多結晶の粒径を部分的に大きくすることに
より、所定値に抵抗を下げると同時に経時変化の少ない
抵抗体を形成せんとするものである。すなわち、本発明
は従来と異なり抵抗を下げることにより、所定抵抗値に
抵抗を設定するものである。The inventors investigated the change in resistance by irradiating a polycrystalline metal resistor with a high-energy beam, but found that the resistance decreases when grains are grown using the currently known laser annealing method. In addition, we discovered a new phenomenon in which the change in resistance over time becomes smaller. In view of this phenomenon, the present invention partially increases the grain size of the polycrystalline resistor by irradiating the polycrystalline resistor with a laser, thereby lowering the resistance to a predetermined value and at the same time reducing the change over time. The purpose is to form a resistor. That is, the present invention sets the resistance to a predetermined resistance value by lowering the resistance, unlike the conventional method.
以下、本発明を図面を用いて説明する。第３図は本発明
の一実施例に係る抵抗体を示すもので、同（”）は断面
図、同（ｂ）は上面図を示す。同図において１１は種々
の回路を形成したたとえば半導体基板で、この基板１１
上に絶縁膜１２を設けである。Hereinafter, the present invention will be explained using the drawings. FIG. 3 shows a resistor according to an embodiment of the present invention, where ('') is a cross-sectional view and (b) is a top view. On the board, this board 11
An insulating film 12 is provided thereon.
１３は薄膜抵抗体であり多結晶金属薄膜を例えば鼻着、
ＣＶＤなどにより形成されて構成される。13 is a thin film resistor, and a polycrystalline metal thin film is used, for example, as a nose cloth.
It is formed and configured by CVD or the like.
１４はム１等により構成された電極配線でめ−る。Reference numeral 14 denotes an electrode wiring made up of the wires 1 and the like.
多結晶金属としては、不純物を含有したシリコン。Silicon containing impurities is a polycrystalline metal.
Ｍｏ、Ｗなどの高融点金属を用いる。尚、抵抗体１３の
抵抗値調整は電極１４に印加する電圧値をモニターしな
がら、抵抗値を調整して行う。抵抗値調整は、レーザー
光や電子線を径１〜１００μｍに絞シ、抵抗体１３の中
央付近にスポット状１５又はストライプ状１６に照射し
、照射部分の抵抗値を低下させることによって行う。こ
れは、従来のレーザートリミングなどの抵抗値を上昇さ
せて値を調整するのとは全く逆である。レーザー光とし
ては使用する金属によって使用に適した波長が異なるが
、概して短波長側が吸収や透過距離を考えれば好ましい
。例えばムｒレーザーやＹＡＧレーザーの倍波長を用い
る。出力としては数Ｗで十分である電子線を用うる場合
においても１０〜１００ｋａマ、１０〜１０ｏｏμムで
十分である。A high melting point metal such as Mo or W is used. Note that the resistance value of the resistor 13 is adjusted by monitoring the voltage value applied to the electrode 14 and adjusting the resistance value. The resistance value adjustment is performed by focusing a laser beam or an electron beam to a diameter of 1 to 100 μm and irradiating the resistor 13 near the center in a spot shape 15 or stripe shape 16 to lower the resistance value of the irradiated portion. This is completely opposite to conventional laser trimming, which adjusts the resistance value by increasing it. The suitable wavelength for laser light differs depending on the metal used, but in general, shorter wavelengths are preferable in terms of absorption and transmission distance. For example, a double wavelength of a MU laser or a YAG laser is used. Even when using an electron beam, for which an output of several watts is sufficient, an output of 10 to 100 ka or 10 to 100 μm is sufficient.
以下、本発明に係る抵抗体の特性等について実施例に基
づき説明する。Hereinafter, the characteristics and the like of the resistor according to the present invention will be explained based on examples.
〔実施例１〕
３″のＳｉウェハー上に絶縁膜１２としてＣＶＤ５ｉＯ
□を０．６μｍ形成し、さらに０．６μｍ厚のＧ Ｖ
Ｄ ｐｏｎｙ Ｓｉ膜を薄膜抵抗体１３として形成した
。このＳｉ膜に制御性のよいイオン注入によりボロンイ
オンを、１ｏ１２，１０１３，１ｏ１４，１０１５／ｃ
１１のドーズ量で導入した。これらを１ｏ００°Ｃ，３
０分Ｎ２中で焼鈍した所、粒径を調べたところ０．０５
〜０．１ ｐｍ （７） ｐｏｎｙ−８ｉからなってお
り、四端子法によるシート抵抗値は、第４図の曲線イに
示す通りであり、ドーズ量に対して、抵抗値の急激な変
化がみられた。[Example 1] CVD5iO was deposited as the insulating film 12 on a 3″ Si wafer.
□ with a thickness of 0.6 μm, and a G V with a thickness of 0.6 μm
A D pony Si film was formed as the thin film resistor 13. Boron ions were implanted into this Si film by ion implantation with good controllability.
A dose of 11 was introduced. These are 1o00°C, 3
After annealing in N2 for 0 minutes, the grain size was found to be 0.05.
~0.1 pm (7) It consists of pony-8i, and the sheet resistance value measured by the four-probe method is as shown in curve A in Figure 4, and there is a rapid change in resistance value with respect to the dose amount. It was seen.
これに対して、上記の如く不純物注入したｐＯｌｙ−８
ｉにＣＷ−ムｒレーザー照射した所、粒径は概略中とし
て１０〜１５μｍ、長さ８０〜１２０μｍと大きくなり
、そのシート抵抗は曲線口に示す通シになり、ドーズ量
に対する抵抗変化が小さく、抵抗値の再現性がよいこと
を示している。なお、レーザー照射条件は、レーザ出力
８Ｗ照射スポツト径約１６μｍ１走査速度１ｏα／ ｓ
ｅｃ 、基板温度３５０’Ｃであった。以上の様に、従
来の抵抗体では、不純物濃度のわずかな変化で抵抗値が
急変するのに対して、本発明によればその変化は小さく
安定することを示している。On the other hand, pOly-8 implanted with impurities as described above
When I was irradiated with CW-mura laser, the particle size became large, approximately 10 to 15 μm, and the length was 80 to 120 μm, and the sheet resistance became the same as shown at the curved line, and the resistance change with respect to the dose was small. , indicating good reproducibility of resistance values. The laser irradiation conditions are: laser output: 8 W; irradiation spot diameter: approximately 16 μm; scanning speed: 1 oα/s
ec, and the substrate temperature was 350'C. As described above, it has been shown that in the conventional resistor, the resistance value changes suddenly due to a slight change in impurity concentration, whereas according to the present invention, the change is small and stable.
〔実施例２〕
３″の石英板（厚み２ｆｆ）上に膜１３として０．４５
μｍ厚（７） ＣＶ Ｄ ｐｏｌｙ−５ｉ膜を形成し、
５×１（）１５／ｄのボロンを注入した。焼鈍法として
、従来の電気炉による方法（１０００’Ｃ，３０分、Ｎ
２中）、レーザーアニール法（レーザー出力４〜８Ｗ、
照射スポット径１６〜６０μｍ、走査速度３〜１ｏＣＩ
Ｒ／就、基板温度２００〜３５０°Ｃの種々の条件）で
行った所、粒径が０．０５〜２００μｍでシート抵抗が
１０３〜１ｏ７Ｑ／口のｐｏｌｙ−８ｉ 抵抗膜を得た
。その結果を第６図に示す。同図より、粒径０．０５〜
０．１μｍの時、シート抵抗１０７Ω７全弱（第６図イ
の部・分）のものが粒径０．３〜０．６μｍに成長する
と、１０６ルも弱（第６図口の部分）のシート抵抗と約
１桁の抵抗減少があることが認められる。[Example 2] 0.45 as the film 13 on a 3″ quartz plate (thickness 2ff)
Form a μm thick (7) CVD poly-5i film,
5×1()15/d of boron was implanted. As an annealing method, a conventional electric furnace method (1000'C, 30 minutes, N
2), laser annealing method (laser output 4-8W,
Irradiation spot diameter 16-60μm, scanning speed 3-1oCI
Poly-8i resistive films having grain sizes of 0.05 to 200 μm and sheet resistances of 10 3 to 10 7 Q/hole were obtained under various conditions including a substrate temperature of 200 to 350°C. The results are shown in FIG. From the same figure, the particle size is 0.05~
When the sheet resistance is 0.1 μm, when the sheet resistance is 107Ω7 total (the part in Figure 6 A), when it grows to a grain size of 0.3 to 0.6 μm, the sheet resistance is just under 106Ω (the opening part in Figure 6). It is observed that there is a decrease in sheet resistance of approximately one order of magnitude.
〔実施例３〕
実施例１で得たｐｏｎｙ Ｓｉ粒径が０．１μｍ以下の
各種の試料を用い中１３０μｍ１長さく電極間）６００
μｍのｐｏｌｙ−８ｉ低抵抗を形成し、電極にムｌ配線
をし、４ｏＯ°Ｃでモニターした後所定値にトリミング
し、８６°Ｃの寿命テスト機に入れ、３ｏＯ時間にわた
る抵抗値変化を調べた。その結果を、第６図に示す。同
図において、曲線イは従来法による結果、曲線口は本発
明による方法による結果を示す。尚、従来のトリミング
法として、ノ（シスＹＡＧレーザーを約１μｍのスポッ
ト径に絞り、第２図（ｂ）に示すように切断したものと
した。本発明にかかるトリミング法としては、第３図１
６に示すように、ＣＷ−ｋｒｖ−ザー６Ｗを約１０μｍ
に絞り、基板温度３００°Ｃで、１０ｍ／！１ｉｅＣに
走査する条件でスクライブ状に照射した。この照射によ
り粒径は約２０μｍに成長していた。[Example 3] Various samples with pony Si particles obtained in Example 1 having a particle size of 0.1 μm or less were used to prepare samples with a length of 130 μm (between electrodes) of 600 μm.
Form a poly-8i low resistance of μm, wire the electrode with mulch, monitor it at 4oO°C, trim it to a specified value, put it in a life tester at 86°C, and examine the resistance change over 3oO hours. Ta. The results are shown in FIG. In the figure, curve A shows the results obtained by the conventional method, and curve A shows the results obtained by the method according to the present invention. In addition, as a conventional trimming method, a cis YAG laser was focused to a spot diameter of about 1 μm and cut as shown in FIG. 2(b).As a trimming method according to the present invention, 1
As shown in Figure 6, the CW-krv-zer 6W is approximately 10 μm thick.
At a substrate temperature of 300°C, 10m/! It was irradiated in a scribe shape under scanning conditions of 1ieC. As a result of this irradiation, the particle size had grown to about 20 μm.
本実施例に示した様に、本発明に係るものでは基板を８
６°Ｃに保持し３００時間経過した後においても、抵抗
変化は約１０ｐｐｍにすぎないのに対し、従来では１０
ｏＯｐｐＨ１にも達していることがわかる。これは、従
来法によるものでは、融断という苛酷な加工を施してい
るためと推定される。As shown in this embodiment, the substrate according to the present invention is
Even after being kept at 6°C for 300 hours, the resistance change was only about 10 ppm, compared to the conventional
It can be seen that oOppH1 has also been reached. This is presumed to be due to the harsh process of fusing and cutting in the conventional method.
本発明においては、抵抗値調整直後拡散等を生じない６
００〜８５０’Ｃの温度で焼鈍すればさらに安定化する
。In the present invention, diffusion etc. do not occur immediately after resistance value adjustment6.
It is further stabilized by annealing at a temperature of 00 to 850'C.
さらに、本発明の例では、抵抗値を下げるために電流集
中によって発熱の生ずる恐ｎは全くないのに対し、従来
の例では、高抵抗部の部−分で発熱する恐扛があり、使
用にあたっては十分の注意が必要である。又、従来では
融断するため、溶融した破片や溶融している最中、その
前後の汚染が大きな問題となっており（これも不安定性
の一因になっていると推定されてる）、また従来では溶
断するために表面上に保護膜を形成しても幾分の改良し
か得られない。これに対し、本発明にかかる方法ては、
例えば５ｉ０２やＳｉ３Ｎ４のような保護膜を表面に覆
った状態でできるため、全く汚染の恐れがなく、特性の
向上に寄与している。Furthermore, in the example of the present invention, there is no risk of heat generation due to current concentration in order to lower the resistance value, whereas in the conventional example, there is a risk of heat generation in high resistance parts, making it difficult to use. Sufficient care must be taken when doing so. In addition, since the conventional method involves melting and cutting, contamination caused by melted debris and before and after melting is a major problem (this is also estimated to be a cause of instability), and Conventionally, even if a protective film is formed on the surface for fusing, only some improvement can be obtained. In contrast, the method according to the present invention
For example, since the surface is covered with a protective film such as 5i02 or Si3N4, there is no risk of contamination, contributing to improved characteristics.
〔実施例４〕
実施例１で得た不純物を注入したｐｏＩ１７−８ｉ膜上
に、さらにＣＶＤ−３ｉＯ２を０．２μｖｎ形成し、実
施例１と同様の処理を行った所、実施例１とほぼ同じ結
果を得た。このＣＶＤ−８ｉＯ□膜は、レーザー照射の
前後における汚染を防ぐ上から有用である。[Example 4] On the poI17-8i film into which the impurities obtained in Example 1 were implanted, 0.2 μvn of CVD-3iO2 was further formed and the same treatment as in Example 1 was performed. Got the same result. This CVD-8iO□ film is useful for preventing contamination before and after laser irradiation.
又、５ｉ０２の代りに５１３Ｎ４形成しても同じ効果が
認められた。Furthermore, the same effect was observed when 513N4 was formed instead of 5i02.
〔実施例６〕
実施例１で得た不純物を注入したｐｏｌｙ−８ｉに５０
ｋｅｙ１００μムの電子ビームを照射した。ビーム径は
３μｍで試料移動速度は２〜憧であった。[Example 6] Poly-8i injected with the impurity obtained in Example 1 was
An electron beam with a key of 100 μm was irradiated. The beam diameter was 3 μm, and the sample movement speed was 2 to 100 m.
粒径は約６μｍに成長し、レーザー照射と類似の効果を
示した。The particle size grew to about 6 μm, showing an effect similar to that of laser irradiation.
〔実施例６〕
実施例１におけるｐｏｌｙ−８ｉ膜形成と同様にＭＯ膜
を絶縁膜上に０．４μｍ蒸着した。１０００’０３０分
Ａｒ中で焼鈍した所、 シート抵抗は、１ｏル名に低下
していた。粒径は約０．０５μｍであった。[Example 6] Similar to the poly-8i film formation in Example 1, an MO film was deposited to a thickness of 0.4 μm on the insulating film. When annealed in Ar for 1000'030 minutes, the sheet resistance was reduced to 1000 mol. The particle size was approximately 0.05 μm.
これを、実施例２で示すような各種の条件でレーザー照
射を施した所、粒径は０．３〜２μｍと成長し、抵抗Ａ
〜１４に低下した。When this was irradiated with laser under various conditions as shown in Example 2, the grain size grew to 0.3 to 2 μm and the resistance was A.
It decreased to ~14.
０
本実施例の如くＭＯなどのような高融点金属を用いた時
も類似の現象が生ずる。この時抵抗変化は、粒径が大き
くなっても抵抗値は３倍程度しか変化せず、はぼバルク
に近い抵抗値を示すようになる。このようなバルクに近
い抵抗値を示す粒径は、やはり６倍程度に粗大化してい
る。その他の特性は以上に説明したポリシリコンにおけ
る現象と同様である。0 A similar phenomenon occurs when a high melting point metal such as MO is used as in this embodiment. At this time, the resistance value changes only by about three times even if the particle size increases, and the resistance value comes to be close to that of the bulk. The grain size exhibiting such a resistance value close to that of the bulk is also about 6 times larger. Other characteristics are similar to the phenomenon in polysilicon described above.
以上説明した様に、本発明に係る多結晶抵抗体を有した
半導体装置は、制御性、安定性等の面で、従来にない顕
著な効果を有しており、工業的価１（１は極めて高い。As explained above, the semiconductor device having the polycrystalline resistor according to the present invention has unprecedented effects in terms of controllability, stability, etc., and has an industrial value of 1 (1 Extremely high.
第１図は従来の薄膜抵抗体を示す図、第２図（ａ）。
（ｂ）は従来のトリミング状態を示す図、第３図（ａ）
。
（ｂ）は本発明の一実施例にかかる抵抗体の断面図。
正面図、第４図はドース量に対する抵抗値の変化を示す
特性図、第６図は結晶の粒径と抵抗値との関係を示す図
、第６図は抵抗の経時変化状態を示す図である。
１１・・・・・・基板、１２・・・・・・絶縁体膜、１
３・・・・・・抵抗体、１６・・・・・・スポット状、
１６・・・・・・ストライプ状。
代理人の氏名 弁理士 中 尾 敏 男 はが１名第１
図
第２図
第３図FIG. 1 is a diagram showing a conventional thin film resistor, and FIG. 2(a). (b) is a diagram showing the conventional trimming state, and Figure 3 (a)
. (b) is a sectional view of a resistor according to an embodiment of the present invention. The front view, Fig. 4 is a characteristic diagram showing the change in resistance value with respect to dose amount, Fig. 6 is a diagram showing the relationship between crystal grain size and resistance value, and Fig. 6 is a diagram showing the change in resistance over time. be. 11...Substrate, 12...Insulator film, 1
3...Resistor, 16...Spot shape,
16... Striped. Name of agent: Patent attorney Toshio Nakao (1st person)
Figure 2 Figure 3
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13571981A JPS5835965A (en) | 1981-08-28 | 1981-08-28 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13571981A JPS5835965A (en) | 1981-08-28 | 1981-08-28 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5835965A true JPS5835965A (en) | 1983-03-02 |
Family
ID=15158275
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13571981A Pending JPS5835965A (en) | 1981-08-28 | 1981-08-28 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5835965A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0196114A (en) * | 1987-08-21 | 1989-04-14 | Unilever Nv | Dentifrice |
| JPH029160A (en) * | 1988-06-28 | 1990-01-12 | Toshiba Corp | Semiconductor device |
| JPH03148167A (en) * | 1989-11-02 | 1991-06-24 | Rohm Co Ltd | Semiconductor device with built-in resistor |
| JP2012503327A (en) * | 2008-09-19 | 2012-02-02 | アギア システムズ インコーポレーテッド | Silicon allotropes or morphology changes induced by electromagnetic radiation for resistance tuning of integrated circuits |
-
1981
- 1981-08-28 JP JP13571981A patent/JPS5835965A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0196114A (en) * | 1987-08-21 | 1989-04-14 | Unilever Nv | Dentifrice |
| JPH0196113A (en) * | 1987-08-21 | 1989-04-14 | Unilever Nv | Dentifrice |
| JPH01104005A (en) * | 1987-08-21 | 1989-04-21 | Unilever Nv | Dentfrice |
| JPH029160A (en) * | 1988-06-28 | 1990-01-12 | Toshiba Corp | Semiconductor device |
| JPH03148167A (en) * | 1989-11-02 | 1991-06-24 | Rohm Co Ltd | Semiconductor device with built-in resistor |
| JP2012503327A (en) * | 2008-09-19 | 2012-02-02 | アギア システムズ インコーポレーテッド | Silicon allotropes or morphology changes induced by electromagnetic radiation for resistance tuning of integrated circuits |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3938147B2 (en) | Lithium tantalate substrate and manufacturing method thereof | |
| JPH0587986B2 (en) | ||
| JP3184320B2 (en) | Diamond field effect transistor | |
| SE511816C2 (en) | A resistor comprising a polycrystalline silicon resistor body and a method for producing one | |
| US6436846B1 (en) | Combined preanneal/oxidation step using rapid thermal processing | |
| JPS5835965A (en) | Semiconductor device | |
| Kittl et al. | Time‐resolved temperature measurements during rapid solidification of Si‐As alloys induced by pulsed‐laser melting | |
| EP0535633B1 (en) | Method of fabricating nano-size thin wires and devices made of such thin wires | |
| JPH0656839B2 (en) | Method for manufacturing semiconductor device | |
| JPS5834931B2 (en) | Handout Thailand | |
| KR930010093B1 (en) | Forming method of semiconductor thin film | |
| EP3366816A1 (en) | Method for producing lithium niobate single crystal substrate | |
| JPH02119122A (en) | Manufacture of low resistive polycrystalline semiconductor thin film | |
| US5387549A (en) | Process for fabricating ohmic contact | |
| RU2169411C1 (en) | High-power semiconductor resistor and its manufacturing process | |
| JPS63164354A (en) | Method of trimming resistor | |
| JP2019094224A (en) | Method for growing silicon single crystal | |
| Bujatti et al. | Multiply scanned electron beam annealing of Si implanted GaAs | |
| EP3312315A1 (en) | Lithium niobate single crystal substrate and method for producing same | |
| US20180135204A1 (en) | Lithium niobate single crystal substrate and method of producing the same | |
| JPH11268997A (en) | Heat treatment of gallium-arsenic single crystal and gallium-arsenic substrate | |
| US10301742B2 (en) | Lithium niobate single crystal substrate and method of producing the same | |
| EP1328003B1 (en) | Field emission-type electron source | |
| JPH04130623A (en) | Manufacture of semiconductor device | |
| JPH01268047A (en) | Formation of polysilicon resistor |