JPS5834937A - Packaging unit for semiconductor chip - Google Patents

Packaging unit for semiconductor chip

Info

Publication number
JPS5834937A
JPS5834937A JP56134696A JP13469681A JPS5834937A JP S5834937 A JPS5834937 A JP S5834937A JP 56134696 A JP56134696 A JP 56134696A JP 13469681 A JP13469681 A JP 13469681A JP S5834937 A JPS5834937 A JP S5834937A
Authority
JP
Japan
Prior art keywords
semiconductor chip
tool
solder bumps
bonding
bonding tool
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56134696A
Other languages
Japanese (ja)
Inventor
Yoshimitsu Hayashi
義光 林
Katsunori Yamazaki
克則 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Epson Corp
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK, Epson Corp filed Critical Seiko Epson Corp
Priority to JP56134696A priority Critical patent/JPS5834937A/en
Publication of JPS5834937A publication Critical patent/JPS5834937A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/79Apparatus for Tape Automated Bonding [TAB]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/86Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using tape automated bonding [TAB]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To facilitate the construction of and to ensure a longer service life for a semiconductor chip by a method wherein heated air discharged out of a bonding tool melts solder bumps that thereafter stick to leads when a semiconductor chip with solder bumps is packaged by the gang bonding method. CONSTITUTION:Air travelling through a hollow bonding tool 5 provided with a heater 6 is heated by the heater 6 and then discharged out of the bonding tool 5. Inner leads 3 to be subjected to soldering and a semiconductor chip 1 with solder bumps are so arranged to abut against the bonding tool 5 and are exposed to the heated air, whereby the solder bumps 2 are liquefied resulting in the bonding of the inner leads 3 and the semiconductor chip 1. This realizes a chip packaging unit, simpler in construction and longer in service life.

Description

【発明の詳細な説明】 本発明は半田パンツを有した半導体チップをギヤングボ
ンディング法にて実装する実装装置に関し、4?に半田
バンプの溶融方式並びに実装装置のツール形状に間する
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a mounting apparatus for mounting a semiconductor chip having solder pants by a Guyang bonding method. The method of melting solder bumps and the shape of the tool for mounting equipment will be discussed.

本発明の目的は、半田バンプを温風にて溶融し又ツール
先端形状を齋える事により、構造が簡単でツール寿命の
長い実装装置を提供すると共K。
An object of the present invention is to provide a mounting device with a simple structure and a long tool life by melting solder bumps with hot air and fixing the shape of the tool tip.

信頼性の高い、半導体チップ実装品を提供する事にある
Our goal is to provide highly reliable semiconductor chip mounted products.

従来のギヤングボンディング法による半導体チップの実
装方法を館1図に示す。
Figure 1 shows a method for mounting semiconductor chips using the conventional Guy Young bonding method.

■は半田バンプ■を有する半導体チップ。■はインナー
ボンディング用リード(以下インナーリードと言う)、
■は半田バンプを溶融しインナーリードと半田付けする
為の実装装置のツールである。
■ is a semiconductor chip with solder bumps ■. ■ is an inner bonding lead (hereinafter referred to as inner lead),
■ is a mounting equipment tool for melting solder bumps and soldering them to inner leads.

ツール■けヒーターによ少加熱された外円バンブ■を溶
融する。溶融された半田インナーリード■へ濡れてい鯉
チップとインナーリードは半田付けされる、この時イン
ナーリードの濡れ性が悪いと十分なボンディング強度が
得られない、ソノ為ボンディング時にフラックスを使用
している。フラックスの効要は半田の特性を上げ又外−
品質を向上させるのにも役立っている。しかし通常使用
するフラッフ7は半田付は後粘性が高くなる物が多い為
、メンディング後ツール先端とインナーリード■はフラ
ックスによ〉接着されたと同じ状書となる。その為ツー
ルを離す時ボンディング部が一緒に11J?!、ボンデ
ィング部を破壊する結果となる。防ぎ方としてはボンデ
ィング後温度が高くフラックスの粘性の飲い時にツール
を離す方法又はツール先端を特殊加工しフラックスを付
着させない方法郷がとられているが、前者は条件診定が
むづかしく、後者は寿命が短かい岬の欠点がある。
Melt the outer circular bump ■ which has been slightly heated by the heater in the tool ■. The molten solder inner lead is wet.The chip and the inner lead are soldered.At this time, if the inner lead has poor wettability, sufficient bonding strength cannot be obtained.For this reason, flux is used during bonding. . The effect of flux is to improve the properties of solder.
It also helps improve quality. However, the normally used fluff 7 often has high viscosity after soldering, so after mending, the tool tip and inner lead ② will have the same shape as if they had been glued together with flux. Therefore, when the tool is released, the bonding part is 11J? ! , resulting in destruction of the bonding part. To prevent this, there are two methods: releasing the tool when the temperature is high after bonding and the flux is viscous, or special processing the tip of the tool to prevent flux from adhering to it, but in the former case, it is difficult to diagnose the conditions; The latter has the disadvantage of a short lifespan.

またツールの構造として、ヒーターで加熱する方法は熱
璽導、材質等の開運で先端の温度調整がむづかしく、機
構が複雑で高価な実装機棟となりてしまっている。零発
l11けかかる欠点を除却した物で以下実施例に沿って
説明する。
In addition, when heating the tool with a heater, it is difficult to adjust the temperature at the tip due to the heat conduction, material, etc., resulting in a complicated and expensive mounting machine. This is a product which eliminates the drawbacks of the zero-fired model and will be described below with reference to examples.

第2!llけ本発明の一実施例である。■け・・ンダバ
ンプを有する半導体チップ。■は半田バンプと結合する
インナーリード、■は本発明によるパイプ状になったボ
ンディングツール、■はエアーを加熱するヒーターであ
る0図中◆印の方向よ抄工了−(酸化を防ぐ為窒素ガス
が有効)を通すとヒーターので加熱され、中空になって
いるツール内を通って半導体°チップにあたる、第3図
はツール先端部の拡大図であるがチップにあたった温風
は図中φ印の様に広がり半田バンプのKかかる。ここで
半田バンプが溶融されインナーリード■と濡れて接続さ
れる0以上の様な構造をとると、エアー加熱用のヒータ
ーと、エアー量調整のノズルがあれば事かたシる為、非
常に簡単な構造になる。
Second! This is an embodiment of the present invention. ■Ke... A semiconductor chip with bumps. ■ is the inner lead that connects to the solder bump, ■ is the pipe-shaped bonding tool according to the present invention, and ■ is the heater that heats the air. When the gas is passed through (effective), it is heated by the heater, passes through the hollow tool and hits the semiconductor ° chip. Figure 3 is an enlarged view of the tool tip, and the hot air that hits the chip is φ in the figure. It spreads out like a mark and takes the K of the solder bump. If the solder bump is melted and connected to the inner lead ■ in a structure like 0 or more, it is very difficult to solve the problem if there is a heater for heating the air and a nozzle to adjust the amount of air. It becomes a simple structure.

又、ツールはインナーリードと半田バンプを接触させる
だけの役割になる為、半田バンプ溶融温度9上の耐熱性
があればどの様な材質でも良くなる。
Further, since the tool only serves to bring the inner lead into contact with the solder bump, any material can be used as long as it has heat resistance above the solder bump melting temperature 9.

たとえばガラス管等を使用しても良い、しかし、ツール
先端形状が館3図に示すが如く、面でインナーリードと
接触している場合、フラックスによるボンディング部破
IIO問題は解決されていない。
For example, a glass tube or the like may be used, but if the tip shape of the tool is in contact with the inner lead at the surface as shown in Figure 3, the problem of bonding part breakage IIO due to flux has not been solved.

そこで第4図のに示す如く、ツール先端形状をインナー
リードと纏マ接する様に鋭角にした。この様にするとイ
ンナーリードとの接触面積が小さい為、7ラツクスによ
り接着されたと同じ状態になっても、ボンディング強度
の方が勝る為、ボンディング部を破壊する事なく、ツー
ルを離す事が可能になる。インナーリードとの接触面積
が小さい為、ツールをと一ターで加熱する方法を取った
時十分に熱が半田バンプf伝わらず半田溶融が不完全と
なり接続不良発生の原因となるが、第4図のツールの様
にツールをパイプ状wし、+H番で示す温風によって半
田溶融を行なうと、この心配はな?なる。よって、ツー
ル先端形状を本発明の様にした時は、前述した温風によ
る半田溶融方法を並用する事により、更に効果が増すも
のである。
Therefore, as shown in Fig. 4, the tip of the tool was made to have an acute angle so as to make full contact with the inner lead. In this way, the contact area with the inner lead is small, so even if it is the same as being bonded with 7lux, the bonding strength is superior, so it is possible to separate the tool without damaging the bonding part. Become. Because the contact area with the inner lead is small, when the tool is heated all at once, the heat is not sufficiently transferred to the solder bumps f, resulting in incomplete solder melting and connection failures, as shown in Figure 4. If you make the tool into a pipe shape like the tool shown above and melt the solder using hot air indicated by +H, you won't have to worry about this. Become. Therefore, when the tip of the tool is shaped as in the present invention, the effect can be further enhanced by also using the aforementioned solder melting method using hot air.

第5図は他の実施例である。第4図での実施例ではツー
ル先端が鋭角である為ツールに圧力がかかりすぎた場合
、インナーリード■を切断するおそれがある。菖5図で
の実施例は前記欠点を改良したもの寸、ツール先端■を
円弧状ドしである。この様にするとある容度圧力がかか
つてもインナーリードを切断することなくボンディング
が行なえる・ 以上本発明によると半田パンツを形成しである半導体チ
ップの実装装置に於いて、構造が簡単でしかも使い易い
装置を提供すると共に、ツールに於いては、安価で寿命
の長いツーhを提供するものである。
FIG. 5 shows another embodiment. In the embodiment shown in FIG. 4, the tip of the tool is at an acute angle, so if too much pressure is applied to the tool, there is a risk of cutting the inner lead (2). The embodiment shown in Fig. 5 is an improved version of the above-mentioned drawback, and the tip of the tool (3) is shaped like an arc. In this way, even if a certain volumetric pressure is applied, bonding can be performed without cutting the inner leads. As described above, according to the present invention, in a semiconductor chip mounting apparatus that forms solder pants, the structure is simple, and In addition to providing an easy-to-use device, the present invention provides tools that are inexpensive and have a long life.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の害施例の断面図、館2図は本発明の一実
施例の断面図、第3図Fi館2図のツール先端部の拡大
断面図。館4図、IIE5図は本発明の他の実施例の断
面図。 以  上 出願人 信州精器株式会社 棟梁会社 諏訪精工金 代理人 弁理士 最上 務 /4″ 千2図
FIG. 1 is a sectional view of a conventional example, FIG. 2 is a sectional view of an embodiment of the present invention, and FIG. 3 is an enlarged sectional view of the tool tip in FIG. 2. FIG. 4 and FIG. 5 are cross-sectional views of other embodiments of the present invention. Applicant: Shinshu Seiki Co., Ltd. Leader Company Suwa Seikokin Agent Patent Attorney Tsutomu Mogami / 4″ 1,200 drawings

Claims (3)

【特許請求の範囲】[Claims] (1)  バッドに半田パンツが形成されている半導体
チップをギヤングボンディング法を用いて実装する実装
装置に於いて、半田バンプを溶融する方法として温風を
用いる事を特徴とした半導体チップ実装装置。
(1) A semiconductor chip mounting device that uses hot air to melt solder bumps in a mounting device that mounts semiconductor chips having solder pants formed on the pads using the Guyang bonding method. .
(2)  半導体チップ実装M口のツーA−は温風が通
る様にパイプ状になっている事を4I徽とした特許請求
の範111A記載の半導体チップ実装装置。
(2) The semiconductor chip mounting apparatus according to claim 111A, wherein the opening A- of the semiconductor chip mounting M opening is pipe-shaped so that warm air can pass through.
(3)  半導体チップ実1III置のツール先端形状
はインナーリードとの接触が線である様に、鋭角、もし
くけ円弧状になっている事を特徴とする特許請求の範囲
#1項及び第2項記載の半導体チップ実装装置。
(3) Claims #1 and 2, characterized in that the shape of the tip of the tool for the actual semiconductor chip is an acute angle or curved arc so that the contact with the inner lead is a line. Semiconductor chip mounting device as described in .
JP56134696A 1981-08-27 1981-08-27 Packaging unit for semiconductor chip Pending JPS5834937A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56134696A JPS5834937A (en) 1981-08-27 1981-08-27 Packaging unit for semiconductor chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56134696A JPS5834937A (en) 1981-08-27 1981-08-27 Packaging unit for semiconductor chip

Publications (1)

Publication Number Publication Date
JPS5834937A true JPS5834937A (en) 1983-03-01

Family

ID=15134450

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56134696A Pending JPS5834937A (en) 1981-08-27 1981-08-27 Packaging unit for semiconductor chip

Country Status (1)

Country Link
JP (1) JPS5834937A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59212167A (en) * 1983-05-16 1984-12-01 Matsushita Electric Ind Co Ltd Soldering method of electronic parts
JPH02198150A (en) * 1988-10-31 1990-08-06 Natl Semiconductor Corp <Ns> Outer lead bonding device
JPH04177890A (en) * 1990-11-13 1992-06-25 Matsushita Electric Ind Co Ltd Method of joining metallic plate
WO2014139099A1 (en) * 2013-03-13 2014-09-18 China Sunergy (Nanjing) Co., Ltd. Soldering system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59212167A (en) * 1983-05-16 1984-12-01 Matsushita Electric Ind Co Ltd Soldering method of electronic parts
JPH02198150A (en) * 1988-10-31 1990-08-06 Natl Semiconductor Corp <Ns> Outer lead bonding device
JPH04177890A (en) * 1990-11-13 1992-06-25 Matsushita Electric Ind Co Ltd Method of joining metallic plate
WO2014139099A1 (en) * 2013-03-13 2014-09-18 China Sunergy (Nanjing) Co., Ltd. Soldering system
US9837559B2 (en) 2013-03-13 2017-12-05 China Sunergy (Nanjing) Co. Ltd. Soldering system

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