JPS583489A - Color image pickup device - Google Patents

Abstract

PURPOSE:To substantially reduce the frequency of an operating clock signal of a digital filter and to simplify the circuit, by passing through a signal to a digital filter for band limit after point sequential digital color difference data. CONSTITUTION:Green, red and blue signals from input terminals 1G, 1R and 1B are inputted to pre-filters 11G, 11R and 11B via A-D converters 2G, 2R and 2B and process processing circuits 3G, 3R and 3B and summed at an adder 14 via level shift circuits 12G1-12G3, 12R1-12R3 and 12B1-12B3. A digital carrier chrominance signal from the adder 14, the output is added to a burst signal at an adder 16 and further added with a digital luminance signal at an adder 10. A digital television signal is obtained from an output terminal 17.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention digitally processes color television signal t.
- Relating to a color imaging device obtained by the present invention.

A color imaging device configured to digitally process the imaging output output from the IIm element and output a digital color television signal is capable of converting the color television signal into an analog signal over the entire signal processing section. Compared to processed color imaging devices, it is far superior in terms of signal processing, circuit configuration, and scratch resistance.For this reason, there has been a recent trend toward digitizing most of the signal processing in color imaging devices. be@
By the way, conventionally, when digitally processing the output of a camera to form a color television signal, the processing rate is selected to be three to four times as high as the color subcarrier frequency f8c. This is due to the ease of signal processing, such as modulation. Generally, color signals have a band of 0 to 4 MHz. However, the human eye can detect television signals from 0 to 0.
Although it is possible to distinguish the color of a pattern with a relatively large area up to 5 MHz, it is not possible to distinguish the color of a small stroke such as 0.5 to 4M1-1g.For this reason, normally color signals are limited to that band to the extent that there is no practical problem. In digital processing, what is responsible for this band limitation is, for example, a so-called acyclic (FIRll) type digital filter.

In this digital filter, the smaller fc/fs (fc is the cutoff frequency and fs is the operating clock frequency), the more complex its transfer function becomes, and its order must be increased, which can result in a more complex circuit configuration. Are known.

Conventionally, f was set to be three or four times the frequency f8c of the color subcarrier, so f (/f B) became large, which had the disadvantage that the configuration of the digital filter became extremely complicated. .

In view of these points, the present invention substantially lowers the frequency of the operating clock signal of the digital filter and eliminates the above-mentioned drawbacks.The following describes the color imaging device according to the present invention with reference to the drawings. About an example: ◎This example shows the green, red and blue signals G, l- which can be obtained from a three-tube color camera, a three-plate COD color camera, etc.
By digitally processing L and B, it is possible to obtain a color television signal in which the color signal is so-called UV modulated. In the figure, (tG), (IR), and (IB). Input terminals to which green, red, and blue signals G%R and B obtained from a three-tube color camera, a three-plate COD color camera, etc., respectively, are supplied are shown. The green, red and blue signals GSFL and B supplied to these input terminals (IG), (lR) and (IB) are respectively supplied to the A-D cost converters (2G), (2R) and (
0 these A-D converters (2G) supplied to 2B),
A clock signal CKA having a frequency of 3 fSC is supplied to (2R) and (2B), and the respective color signals G, R and B are digital color signals CQ, CR- and CB of, for example, 1 sample and 8 pits at a processing rate of ATSC. will be converted into
And these digital color signals CG, OR and cB
Process processing circuits (3G), (3R) and (3B
As is well known, the 0 process processing that is supplied to the signal processing circuit (0) and processed is signal processing such as γ correction, white clipping, and pedestal clamping.

Processed digital color signals CG, CR and cB
The signal H is supplied to the adder (5) via level shift circuits (4G), (4R) and (4B) which lower the level to 0.59, 0.30 and 0.11, respectively. In this adder (5), the level of each digital color signal CQ is lowered.

OR and CB are added to form the digital luminance signal Cy. This digital luminance signal CY #i, Cy =
0.59CG + 0.3OCR+ 0.11CB
It is expressed as (1). The digital luminance signal CY formed by the adder (5) is added via vertical and horizontal contour correction circuits (6) and (7), and a delay circuit (8) for phase matching with a color signal, which will be described later. This adder (9) is supplied to one input side of the adder (9).
) is connected to the other input side of the synchronous signal generator (not shown).
The vertical and horizontal synchronizing signals 5YNC generated in the adder (9) are supplied, and the synchronizing signal 8YNC is added to the digital luminance signal CY in this adder (9).
9) is supplied to one input side of the added digital luminance signal Cy Fi adder Ql.

In addition, process processing circuits (3G), (3B) and (3B
The digital color signals CG, OR and cB output from
) K supplied ・Silifilter (IIG), (IIR
) and (IIB) Fi are each configured to have frequency characteristics as shown in Figure 2B. It is designed to suppress frequencies.

In this case, the bandwidth of the digital color signals CG, CR, and cB is approximately 4 MHz, and their respective frequency spectra are expressed as shown in Figure 2. Therefore, from this brifilter (IIG), (IIR) and (1tB),
Band-limited digital color signals CG, CR, and CB are obtained as shown in FIG.

The reason why the digital color signals CG, cR, and CB are limited in this way in the BRIFILTER (IIG), (IIR), and (xIB) is to limit the bands of the digital color signals CG, CR, and CB in this manner, as will be described later. This is rounding to prevent aliasing distortion when sampling at a rate of .

In addition, these Buri filters (IIG), (IIR) and (
IIB) is a digital filter whose operating clock frequency f is 3f,c; however, the cutoff frequency f
Since c is relatively large and fc/fa is large, it can be configured more easily than a digital filter that limits the color difference signal band to, for example, 800 kHz, which will be described later. (11B) The band-limited digital color signals CG, CR, and cB outputted from the output terminal are transferred to level shift circuits (12G1) (12G
2) (12G3), (12Rt) (12RzX12
Rs) and θ(12BlM12B2) (12B3). In the level shift circuits (12Gt) (12G2) and (t20s), the level of the supplied digital green signal CQ is multiplied by g1, g2 and gs, respectively, and the level shift circuits (12R1) (12R2) and ( 12R3), the level of the supplied digital red signal CR is multiplied by r1" e r2 and rs, respectively, and the level shift circuit (i2B1) (12B
2) and (12Bg), the levels of the supplied digital blue signal cB are bl, b2' and b3, respectively.
Multiplier gl a g2 * gs a rl e
r2 a rl 1b1. b, 2 and b3Fi are determined to satisfy the following formula.

Here, %Cv:=-□, CU=-C□L.

From this formula (2), Cv = gtca + rICR + blcm
...-(3) me”””” = gscc + rs
CR+ bscB 6-(5) is obtained, eventually in this example the multiplier gZ 1g21Rs, l rl e r
21 rl m bl a b2 and b3 are determined to be.

In addition, the output sides of the level shift circuits (12Gt) (120g) and (12Gg) are connected to the 11th second and third fixed contacts (13(h), (13G2) of the selector switch (13G) constituting the selector a3, respectively. and (130s).The movable contact (13G4) of this changeover switch (13G) is connected to the input side of adder 6.
In addition, the output sides of the rail shift circuits (12R1), (12R2), and (12Rs) are connected to the first and second selector switches (13R) constituting the selector αj, and the fixed contacts (13Rt), (13R2) of the building 3, respectively. and (13Rs)K!
It is continued. And this changeover switch (131(,)
The movable contact (13R4) is connected to the input side of adder a4. Furthermore, a level shift circuit (12Bl), (12
The output sides of B2) and (128m) are selected by selector t1, respectively.
The eleventh second and third fixed contacts (13Bt), (13Bs) and (1
:lBs) and this changeover switch (
The movable contact (13B4) of 13B) is connected to the input side of adder am.

This selector 63Kti frequency 3f, clock signal CKA of c is supplied as a control signal, and the selector switch (13
G), (13)L), and (13B) are controlled in conjunction with each other by this control signal. (claw), changeover switch (13G), movable contact (13G4) of (13R) and (13B).

(13R4) and (13B4) are first fixed contacts (13Gt), respectively.

The first state 8'1 is connected to (13R1) and (13B1), and the movable contacts (13G4), (13R<) and (13B4) are connected to the second fixed contact (13G2), (
13Rz) and (13mg), and this movable contact (13G4').

(13R4) and (13B4) are the third fixed contacts (
13Gs).

The third state 115T3 and K 3'' connected to (13R3) and (13B3) are controlled to be sequentially connected to each other.

In this case, level shift circuits (12G1), (12G2
) and (12Q, ), the digital green signals gtcc%g2cQ and gmcc obtained from the output sides of Figure JK shows “ist, c”
A digital green signal CG', which level is affected by each signal, is provided. In addition, level shift circuit (12Rx), D2R2
) and (12Bm).

Assuming that, a digital red signal CR' whose level changes every 3 fsc as shown in FIG. 3K is supplied to the adder a4 via a changeover switch (IIR). Furthermore, the digital blue signals blcB, cB and b3cB obtained from the output sides of the level shift circuits (12B1), (12B2) and (128s) are shown in FIG. 3G,
If indicated by H and I, the changeover switch (13B)
through an adder (141 as shown in FIG. 3 LK) 3f
A defthal blue signal CB' whose level changes every sc is supplied.

In adder B4, these digital color signals CG'
, CR' and C84 are added. Therefore, when the selector 3 is in the 8T1 state, 8T2 state, and 8T3 state 11, the output side of the adder a4) is the digital color difference data g2cG.
+ r2cH+ b2cB ) and Yoiko ■ Return C = gs
Ca+r3cH+b3cB) is obtained from the output side of the adder a4, and # is sequentially output every digital color 1/'3fsc as shown in FIG. 3MK.

The frequency spectrum of the output signal of the digital adder α4 is shown in FIG. 2DK. In this case, the frequency f = fsC, and the sum of these vectors is zero. Therefore, from this adder I, the frequency flcO color subcarrier is divided into orthogonal two-phase condensers at the peak numbers Cv and CU. The point sequential signal output from this adder a is converted into a digital carrier color signal.
A digital filter (supplied to the US) that limits the noise to 0kHz1.In order to ensure processing stability and constant group delay characteristics, this digital filter a!9 has a symmetrical innocuous response, such as a A cyclic (FIR type) digital filter is used.
The figure shows an example. In the figure, %D
ll II) tb # DIC* D2Jl # D2
b # DECe...

I) aa l Dsb and DIC are respectively operators O
These operators Dla * Dlb DIC$I)za
I Dab s D2C*”””*I)am, I
)ab, I)sc are operated by the 3'sc signal CKA, respectively, and are designed to provide a delay of h3fllc. In this case, this digital filter αSK is a point-sequential signal that appears sequentially. Therefore, operator I)
tl a Dlb # I) tcl Dla Sha Da
b e I)zc, +++++ ID8m, I)a
b I l) @c out of D11″DICe D2 for 4=
C reference""・zD口～I)sc are connected in series, and:
A new operator D1 e Dz with a delay amount of /'sc
r...music, D, and these new operators D! ,D!
In the case of Jin, a new operator DI # Dz with a delay amount of /fsc is constructed using 9 songs..., Ds, so this digital filter a9 is essentially Assuming that the operating clock frequency is tsc, it is designed to have a cutoff frequency of approximately 80 GkHz, as shown in Figure 2 EK's frequency characteristics. In other words, the transfer function is normalized as H(g3). frequency is designed with fsc.

In addition, Fig. 14 shows Oite, (1so), (4s1), --
----, (153) are adders, (154), (1
55) ,・Song・, (158) #: i each inno parable response % number bo , hl ,...
It is a multiplier that is multiplied by h4, and (159) is a multiplier (
154).

This is an adder in which the outputs of (155), -----, (158) are added.

Now, consider the case where a digital carrier color signal Cy + CU as shown in FIG. 3M is supplied to the input terminal (15A) K.
Let's try it. Since the operator Dt e Dz -song...-Dz has a delay amount of -''17B@r, when the digital color difference data Cv is supplied to the input terminal (15A), the operator DI e Dz m... ..., since the output of Ds is all digital color difference data Cv, at this time, when the digital color difference data whose band is limited to approximately 800kHz is output from the output terminal (15B), the output terminal (15A)
As shown in FIG. 3, the frequency spectrum of which is shown in FIG. 3, a digital carrier color signal Cv+CU whose frequency band is limited to approximately 80 GkHz is obtained.

This band-limited digital carrier color signal CV + CU
is supplied to one input side of the adder ae. The other input side of this adder is connected to an A-st signal generator (not shown).
The nosest signal 8B generated by the adder is therefore supplied with the digital carrier color signal Cy.
+ CU KA-A signal to which the strike signal 8B is added is obtained.

Digital carrier color signal Cy obtained from this adder ae
+ Cg is supplied to the other input side of the adder a. In this adder α, the digital carrier color signal Cy + Cg is added to the digital luminance signal CY to form a digital television signal.・Therefore, this adder Q
An output terminal (digital television at 171) derived from the output side of the output terminal (171) provides a signal.

As described above, according to the present invention, the data is converted into point-sequential digital color difference data (digital carrier color signal) and then passed through a band-limiting digital filter. Therefore, there is no need to provide an independent digital filter for each digital color difference data, and the circuit is simplified accordingly.

Moreover, by using point-sequential digital color difference data, a digital filter can be designed with a transfer function of H(z3) and a normalized frequency fsc.

In other words, the effective operating clock frequency of the digital filter can be designed as tsc. Therefore, 'c/fs ('c ti cutoff frequency, f
, is the operating clock frequency) is larger than the conventional one, so the digital filter can be easily configured without increasing the order.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a color imaging device according to the present invention, FIGS. 2 and 3 are diagrams for explaining the example in FIG. 1, and FIG. 4 shows a specific example of a digital filter. FIG. (IG), (IR) and (tH) are color signal input terminals, respectively;
(2G) (2R) and (2B) are respectively A-D@' exchangers,
(5) and (14) are adders, (11G) (IIR
) and (IIB) are brifilter filters, a3 is a selector, and (19-digit digital filter).

Claims (1)

[Claims] 1. If the rate is BfBG (18
c is a color subcarrier frequency), a digital luminance signal is formed from the first, second, and third digital color signals, and a digital luminance signal is generated from the first, second, and third digital color signals. , the first and second digital color signals from the second and third digital color signals.
The first, second, and third digital color difference data having one or both of the digital color difference signals as components form point-sequential color difference data that appear sequentially at every %fsc, and this point-sequential color difference data is passed through a digital filter. By doing so, the bands of the first and second digital color difference signals are limited, and the first, second and third digital color difference data are such that the point sequential digital color difference data is substantially the same as the first and second digital color difference data. A color imaging device characterized in that the color subcarrier is orthogonally two-phase modulated using a digital color difference signal. 2. The rate is 3fsc (fs
c is the color subcarrier frequency) to obtain the 9th, 11th, second and third digital color signals; A digital luminance signal is formed from the second and third digital color signals, and each of the eleventh second and third digital color signals is band-limited by a Buri filter, and the band-limited eleventh digital color signal is 2 and 3, the first and second digital color signals have one or both of the first and second digital color difference signals as components.
and third digital color difference data form point-sequential color difference data that appears sequentially every /3fsc, and this point-sequential color difference data is passed through a digital filter to form the first and second digital color difference data.
The 11th second and third digital color difference data is such that the point-sequential digital color difference data substantially uses the color subcarrier in the first and second digital color difference signals. A color photography style featuring orthogonal two-phase honey tone ◎