JPS5834853B2 - error verification circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The object of the present invention is to obtain an error verification circuit that can measure a noise environment, detect the correctness of an identification signal according to the degree of the noise environment, and efficiently detect a true identification signal. .

Conventionally, this type of apparatus has been constructed as shown in FIG.

That is, the signal from the detection device 1 that repeatedly derives the object signal for one object is sent to the receiving register 2.
is memorized.

The signal stored in the reception register 2 is examined by the accumulation controller 3 for validity as a signal for each object signal, and only words that pass this test are stored in the register 4.

The object information stored in this register 4 is supplied to a display or transmission device 5.

In order to check the validity of the received signal, for example, if a prescribed code is obtained twice in the same pattern, it is ultimately treated as a correct and true word.

However, in such a conventional error verification circuit, in a noisy environment, even a signal composed of only noise and stored in the reception register 2 may pass the verification standard of the accumulation controller 3. This has the disadvantage that one or several words of one piece of object information consisting of words of several digits are stored in the register 4 as incorrect information, resulting in erroneous identification.

In such cases, in order to reduce the probability of misidentification, it is possible to improve the information by making the test criteria stricter, for example, treating the same pattern as a true word only when it is obtained seven times in a row. It is possible to improve reliability.

However, since the number of receptions that include true information generally varies and is uncertain depending on the type of object and the number of sweep combinations, it is not possible to make the verification criteria stricter.

This is because if the number of receptions, that is, the number of sweep combinations is large, the reliability of the seed information will be improved by tightening the verification criteria, but if only a small number of sweep combinations are obtained, it is difficult to obtain true information without any noise. You will miss it.

Therefore, the verification standard had to be lowered to a level that would not be overlooked even when the number of receptions was the smallest, and it was inevitable that the possibility of detecting false information would be greater when there was a lot of noise.

Therefore, the present invention has been made in view of the above points, and provides an error verification circuit that can change the verification standard according to the degree of the noise environment and can efficiently detect the true identification signal according to the noise environment. The purpose of this system is to obtain information that can be obtained with conventional equipment by determining the noise environment conditions. The main point is that the accuracy of the information can be confirmed.

An embodiment of the present invention will be described in detail below with reference to the drawings.

That is, as shown in FIG. 2, most or all of the signals from the detection device 11 that repeatedly derives object signals for one object are stored in the reception register 12.

Here, the storage capacity of this reception register 12 is set in advance to enable storage as described above.

Then, the signal stored in the receiving register 12 is tested for validity as a signal on a word-by-word basis by a verification device 13 comprising, for example, an accumulation controller, and only words that have passed this verification are stored in the register 14. be remembered.

Here, as a test for validity as a signal, for example, if a prescribed code is obtained twice in the same pattern, the prescribed code is regarded as correct and true information.

Alternatively, among the information stored in the reception register 12,
The most common pattern is considered to be the correct and true information.

Possible methods include the following.

By the way, in the above description, the object signal stored in the reception register 12 may differ from the true one as a result of detecting some incorrect words due to noise or the like.

Specifically, the comparator 15 is supplied with the contents stored in the receiving register 12 for multiple sweeps and the contents stored in the register 14, and here the two are compared in each corresponding bit unit or word unit to count the number of discrepancies. .

Then, in the reception register 12, if there is no coupling with the target object and no noise is included, and the result is all "0", it is necessary to remove the measurement of the noise environment, so the signal is passed through the OR circuit 16 and the gate circuit 17. The mismatch count output is supplied to the noise environment condition determination circuit 18.

Here, if the number of discrepancies is below the number, it is determined that the noise environment conditions are good, or if the number of discrepancies is above the number, the noise environment conditions are determined to be poor. .

In this way, when a determination output indicating that the noise environment condition is good is obtained from the determination circuit 18, the memory contents of the register 14 are stored in the register 20 as true information and 1 through the data 1 to circuit 19. The data is then sent to a display or transmission device (not shown) as necessary.

On the other hand, if the judgment circuit 18 judges that the environmental conditions are bad, the contents stored in the register 14 are not regarded as true information, and the gate circuit 19 is closed and the register 20 is closed.
will not be memorized.

However, the information is disturbed by noise, for example, a certain bit is inverted to +1-n, or a certain bit is changed to 'O
The probability that the noise environment condition judgment circuit 18 is reversed varies depending on various conditions, but according to the circuit of the present invention as described above, it is possible to deal with various cases by appropriately providing the reference conditions for the noise environment condition determination circuit 18. I can do it.

For example, a mismatch in comparator 15. If the count is divided into so-called omitted forms (1→0) and erroneous forms (O12), the degree of correspondence can be further improved.

Further, the present invention is particularly effective when a plurality of words are composed of only noise.

This is because multiple words (register 1) composed only of noise
4) and the memory content of register 12, there will always be a certain number of mismatched bits due to the nature of noise, and this cannot be considered true information. It is from.

Further, according to the circuit of the present invention, it is possible to obtain sufficiently reliable information even when the number of receptions including true information is uncertain.

In other words, under noise that causes false information, 1's are scattered in the received signal, and if we compare this with the information obtained by verifying with the verification device 13 and look at the degree of discrepancy, we can see that it is noise. This is because the reliability of the information can be increased by knowing the size of the possibility created by the information.

Therefore, as described in detail above, according to the present invention, the accuracy of the information obtained by detecting the noise environment and verifying it with the verification device 13 is verified, thereby determining the true value according to the noise environment. It is possible to provide an error verification circuit that can efficiently detect information.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional object identification device, and FIG. 2 is a block diagram showing an embodiment of an error verification circuit according to the present invention. 11...Detection device, 12...Reception register, 13...Verification device, 14...Sister, 15...Comparison circuit , 16...
・OR circuit, 17...Gate circuit, 118...
...Judgment circuit, ...Register. 19...gate circuit, 20...

Claims (1)

[Claims] a first means for detecting object signals by repeatedly sweeping 11 objects a plurality of times; a second means for sequentially storing object signals obtained by this means; and a second means for sequentially storing object signals obtained by this means; A third device that determines the degree of coincidence between corresponding bits or a plurality of corresponding bits of the object signal and stores bits having a degree of coincidence equal to or higher than a predetermined value or a plurality of bits with a high degree of coincidence.
and fourth means for detecting the degree of coincidence between the signal stored by the third means and each object signal accumulated by the second means. .