JPS5828793B2 - Eizoushingo no Isouhenchiyouhouhou - Google Patents

Eizoushingo no Isouhenchiyouhouhou

Info

Publication number
JPS5828793B2
JPS5828793B2 JP49043792A JP4379274A JPS5828793B2 JP S5828793 B2 JPS5828793 B2 JP S5828793B2 JP 49043792 A JP49043792 A JP 49043792A JP 4379274 A JP4379274 A JP 4379274A JP S5828793 B2 JPS5828793 B2 JP S5828793B2
Authority
JP
Japan
Prior art keywords
video signal
circuit
output
supplied
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP49043792A
Other languages
Japanese (ja)
Other versions
JPS50137521A (en
Inventor
征彦 町田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP49043792A priority Critical patent/JPS5828793B2/en
Publication of JPS50137521A publication Critical patent/JPS50137521A/ja
Publication of JPS5828793B2 publication Critical patent/JPS5828793B2/en
Expired legal-status Critical Current

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  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
  • Television Signal Processing For Recording (AREA)

Description

【発明の詳細な説明】 映像信号を磁気テープに記録するなどして伝送する場合
、映像信号を位相変調する場合がある。
DETAILED DESCRIPTION OF THE INVENTION When transmitting a video signal by recording it on a magnetic tape, the video signal may be phase modulated.

位相変調によれば、その変調指数を小さくしてデイビエ
イションを抑えることにより、周波数変調する場合に比
べてモアレなどを少なくできる利点がある。
Phase modulation has the advantage of reducing moire and the like by reducing the modulation index and suppressing deviation, compared to frequency modulation.

この場合、再生ないし受信側において映像信号を復調す
るには、サンプリング系を有するAPCループを構成す
る方法がある。
In this case, in order to demodulate the video signal on the reproduction or reception side, there is a method of configuring an APC loop having a sampling system.

第1図は、このような復調方法をとる場合で、入力端1
よりの位相変調された映像信号を位相検波回路2に供給
し、電圧制御型可変周波数発振器3よりの発振信号を回
路2に供給し、回路2より復調された映像信号を得、こ
れを低域通過フィルタ4を通じて出力端5に取出す。
Figure 1 shows the case where such a demodulation method is used, and the input terminal 1
A phase-modulated video signal from the voltage-controlled variable frequency oscillator 3 is supplied to the phase detection circuit 2, an oscillation signal from the voltage-controlled variable frequency oscillator 3 is supplied to the circuit 2, a demodulated video signal is obtained from the circuit 2, and this is It is taken out through a pass filter 4 to an output end 5.

そしてフィルタ4の出力はサンプリングホールド回路6
に供給し、また同期分離回路7より取出した水平同期信
号を回路6に供給し、回路6にて各水平区間での水平同
期信号のレベルを検出してその検出出力を発振器3に供
給してその発振周波数を制御することにより、復調され
た映像信号の水平同期信号のレベルが一定になる王うに
する。
The output of the filter 4 is the sampling hold circuit 6.
The horizontal synchronization signal taken out from the synchronization separation circuit 7 is also supplied to the circuit 6, which detects the level of the horizontal synchronization signal in each horizontal section and supplies the detection output to the oscillator 3. By controlling the oscillation frequency, the level of the horizontal synchronizing signal of the demodulated video signal is kept constant.

しかしながら、この場合、伝送系のジッターやドリフト
による影響を除去すべく、図のように入力端1よりの位
相変調された映像信号を周波数弁別器8に供給し、その
弁別出力を発振器3に供給してその発振周波数を制御す
るAFCループを併せて設ける必要がある。
However, in this case, in order to remove the effects of jitter and drift in the transmission system, the phase-modulated video signal from the input terminal 1 is supplied to the frequency discriminator 8 as shown in the figure, and the discriminator output is supplied to the oscillator 3. It is also necessary to provide an AFC loop for controlling the oscillation frequency.

このため、この方法による場合には、全体の回路構成が
複雑になるという欠点がある。
Therefore, this method has the disadvantage that the entire circuit configuration becomes complicated.

これに対し、サンプリング系を持たないAPCループ、
例えばPLLを構成する方法がある。
On the other hand, an APC loop without a sampling system,
For example, there is a method of configuring a PLL.

第2図は、この場合で、入力端11よりの位相変調され
た映像信号を位相検波回路12に供給し、電圧制御型可
変周波数発振器13よりの発振信号を回路12に供給し
、回路12より復調された映像信号を得、これを低域通
過フィルタ14を通じて取出し、フィルタ14の出力を
時定数回路15を通じて発振器13に供給してその発振
周波数を制御する。
In this case, FIG. 2 shows that the phase-modulated video signal from the input terminal 11 is supplied to the phase detection circuit 12, the oscillation signal from the voltage-controlled variable frequency oscillator 13 is supplied to the circuit 12, and the phase-modulated video signal from the input terminal 11 is supplied to the circuit 12. A demodulated video signal is obtained and taken out through a low-pass filter 14, and the output of the filter 14 is supplied to an oscillator 13 through a time constant circuit 15 to control its oscillation frequency.

この場合、PLLの位相検波特性により、復調された映
像信号においては低域の周波数成分のレスポンスが低下
してしまうので、図のように、PLLの出力はクランプ
回路16を通じて出力端17に取出すようにして直流再
生を行う必要がある。
In this case, due to the phase detection characteristics of the PLL, the response of low frequency components in the demodulated video signal decreases, so the output of the PLL is taken out to the output end 17 through the clamp circuit 16, as shown in the figure. It is necessary to perform DC regeneration.

ところで、PLLでは、時定数回路15での時定数τ1
を小さくして応答を早めれば、そのロックレンジを広げ
ることができ、時定数τ1を約1.5X10 ”
sec程度にすれば、例えば位相変調の際の搬送周波数
が4■hの場合、約±1%のロックレンジを保証するこ
とができる。
By the way, in PLL, the time constant τ1 in the time constant circuit 15
By reducing the value of τ1 to speed up the response, the lock range can be expanded, and the time constant τ1 can be reduced to approximately 1.5X10.
If it is about sec, for example, when the carrier frequency during phase modulation is 4 h, a lock range of approximately ±1% can be guaranteed.

そして時定数τ1を約1.5 X 10−’secに選
ぶときは、PLLの位相検波特性、即ち位相検波回路1
2の入力に対するフィルタ14の出力の比は、第3図の
曲線18のようになり、その遮断周波数1 f (= )は約10kHz になる。
When the time constant τ1 is selected to be approximately 1.5 x 10-'sec, the phase detection characteristics of the PLL, that is, the phase detection circuit 1
The ratio of the output of the filter 14 to the input of 2 is as shown by the curve 18 in FIG. 3, and its cutoff frequency 1 f (=) is approximately 10 kHz.

しか吹P 2πτP がら、クランプ回路16での時定数τDは、水平周波数
fHで決まってしまい、lXl0 sec程度以下に
はすることができず、従って直流再生特性、即ちクラン
プ回路16の入力に対する出力の比は、同図の曲線19
のようになり、その遮断周波数fD(=27c、rD)
は約1.5 kHz程度以上にはならない。
However, the time constant τD in the clamp circuit 16 is determined by the horizontal frequency fH and cannot be made lower than about lXl0 sec. The ratio is curve 19 in the same figure.
The cutoff frequency fD (=27c, rD)
does not exceed approximately 1.5 kHz.

このため、図から明らかなように、再生出力特性におい
ては、3.5kHz前後の周波数fMを中心とする所定
周波数領域で谷間の部分が生じ、この部分で再生出力が
減衰してしまう。
Therefore, as is clear from the figure, in the reproduced output characteristic, a valley portion occurs in a predetermined frequency region centered around the frequency fM around 3.5 kHz, and the reproduced output is attenuated in this portion.

時定数τ、を上述の値より大きくして位相検波特性を低
域側にずらし、即ち遮断周波数fpを上述の値より低く
すれば、再生出力特性を平担にすることができるが、こ
のようにすると、PLLでのロックレンジが狭くなって
しまい好ましくない。
If the time constant τ is made larger than the above value and the phase detection characteristic is shifted to the lower frequency side, that is, the cutoff frequency fp is made lower than the above value, the reproduced output characteristic can be flattened. If this is done, the lock range in the PLL will become narrower, which is not preferable.

本発明は、こりような点にかんがみ、特に変調側で工夫
を施すことにより、再生出力特性が平担になるようにし
たもので、以下、本発明方法の一例を第4図について説
明しよう。
In view of this problem, the present invention is designed to flatten the reproduced output characteristics by particularly making improvements on the modulation side.An example of the method of the present invention will be explained below with reference to FIG. 4.

本発明では、変調側において、復調側の位相検波特性と
直流再生特性に応じた特性のプリエンファシスをかける
ようにする。
In the present invention, on the modulation side, pre-emphasis is applied with characteristics corresponding to the phase detection characteristics and DC reproduction characteristics on the demodulation side.

第4図は、テープに映像信号を記録し、これを再生する
場合に本発明を適用したもりで、入力端21よりの映像
信号をプリエンファシス回路22に供給し、その出力を
位相変調器23に供給して位相変調し、変調された映像
信号を記録アンプ24を通じ、記録再生切換スイッチ2
5の記録側接点Rを通じてヘッド26に供給してテープ
27に記録する。
FIG. 4 shows a case in which the present invention is applied when recording a video signal on a tape and reproducing it. The video signal from the input terminal 21 is supplied to a pre-emphasis circuit 22, and its output is sent to a phase modulator 23. The modulated video signal is supplied to the recording amplifier 24 to be phase-modulated, and the modulated video signal is sent to the recording/playback switch 2 through the recording amplifier 24.
It is supplied to the head 26 through the recording side contact point R of No. 5 and recorded on the tape 27.

再生にあたっては、ヘッド26よりの再生信号をスイッ
チ25の再生側接点Pを通じ、再生アンプ28を通じて
上述の構成のPLL29に供給して復調し、復調された
映像信号をクランプ回路16に供給して直流再生し、そ
の出力をアンプ30を通じて出力端17に取出す。
During reproduction, the reproduction signal from the head 26 is supplied through the reproduction side contact P of the switch 25 to the PLL 29 having the above-mentioned configuration through the reproduction amplifier 28 for demodulation, and the demodulated video signal is supplied to the clamp circuit 16 to generate a DC signal. The output is outputted to the output terminal 17 through the amplifier 30.

変調側のプリエンファシス回路22においては、復調側
での位相検波特性と直流再生特性によって決まる上述の
所定周波数領域部分を強調するようにプリエンファシス
をかけるもので、即ちその入力対出力の特性は第3図の
破線20で示すようにする。
The pre-emphasis circuit 22 on the modulation side applies pre-emphasis to emphasize the above-mentioned predetermined frequency region determined by the phase detection characteristics and DC reproduction characteristics on the demodulation side. As shown by the broken line 20 in FIG.

この場合、最も強調すべき周波数fMのところでは約5
dB程度強調するようにすればよい。
In this case, at the frequency fM that should be emphasized the most, approximately 5
It may be emphasized by about dB.

このように本発明によれば、復調側での出力の減衰を補
償すべく変調側でプリエンファシスをかけるものである
から再生出力特性は平担になる。
As described above, according to the present invention, since pre-emphasis is applied on the modulation side to compensate for the attenuation of the output on the demodulation side, the reproduced output characteristics become flat.

しかも復調側の構成が簡単になるとともに、応答の早い
サンプリング系を持たないので変調された映像信号に混
入するノイズに対して強くなる。
Moreover, the configuration on the demodulation side is simplified, and since it does not have a sampling system with a quick response, it is resistant to noise mixed in the modulated video signal.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は本発明の説明のための位相復調回路
の一例の系統図、第3図は本発明の説明のための特性曲
線図、第4図は本発明方法の一例の系統図である。 21は映像信号の入力端、22はプリエンファシス回路
、23は位相変調器、29はPLL。 16はクランプ回路、17は再生信号の出力端である。
1 and 2 are system diagrams of an example of a phase demodulation circuit for explaining the present invention, FIG. 3 is a characteristic curve diagram for explaining the present invention, and FIG. 4 is a system diagram of an example of the method of the present invention. It is a diagram. 21 is a video signal input terminal, 22 is a pre-emphasis circuit, 23 is a phase modulator, and 29 is a PLL. 16 is a clamp circuit, and 17 is an output end for a reproduced signal.

Claims (1)

【特許請求の範囲】[Claims] 1 復調側の位相検波特性と直流再生特性によって生じ
る所定周波数領域での出力の減衰を補償すべく、変調側
で上記両特性に応じた特性のプリエンファシスをかける
ようにした映像信号の位相変調方法。
1. A video signal phase modulation method in which pre-emphasis is applied on the modulation side with characteristics corresponding to both of the above characteristics in order to compensate for output attenuation in a predetermined frequency range caused by the phase detection characteristics and DC reproduction characteristics on the demodulation side. .
JP49043792A 1974-04-18 1974-04-18 Eizoushingo no Isouhenchiyouhouhou Expired JPS5828793B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP49043792A JPS5828793B2 (en) 1974-04-18 1974-04-18 Eizoushingo no Isouhenchiyouhouhou

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP49043792A JPS5828793B2 (en) 1974-04-18 1974-04-18 Eizoushingo no Isouhenchiyouhouhou

Publications (2)

Publication Number Publication Date
JPS50137521A JPS50137521A (en) 1975-10-31
JPS5828793B2 true JPS5828793B2 (en) 1983-06-17

Family

ID=12673580

Family Applications (1)

Application Number Title Priority Date Filing Date
JP49043792A Expired JPS5828793B2 (en) 1974-04-18 1974-04-18 Eizoushingo no Isouhenchiyouhouhou

Country Status (1)

Country Link
JP (1) JPS5828793B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59174300A (en) * 1983-03-22 1984-10-02 Aisin Seiki Co Ltd Hydraulic cylinder device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59174300A (en) * 1983-03-22 1984-10-02 Aisin Seiki Co Ltd Hydraulic cylinder device

Also Published As

Publication number Publication date
JPS50137521A (en) 1975-10-31

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