JPS5824975A - Optical character reader - Google Patents

Abstract

PURPOSE:To speed up the recognition speed and to make the device small in size, by constituting a plurality of recognition sections to share one dictionary memory. CONSTITUTION:A character pattern photoelectric-converted at a photoelectric conversion section 1 is sequentially written in a line buffer 3 via a pre-processing section 2. During this processing, a control recognition processor 4 accesses a format table 5, check the style of characters constituting character rows during scanning and selects a dictionary to be referenced. Thus, the content of the dictionary is repetitively read out from a dictionary memory 6. One character is cut out from the buffer 3 and the normalization of the size of the characters and line width is made and written in a recognition section 8a. Next, the 2nd character pattern is cut out for normalization and given to a recognition section 8b. Similarly, the cut-out character patterns are given to a recognition section 8 not in operation. When the processor 4 receives a recognition end signal from the recognition section, the result of calculation of similarity stored in the recognition section 8 is referenced to determine the answer and the answer is written in an output buffer 9.

Description

[Detailed description of the invention] 411K The present invention relates to an optical character reading/composition device.

The present invention relates to an optical character reading*a device in which a plurality of recognition units share one dictionary memory.

Recent optical character reading*C devices (hereinafter referred to as OCR)
has become able to read a wide variety of characters. Furthermore, in line with this, the number of reference standard patterns stored in the dictionary memory within the OCR is also increasing. Rounding off, the storage capacity of the dictionary memory has become an enormous 40.

By the way, for rounding to improve the recognition speed of OCR, it is effective to provide a plurality of recognition units that operate in parallel. However, if a large-capacity dictionary memory is added to each of these plurality of recognition sections, the device becomes large and expensive.

The present invention has been made in view of the above circumstances. Therefore, an object of the present invention is to provide an OCR that has high recognition speed, is small in size, and is inexpensive.

Another object of the present invention is to provide an OCR system in which multiple OCR units share one dictionary memory.

Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 11 is an eleventh enlarged block diagram of an embodiment of the present invention.

In the figure, reference numeral 1 is a photoelectric conversion section. The charging conversion unit 1 includes a transport mechanism that transports a form on which characters to be read are written, and a scanning mechanism that scans the character pattern on the form. Code 2 is the expansion treatment section. This preprocessing unit 2Fi performs preprocessing such as noise removal on the photoelectrically converted character pattern.

Code 3ti? It's inbatshua. This line buffer 3 stores one line of preprocessed character patterns. Code 4 is I! This processor 4, which is a recognition control processor 4I'' (hereinafter simply referred to as a processor), is a 5-line format table that processes various data related to character recognition and controls various parts within the device. The rat table 5 stores various format information necessary for reading characters. Reference numeral 6 is a dictionary memory. Standard patterns of various characters are stored in this dictionary memory 1J6. Reference numeral 6 is a dictionary memory. 7 is a dictionary control unit. This dictionary control unit 7 controls reading of the dictionary memory 6. Reference numeral 8a is a first recognition unit. The standard pattern read from 6 is compared with the standard pattern, and character recognition is performed using a pattern matching method.

Reference numeral 8b is the 211th identification section. Koo No. 211 Shikiku 8b
is the same as the first II recognition section 8a, but operates independently of the illumination recognition section 8a. Reference numeral 9 is an output buffer. This output buffer 9Ka recognition result is stored.

The above-mentioned components, except for the preprocessing section 2 and the dictionary memory 6, are connected by a path IOK. Also.

The photoelectric conversion section 1 and the two preprocessing sections are connected by signals ll5lIK. Nine, preprocessing section 2 and line buffer 3
are connected by a signal line group 12. In the front, the dictionary memory 6 and the dictionary control unit 7 are connected by a signal line group 1''AK.
Il! ! The identification section 8b is connected to the dictionary control section 7 by a signal line group 14.

Next, the contents stored in the dictionary memory 6 will be explained with reference to FIG. As shown in FIG. 2(a)K, in this embodiment, the dictionary memory 60 has three dictionaries Do,
The dictionary D0 for reading one handwritten character in which Ds and disease are stored is used to read and read handwritten characters in the font shown in FIG. 3(a)K, for example. This dictionary is stored in the area between & and Honchi of dictionary page 6 and address 1 and address O. Dictionary for reading printed characters is
For example, it is used when reading printed characters in the typeface shown in Figure 183(b). Jin's dictionary is stored in the area between area 8A111 of dictionary memory 6 and I-1 pond. The dot character reading dictionary is used, for example, when reading dot characters in a font as shown in FIG. 3(C). This dictionary storage dictionary memory 6
It is stored in the area between address 8A and address 18.

In addition, if it is necessary to read printed characters of two or more types of fonts, two or more types of printed character reading dictionaries may be provided.Similarly, it is necessary to read dot characters of two or more types of fonts. In some cases, two or more types of dot character reading p dictionaries may be provided.

Next, dictionary D0. The detailed structure of D1 and RI will now be explained. As an example, FIG. 2(b) shows the internal structure of a dictionary D0. As shown in FIG.
Six kinds of alphabetic characters and standard patterns P1 to Pn (symbols such as "-") are stored.

Tip 1 of each standard pattern P1 to Pn [K is the header pigeon]
Hn is added. Each header H1 to Hn contains the character code C8 to Cn of the character, and the data length (9 is the number of bits) of the corresponding standard pattern P1 to Pn, Bs to Bn.
, and other information. Other dictionaries and 1 have similar internal structures.

Next, with reference to FIG. 4, the detailed configuration of the dictionary control section s7 will be explained.As shown in FIG.
, dictionary address counter n, and character code detection circuit 7
4 is included. The input terminal group of the dictionary number register 71 is connected to the path 10. Furthermore, the output terminal group tlFW of the dictionary number register 71 is connected to the address input terminal group of the address memory 72. In this dictionary address 720i, the earliest application address 8Ai and the highest application address RAi of the dictionary Di are stored. However, at 9
Setting the dictionary number i in the dictionary number register 71K
Therefore, the dictionary DiO top address 8Ai and the final address EAs are read from the dictionary address memo 972.

The starting address SAi and ending address EAi of the dictionary Di read from the dictionary address memory 72 are supplied to a dictionary address counter 73. Then, the dictionary address counter 73 repeatedly counts between zeros from the first address 8Ai to the last address EAi. That is, the dictionary address counter na starts counting from the first address S entry i, counts at the last address EAii, and then starts counting again from the first address 8Ai. The count value of this counter 73 is
The signal is supplied to the address input paper group of the dictionary booklet 6 via the signal line group 13a (which is a part of the signal line group 13). Therefore, the contents of the dictionary Di are repeated from the dictionary memory 6.
It is read back. The contents of the dictionary DI read out from the dictionary memory 6 in this way are taken into the one-way dictionary control unit 7 via the signal group 13b (part of the signal line group 13), and the contents of the dictionary DI read out from the dictionary memory 6 in this manner are taken into the single dictionary control unit 7 via the signal group 13b (part of the signal line group 13), and the signal group 14a ( (Part of signal line group 14)
It is supplied to the ill-th recognition section 8a and the second m-th recognition section 8bK through. In the front, the character code detection circuit 74 is connected to the signal line group 1.
When character codes C1 to Cn appear on 3b, this is detected and a character code detection signal C0DE is generated. This signal C0DE is transmitted to the first recognition unit 8m and the 211th recognition unit 8b via the signal line 14b (which is part of the signal line group 14).
K is supplied.

The dictionary address counter n generates a signal Q sound when its count value reaches the leading address SAi.

This signal CI Bs dictionary Di O first O character code C1
The character code detection circuit 74 is informed that the character code is being sent onto the signal line group 13b. Second and subsequent character code C1
The detection lines ˜Cn are carried out in the character code detection circuit 74. At that time, in order to know the location of the next character code,
Data B, ~Bn included in each header 81 ~ expression
(data length of standard patterns P1 to Pn) is used.

Next, the 1st m! ! ! Shikibu 8a and 2nd il! Shikibu 8b
The detailed configuration will be explained below.6 Based on this embodiment, the first
Since the internal structure of Oribe 8o and 211th Intelligence Department 8bO is the same, from now on, if there is no need to distinguish between the two,
FIG. 5, simply referred to as recognition section 8, shows i! FIG. 8 is a diagram showing the internal configuration of the intelligence unit 8. FIG. As shown in the figure, the II recognition unit 8 includes a single character (tufa 801 and similarity calculation circuit 802).
It is included. As described below, - character buffer 80
1 stores a character pattern for one character to be recognized. The similarity calculation circuit 802 calculates this −character buffer 8
The similarity between the character pattern stored in 01 and the standard pattern sent through the signal line group 14a is calculated.

The obtained similarity is stored inside the similarity calculation circuit 802 and sent to the bus 10 in response to a request from the processor 4.

Note that the similarity calculation circuit 802 operates only when an enable signal IN, which will be described later, is applied.

Therefore, if the type of character pattern stored in the character buffer 801 (distinguishing between numbers, letters, symbols, etc.) is known in advance, the necessary standard pattern is sent out on the signal line group 14a. The similarity calculation circuit 802 can be operated only if t-. Furthermore, the similarity calculation circuit 802 generates a calculation end signal FIM that becomes low level when the similarity calculation is completed.

Next, a rounding circuit configuration for creating the above-mentioned enable signal will be explained. As shown in FIG.
is equipped with a first memory 803 and an eighth memory 804. If the number of bits of the 0 character code is m, then the first memory 803 and the second memory have 2m bits each (Il number of character codes). It has O storage area. Each storage area stores 1 bit of data. 1st memory 8
0B is in the trial start mode when the recognition command signal RECGN sent from the processor 4 through the bus 10 is at the 7-high level, and is in the write mode when it is at the low level. Further, the data input terminal of the first input terminal 803 is supplied with 1-bit data VvDATA sent from the processor 4 via the bus 10. On the other hand, the second memory 804 is in the read mode when the output signal of the AND gate 805 is at a high level).

If it is low level, it is the company write mode.) The two input terminals of $05 each have a signal R.
ECGN and signal FIN are applied. 2nd me 498
The expanded signal RECGN is applied to the data input terminal 04.

The first memory 803 and the jI2 memory 804 are addressed by an address counter 806.

This counter 806 is cleared when a clear command signal CLEAR is sent from the processor 4 via the bus 10, and counted up when a clock signal CLOCK is sent. Further, when the AND gate 807 generates the load command signal LOAD, the signal line group 14
The data being sent on a is loaded into counter 806. The AND gate 807 includes a recognition command signal REC.
GN and a character code detection signal C0DIC sent from the dictionary control section 7 are supplied.

The output of the first screen 803 is applied to an analog game 808. Further, the output of the second memory 804 is sent to the bus 10 and the inverter as a recognition end signal)W. The output signal of the inverter 809 is 808
is applied to A recognition command signal RECGN is also applied to the AND gate 808 . The output signal of the AND gate 808 is sent to the similarity calculation circuit 80 as an enable signal EN.
2.

The contents of the first memory 803 and the second memory 804 are initialized by the processor 4 prior to the start of recognition. At that time, the processor 4 recognizes the command signal RE.
Set CGN to Robel. Then, the first memory 803 and the second memory 804 become a book storage area. Also,
The AND gate 809 stops generating the enable signal ENo, and the AND gate 807 stops generating the load command signal LOAD. After this, the recognition unit 8 goes into a dormant state.Then, the processor 4 outputs a clear command signal CLEAR.
occurs.

In addition to this, the first frame 803 and the second frame 0
Data is written to location 11. Data WDATA written to the first memory 17803 is sent from the processor 4 via the bus IO. In addition, since the signal RECGN is at a low level, the second memory 804
O″′ is written.

When the writing to address 0 is completed, the processor 4 generates a count signal C0UNT and increments the count value of the column column by "1". From this K onwards, writing to address 1 is performed. Thereafter, data is written to all storage areas of the first memo I 7803 and the second memory 804 in the same manner.

The value of the data WDATA to be written in the first memory 803 is set to "1" if it is necessary to calculate the similarity for a standard pattern having a character code with the same value as the address of its storage area, otherwise @ 0"K. On the other hand, "O" is always written in the second memory 804.

When the initialization of the first memory 803 and the second memory IJ 804 is completed, the processor 4 sets the recognition command signal vol to a high level, and the first memory 803 and the second memory 804 enter the read mode. Also, anime games
) 807 generates a load command signal LOAD every time the character code detection signal C0DE is generated. Therefore, when a character code appears on the signal line group 14a, its value is loaded into the register 806 and the first message 806 is loaded.
03 and the contents of the corresponding storage areas in the second memory 8G4 are read out. First memo! J and gate 808 does not generate an enable signal EN;
That is, in that case, similarity calculation is not performed.

First memo! If ``11'' is read from J 803 and ``0'' is read from the second message, AND gate 8
08 generates an enable signal EN, and similarity calculation is performed. When the similarity calculation is completed, the calculation end partial FIN
becomes low level. This causes the second memory 804 to enter the write mode. Since the signal pseudo* is at a high level, @1'' is written to the second memory 804. In this way, each storage area in the second memo!7804 is filled with the corresponding standard pattern. 11" is written each time the similarity calculation for the same standard pattern is completed. Therefore, when the second similarity calculation is about to be performed for the same standard pattern, "1" is written from the second memory 804.
is read and l! ! A fiber end signal END is generated. This will notify processor 4 of the end of recognition.

Next, the overall operation of this embodiment will be explained.The OCR of this embodiment reads characters on a form one line at a time. Prior to reading each line, processor 4 accesses format table 5 to determine the location of the next character line to be read. According to the result, the processor 4 gives a high-speed conveyance command to the photoelectric conversion unit 1 to cause the form to be conveyed at high speed to the next line position.Then, the processor 4 gives a scan start command to the photoelectric conversion unit 1. Then, the photoelectric conversion unit 1 starts scanning the character pattern. Depending on the scanning method, the form may be conveyed at low speed during scanning. The photoelectrically converted character pattern is sequentially transmitted through the signal line 11 to the prefix [1s
Sent to 2. After the photoelectrically converted character pattern is quantized, it is subjected to preprocessing such as noise removal. It will be written. When the writing of character patterns corresponding to - digits is completed, the line buffer 3 notifies the processor 4 of this fact.

While the character pattern is being written to the line/buffer 3, the processor 4 accesses the format table 5 again and determines the font of the characters (handwritten, printed, dot) that make up the character line being scanned. (distinction) and select a dictionary to refer to.

The selected dictionary number i is written into the dictionary number register 71 of the dictionary control section 7. As a result, the dictionary memory 6
From then on, the contents of the dictionary DI are repeatedly read out. In addition,
0CRKTh of this embodiment does not allow characters with different fonts, such as handwritten characters and printed characters, to coexist in the same character line.

Next, the processor 4 accesses another 1K format table 5, and fills in the start and end positions of each field (product name field, unit price field, quantity field, etc.) included in the 0-character line during scanning, as well as the fields filled in. Check the types of characters (numbers, letters, symbols, etc.).

When the line buffer 3 is notified of the end of writing, the processor 4 cuts out the leftmost 0-characters from the one-digit character pattern stored in the line buffer 3.
At this point, the start position of the first field (leftmost field) read earlier from the format table 5 is referenced. Next, the processor 4 determines the character size and character pattern for one character extracted from the line buffer 3. Normalize line width. The normalized character pattern is loaded into the single character puffer 801 of the 1a identification section 8a. Thereafter, the processor 4 initializes the first memo IJ 803 in the first recognition unit 8a according to the type of character written in the first field. When the above processing is completed, the processor 4 sends a recognition end signal ECGN to the ill recognition section 8a.

At this point, the recognition operation in the first recognition section 8a is activated.

Next, the processor 4 cuts out and normalizes the character pattern of the second character. The normalized second character pattern is number 211! It is sent to the intelligence section 8b. Thereafter, in the same manner, character patterns cut out one after another are sent to the recognition section 8 that is not in operation.

When the recognition end signal END is received from the recognition unit 8.

The processor 4 determines the answer by referring to the similarity calculation results stored in the recognition unit 8, and outputs an output buffer 7. Write in A9.

When all characters in the first field have been recognized,
Recognition of the second field is started in the same manner. However, the contents written in the first memo 9803K at the time of initialization are changed depending on the type of characters written in the second field.

Above, the case where the present invention is applied to (3) of the pattern matching method has been explained, but the present invention also applies to the O
It is also applicable to CR. In that case, the processor 4 performs normalization on the extracted character pattern, and also performs geometric topological features (for example, blocks, loops, etc.).
A feature pattern is created by extracting features (such as strokes and unevenness) and creating a direction code string indicating the inclination direction of the character line edge, and the results are loaded into the single character puffer 801. Further, the dictionary memory 6 stores feature patterns that serve as expanded standards. Further, a correlator is used in place of the similarity calculation circuit 8020.

Further, in the above embodiment, nine examples were described in which two recognition units 8 were provided, but it is also possible to provide three or more recognition units.

In addition, in the above-mentioned Example 111, three dictionaries are provided depending on the character type (distinction between handwritten characters, printed characters, and dot characters). It is also possible to provide dictionaries for handwritten letters, handwritten symbols, printed numbers, printed letters, printed symbols, dotted numbers, dotted letters and dotted symbols.

As described in detail above, according to the present invention, a plurality of recognition units are connected to one
An OCR system that shares two dictionary memories is provided.

Furthermore, the recognition speed is fast, and it is also small and inexpensive.
R is provided.

[Brief explanation of drawings]

Fig. 1 is a configuration diagram of an embodiment of the present invention, Fig. 2 is a diagram showing the contents of a dictionary memory, Fig. 3 is a diagram showing an example of character types, and Fig. 4 is a diagram showing an example of character types.
The figure is a block diagram of the dictionary control section, and FIG. 5 is a block diagram of the recognition section. 1... Photoelectric conversion section 2... Pre-processing section 3...
- Line buffer 4...Control recognition processor 5...Format table 6...Dictionary memory 7...Dictionary control unit 8a
...1st II Knowledge Department 8b...2nd Knowledge Department 9.
...Output Buffer Patent Applicant Tokyo Shibaura Electric Co., Ltd. Representative Patent Attorney Kensuke Noriyuki (and 1 other person) Figure 1 Figure 2 ((1) (b) Figure 3 Figure 4

Claims (1)

[Claims] A plurality of recognition units, a dictionary memo 49, and a dictionary control unit. a recognition control unit; the dictionary control unit selectively reads out a plurality of standard patterns from the dictionary memory and supplies them to the plurality of recognition units in response to a command from the recognition control unit; The optical character is characterized in that character recognition is performed by selecting a plurality of 81I patterns from among the plurality of standard patterns in accordance with instructions from the recognition control unit. Read a lot
1 device.