JPS5824967A - Average circuit - Google Patents
Average circuitInfo
- Publication number
- JPS5824967A JPS5824967A JP12340881A JP12340881A JPS5824967A JP S5824967 A JPS5824967 A JP S5824967A JP 12340881 A JP12340881 A JP 12340881A JP 12340881 A JP12340881 A JP 12340881A JP S5824967 A JPS5824967 A JP S5824967A
- Authority
- JP
- Japan
- Prior art keywords
- reference signal
- circuit
- signal
- pulse
- data signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012935 Averaging Methods 0.000 claims abstract description 13
- 230000007423 decrease Effects 0.000 claims description 3
- 230000037303 wrinkles Effects 0.000 claims description 2
- 230000003247 decreasing effect Effects 0.000 abstract description 4
- 238000000034 method Methods 0.000 description 11
- 230000002159 abnormal effect Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 2
- 230000002547 anomalous effect Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/18—Complex mathematical operations for evaluating statistical data, e.g. average values, frequency distributions, probability functions, regression analysis
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Data Mining & Analysis (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Life Sciences & Earth Sciences (AREA)
- Operations Research (AREA)
- Probability & Statistics with Applications (AREA)
- Bioinformatics & Cheminformatics (AREA)
- Algebra (AREA)
- Evolutionary Biology (AREA)
- Databases & Information Systems (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Bioinformatics & Computational Biology (AREA)
- Complex Calculations (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、数値（デジタル量）として検出されたデータ
を平均化するための平均化回路に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an averaging circuit for averaging data detected as numerical values (digital quantities).
従来、とＯＳＯデータを平均化する場合には、データを
アナログ量に東換して積分回路を通して平均化する方法
や、デジタル量の瞬時値をｍ個積算し、それを瞬時値Ｏ
積算数協で割算する単純平均法、各々の瞬時値を２乗し
て求める２乗平均法、一定量の瞬時値を移動しながら求
める移動平均法等が多く用いられてめる。Conventionally, when averaging OSO data, one method is to convert the data into an analog quantity and average it through an integrating circuit, or to integrate m instantaneous values of digital quantities and calculate it as the instantaneous value O.
Many methods are used, such as the simple average method that divides by a multiplication factor, the root mean square method that calculates by squaring each instantaneous value, and the moving average method that calculates while moving a fixed amount of instantaneous values.
しかしながら、これらは総べて瞬時値の絶対値を平均化
するようにしており、従って、瞬時値に雑音等による異
常値が発佑するような場合には別途この異常値を除去す
る対策を必要とし、回路及び方法が複雑化するという欠
点があり九。However, all of these methods average the absolute value of the instantaneous value, so if an abnormal value occurs in the instantaneous value due to noise etc., a separate measure is required to remove this abnormal value. However, the disadvantage is that the circuit and method become complicated.
本発明は、上述し九従来の欠点に鍾み、極めて簡単な構
成によってデータＯｊＦ均化を高精度に行い得る平均化
回路を提供しようとするもので、データ信号と基準信号
とを比較し、そのデジタル量の大小に応じて基準信号を
データ信号に近似すべく一定数づつ増減させるよ゛うな
機能を持九せたことを善黴とするものである。The present invention addresses the above-mentioned nine conventional drawbacks and provides an averaging circuit that can perform data OjF equalization with high precision using an extremely simple configuration. The advantage of this device is that it has a function of increasing or decreasing the reference signal by a fixed number in order to approximate the data signal in accordance with the magnitude of the digital quantity.
以下、本発明を更に詳細にＷ！Ｌ羽するに、第１閣に示
す平均化回路は、外部からのデータを針黴宜たは記憶し
てデータ信号としてデジタル出力する針数回路ｌと、基
準信号をデジタル出力する加減算−１＆２と、加算用及
び減算用のゲート−路５６゜５ｋを介して加減算回路２
に接続され、皺加減算關織にシける基準信号をコントロ
ールする丸め□ 一定数のパルスを発生するパルス発生
１１３と、上記計数回路ｌからのデータ信号と加減算−
路２からの基準信号との計数値を比較し、その大小に応
じていずれかのゲート−路５ｇ 、 ｓｈを−いてパル
ス発生１Ｂ３からのパルスを加減算回路２に入力さ破る
ことによ）、このパルスと基準信号とを加減算して該１
単信号をデータ信号に近似するようにパルスの数だけ段
階的に増減せしめる比軟回路４とによって構成されてい
る。The present invention will be described in more detail below. In other words, the averaging circuit shown in the first panel consists of a needle count circuit l that stores external data and digitally outputs it as a data signal, and an addition/subtraction circuit l that digitally outputs a reference signal. , addition and subtraction circuits 2 through addition and subtraction gates 56°5k.
A pulse generator 113 that generates a constant number of pulses is connected to the circuit 113, which controls the reference signal used in the wrinkle addition/subtraction process, and a data signal from the counting circuit 1 and the addition/subtraction process.
By comparing the count value with the reference signal from path 2, and inputting the pulse from pulse generator 1B3 to addition/subtraction circuit 2 by inputting the pulse from pulse generation circuit 1B3 to either gate path 5g or This pulse and the reference signal are added and subtracted to
It is constituted by a ratio soft circuit 4 that increases or decreases the number of pulses step by step so that a single signal approximates a data signal.
次に、上述した平均化回路０作用を第２１Ｉに基づいて
説明する。Next, the above-mentioned averaging circuit 0 operation will be explained based on the 21st I.
いま、針数回路ｌから第２因におけるムＯ如自データ信
号が出力され、加減算回路２から出力される基準信号Ｂ
Ｏ初期値がＯであると仮定した場合、これらのデータ信
号人と基準信号ＢＯｔｔａ値は比軟回路４において比較
されるが、時間Ｔ拳〜Ｔ１の間はデータ信号の方が大き
いため比軟回路４によ）加算用のゲート−路５ｍが開か
れ、加減算−路２にパルス発生ｍ３からのパルスが入力
されて基準信号ｏｔｔ数値とパルスの加算が行われ、ａ
阜儒号ＢはパルスＯ数Ｍだけ段階的に増加しながらデー
タ信号ムに近似していく、Ｔ１において基準信号がデー
タ信号に近似するとゲート−路５−が閘じ、基準信号は
その計数値１二保持される。Ｔ意にシーて。Now, the stitch count circuit 1 outputs the data signal of the second factor, and the reference signal B is output from the addition/subtraction circuit 2.
Assuming that the initial value of O is O, these data signals and the reference signal BOtta value are compared in the ratio soft circuit 4, but between time T1 and T1, the data signal is larger and therefore the ratio soft circuit 4 is compared. The addition gate path 5m is opened by the circuit 4, and the pulse from the pulse generation m3 is input to the addition/subtraction path 2, and the addition of the reference signal ott numerical value and the pulse is performed.
Fuyu No. B gradually increases by the number M of pulses and approximates the data signal M. When the reference signal approximates the data signal at T1, the gate 5 is closed, and the reference signal becomes the counted value. 12 held. Please see T willingly.
データ信号の計数値が増大すると、上記の場合と同様に
して基準信号の計数値もこれに追随して増大する。When the count value of the data signal increases, the count value of the reference signal also increases accordingly in the same manner as in the above case.
逆に、Ｔｓ１ｍおいてデータ信号のｌ＋数値が低下して
基準信号の計数値よ夕小さくなると、比軟回路４でこれ
が検出されて減算用のゲート１路Ｓ６が開き、基準信号
の計数値とパルス発生器３がらの入力パルスとの間で減
算が行われて基準信号の計数値祉入力パルスの数Ｍだけ
順次減少していく。Conversely, at Ts1m, when the l+ value of the data signal decreases and becomes smaller than the count value of the reference signal, this is detected by the ratio soft circuit 4, and the gate 1 path S6 for subtraction opens, and the count value of the reference signal and Subtraction is performed between the input pulses from the pulse generator 3 and the counted value of the reference signal is sequentially reduced by the number M of input pulses.
従って、データ信号Ａに１３〜１４間に見られるような
異常値が含まれている場合でも、基準信号Ｂはパルスの
数Ｍだけ変化することになるため、異常値に伴う誤差は
極めて小さい−のとなる。Therefore, even if the data signal A contains an abnormal value such as that seen between 13 and 14, the reference signal B will change by the number M of pulses, so the error associated with the abnormal value will be extremely small. becomes.
本発明の平均化−路は、各種の用途に利用することがで
きるが、特に超音波による流体の流速、流量郷の一定に
適用することができる。即ち、従来の超音波による流速
調定手法により針側された流速の瞬時値は、水の流れに
よる変動、例えば偏流や渦等による影響や、外部雑音や
媒質の音速変動等局部的変動の影響を受は轟く、異常デ
ータが含まれている場合が多く、従って見かけ上。流れ
の変動を平均化する必要がある０本発明ＯＸＦ均化回路
は、この場合の瞬時値の針数値の絶対値に関係なく、基
準信号との計数値の大小とそ０鯛度。The averaging path of the present invention can be used for various purposes, and is particularly applicable to constant fluid flow velocity and flow rate due to ultrasonic waves. In other words, the instantaneous value of the flow velocity adjusted to the needle side by the conventional ultrasonic flow velocity adjustment method is subject to fluctuations due to water flow, such as drifting or vortices, and local fluctuations such as external noise and sound speed fluctuations in the medium. The receiver often contains anomalous data, thus making it appear more apparent. The OXF equalization circuit of the present invention, which needs to average out fluctuations in the flow, is capable of measuring the magnitude of the counted value and the degree of deviation from the reference signal, regardless of the absolute value of the instantaneous needle value in this case.
多少によって瞬時値の計数値を平均化し得るもので、デ
ータの平均化は勿論、異常値も有効に除去し得る特徴を
有して居凱流速６；比例し九計歇値ルを第１図の針数１
路ｌに投入し、前述し九平均化の手法にょシ極めて簡単
なａｍ構成によってデータの平均化を容易に行うことが
できる。It is capable of averaging instantaneous counts to some extent, and has the feature of not only averaging the data but also effectively removing abnormal values. Number of stitches: 1
In addition to the above-mentioned nine averaging method, the data can be easily averaged using an extremely simple am configuration.
このように本発明によれば、データ信号と基準信号のデ
ジタル量の大小の比較だ叶でデータ信号を平均化するこ
とができ、従ってその一路構成が極めて簡単である等０
４１黴がある。As described above, according to the present invention, it is possible to average the data signal by comparing the magnitude of the digital amount of the data signal and the reference signal, and therefore the one-way configuration is extremely simple.
There is 41 mold.
第１図は本発明に係る平均化ｉｉｉ＊ｏ構成図、第２図
はその作用を説明するための線図である。
１・・・針数囲路、 ２・・・加減算回路、３・・・
パルス発生器、４・・・比較回路。
特許出願人 株式会社東和製作所
代理人弁場士 林 宏、′ｊ、（外１名もト
ジ
第１図
第２図FIG. 1 is a block diagram of the averaging iii*o according to the present invention, and FIG. 2 is a diagram for explaining its operation. 1... Stitch number circuit, 2... Addition/subtraction circuit, 3...
Pulse generator, 4...comparison circuit. Patent applicant: Towa Seisakusho Co., Ltd. Agent: Hiroshi Hayashi, 'j, (one other person also represents Towa Seisakusho Co., Ltd.
Claims (1)
タ信号としてデジタル出力する針黴崗路と、基準信号を
デジタル出力する加減算−路と、皺加減算回路からの基
準信号をコントーールする丸めのパルスを発生するパル
ス発生器と、上記針数回路からのデータ信号と加減算１
路から０１準信号とを比較し、そのデジタル量の大小に
応じて加減算回路にパルス発生器からのパルスを入力さ
せて基準信号と加減算させることによＪＰａ率信号をデ
ータ信号に近似すべく一定数づつ増減せしめる比較回路
とを備え、データ信号と基準信号と０大小０みにより一
定数だけ順次データ信号に基準信号値を近似させ平均化
することを善黴とする平均化−路。! , The needle IILt circle stores data from the outside and outputs it digitally as a data signal, the addition/subtraction circuit digitally outputs the reference signal, and the rounding pulse that controls the reference signal from the wrinkle addition/subtraction circuit. The pulse generator that generates, the data signal from the above stitch count circuit, and addition/subtraction 1
The JPa ratio signal is compared with the 01 quasi-signal from the path, and the pulse from the pulse generator is input to the addition/subtraction circuit according to the magnitude of the digital quantity, and the pulse is added/subtracted from the reference signal. The averaging circuit is equipped with a comparator circuit that increases/decreases the value in increments of the data signal, the reference signal, and the value of the reference signal by a predetermined number based on the data signal, the reference signal, and the magnitude of 0.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12340881A JPS5824967A (en) | 1981-08-06 | 1981-08-06 | Average circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12340881A JPS5824967A (en) | 1981-08-06 | 1981-08-06 | Average circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5824967A true JPS5824967A (en) | 1983-02-15 |
Family
ID=14859809
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12340881A Pending JPS5824967A (en) | 1981-08-06 | 1981-08-06 | Average circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5824967A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6805995B2 (en) | 1999-09-16 | 2004-10-19 | Matsushita Electric Industrial Co., Ltd. | Sealed cylindrical nickel-metal hydride storage battery |
| US10243177B2 (en) | 2011-03-25 | 2019-03-26 | Gs Yuasa International Ltd. | Cylindrical battery and battery electrode structure |
-
1981
- 1981-08-06 JP JP12340881A patent/JPS5824967A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6805995B2 (en) | 1999-09-16 | 2004-10-19 | Matsushita Electric Industrial Co., Ltd. | Sealed cylindrical nickel-metal hydride storage battery |
| US10243177B2 (en) | 2011-03-25 | 2019-03-26 | Gs Yuasa International Ltd. | Cylindrical battery and battery electrode structure |
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