JPS5823992B2 - solid state imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state imaging device used in television cameras and the like.

FIG. 1 is an explanatory diagram of a typical solid-state imaging device.

Photoelectric conversion elements each consisting of a photodiode 1 and an MO8 type transistor 2 whose source is the photodiode 1 are arranged in a line in the vertical direction of the image pickup screen, corresponding to each pixel, for a predetermined number of pixels. The photoelectric conversion element rows are grouped together by a signal line 5, and each row is connected to a switch MO8.
It is connected to an output terminal 7 via a type transistor 3 and a signal line 6.

For example, a horizontal scanning port 7 consisting of an MO8O8 type register. :'4. ．． 9 and a vertical scanning circuit 10, the horizontal scanning circuit 9 controls the gate of the MOS transistor 3 through a signal line 8 to perform horizontal scanning, and the vertical scanning circuits 10 are arranged in a line in the horizontal direction of the imaging screen. Vertical scanning is performed by directly controlling the gates of the MOS transistors 2 of the photoelectric conversion elements for each column by the signal line 4.

In the following description, an n-channel type device using electrons as a signal charge will be described, but by reversing the conductivity type and polarity, a p-channel type device using holes as a signal charge can be explained in exactly the same manner.

Electrons generated by light are stored in the junction capacitance of the photodiode 1.

During reading, a positive scanning pulse issued by the vertical scanning circuit 10 causes the MOS transistor 2 to conduct through the signal line 4, and a positive scanning pulse issued from the horizontal scanning circuit 9 through the signal line 8 sequentially causes the MOS transistor 3 to conduct.

After being scanned once in this way, until the next scan, the light incident on the pixel is converted into an electric charge by the photodiode 1, and the amount accumulated in the junction capacitance of the photodiode 1 is converted into a signal charge. are read out sequentially.

FIGS. 2 and 3 are diagrams showing the cross section and potential of a photoelectric conversion element of a conventional solid-state imaging device.

FIG. 2a is a cross-sectional view of the photoelectric conversion element taken along a plane in the horizontal direction (of the screen).

The p-type Si substrate 11 and the n-swelled diffusion layer 12 constitute a pn junction type photodiode 1 (FIG. 1), and the n-swelled diffusion layer 1
2 constitutes a MOS transistor 2 (FIG. 1) together with an n-swelled diffusion layer 13 and a gate electrode 14 made of polycrystalline Si or the like;
The diffusion layers 12 and 13 and the gate electrode 14 operate as a source, a drain, and a gate electrode, respectively.

In this figure, 15 is the 5i02 film, 16 is the aluminum signal line (signal line 5 in Figure 1), 17 is the incident light, and 18 is the Si substrate 1.
These are electrons (from electron-hole pairs) generated by the light 17 deep inside the hole.

Among the electron-hole pairs generated by the light 17, electrons flow into the n-swelled diffusion layer 12, and when a vertical scanning pulse is applied to the gate electrode 14, they are led out to the signal line 16 via the n-swelled diffusion layer 13.

The electrons caused by the light 17 are not only in or near the n-swelled diffusion layer 12, but also in the Si substrate 1, which is much thicker than the diffusion layer 12.
This phenomenon also occurs deep within the interior of 1, as shown by 18 in the figure.

The amount of electrons dI (C/s) generated per thickness dXcrfL at depth XcrfL per light amount IW is expressed by the following equation.

dI'-1081λe-αxdX (1) λ is the wavelength of light (μm), α is the extinction coefficient of the Si substrate (CIrL
-').

Light of three primary colors: blue, green, and red (wavelength λ is 0.45μ each)
m, 0.55 μm, 065 μm), α is approximately 2.4×10”, respectively.

7.1 X 10+3, 3.4 X10+3 (crfL
').

As can be seen from equation (1), the number of electrons generated increases in proportion to the wavelength, and light with a longer wavelength is less absorbed on the way and reaches deep into the Si substrate to generate electrons.

As a result, it exhibits spectral characteristics that are extremely sensitive to red and infrared visible light.

In addition, long-wavelength light or light that is not long but strong reaches deep into the Si substrate and generates electrons, which causes a decrease in resolution and blooming, a phenomenon in which bright collapsed areas and bright bright lines are generated. Damage the screen.

Tungsten lamps, which have traditionally been widely used as imaging light sources, have many long-wavelength components, and the mismatch in spectral characteristics for this light source can be corrected by using a pre-filter that absorbs long-wavelength light. The reduction in resolution and the occurrence of blooming due to wavelength light or strong light are difficult to manage, and the practical application of solid-state imaging devices has been hindered.

Similar to the case of image pickup tubes, in the case of a single-chip color imaging device in which three primary color filters arranged in a mosaic pattern are stacked on a single solid-state imaging device, photoelectrons generated by light incident on a red light diode are A new problem arises in that the color information of the electric signal flowing into the adjacent photoelectric conversion element for other color light and being extracted is mixed, causing so-called color mixing.

The shortcomings of conventional solid-state imaging devices, such as blooming and resolution, will be explained in more detail.

FIG. 3a is a cross-sectional view of the photoelectric conversion element taken along a plane in the vertical direction (to the screen), showing the light-receiving portions of the adjacent photoelectric conversion elements n-swelled diffusion layers 12 and 12. p' type Si substrate 11, 5
It shows electrons 108° and 109 (electron/hole pairs) generated by the light 17 in the i02 film 15, the light 17, and the Si substrate 11.

The n-swelled diffusion layers 12, 12', etc. are each formed on a p-type Si substrate 11.
Together, they form a photodiode, converting incident light into charges and storing them in the diode's junction capacitance.

The accumulated charge is extracted as an electrical signal by scanning.

Points A and B are located at the positions shown in FIG. 3 for the purpose of explaining the operation.

Select C.

The state of the initial potential between these three points is shown by a curve 111 in FIG. 3 and by a curve 113 in C of the same figure.

The case where the light 17 is incident only on the n-swelled diffusion layer 12 will now be described.

Holes generated in the n-swelled diffusion layer 12 by the light 17 become p-type S
Electrons 108 flowing into the i-substrate 11 and generated within the p-type Si substrate 11 flow into the n-swelled diffusion layer 12, and A
A photoelectric reaction occurs in which the potential at the point rises as indicated by an arrow 110.

The above is normal operation, but in the case of solid-state imaging devices, multiple photoelectric conversion elements are arranged closely on a single substrate, so the incident light 17 may contain long wavelength components or be strong. In this case, the light 17 penetrates deeply into the p-type Si substrate 11 and causes a flow of charges other than those described above.

That is, electrons 1 generated in the Si substrate 11 by the light 17
08 is generated by diffusion (very close to the n-swelling diffusion layer 12), unless the generation location is very close to the n-swelling diffusion layer 12.
reach.

In the vicinity of the n-swelling diffusion layer 12, the n-swelling diffusion layer 12 and the Si substrate 1
This is aided by the drift electric field due to the diffusion potential difference between 1 and 1.

This range depends on the potential difference and the impurity concentration of the p-type Si substrate 11, but is usually about several micrometers, and diffusion is predominant at deeper depths.

In this case, something like the electron 109 that diffuses in the direction of the adjacent n-swelled diffusion layer 12' is sure to occur.

As shown in FIG. 3, from point B, which is quite deep in the Si substrate, to point C in the n-swelled diffusion layer 12',
As in the case of reaching point A in the n-swelling diffusion layer 12, there is no barrier to the potential, and the only difference between the two is the distance.

If point B is deep in the Si substrate, naturally the difference in the number of electrons flowing from there into the n-swelled diffusion layer 12, 12' becomes smaller.

In other words, the resolving power of the solid-state imaging device is reduced.

As described above, in the case of a single-chip color imaging device in which adjacent photoelectric conversion elements attempt to store different color information, information of different color lights will enter, resulting in color mixing.

Needless to say, as improvements in resolution or colorization of solid-state imaging devices are made, the smaller the pixels and therefore the corresponding photoelectric conversion elements become, the smaller the difference in distance between AB and BC becomes, and this problem becomes more serious.

Furthermore, even when the light 17 is simply strong, the potential of the n-swelled diffusion layer 12 represented by point A increases and eventually becomes equal to the potential of the Si substrate 11 represented by point B.

Normally, this state is treated as if the photodiode that performs the storage function is saturated.

However, to be more precise, when the intensity of the light 17 is large, the holes generated in the n-swelled diffusion layer 12 and the electrons generated in the Si substrate 11 are affected by the diffusion electric field at the p-n junction.
It continues to flow as a photocurrent.

As a result, the majority carriers in the n-type diffusion layer 12 become excessive, and the potential at point A becomes higher than the potential at point B, as shown by potential curve 112 in FIG. 3 or potential curve 114 in FIG. 3C.

This is equivalent to applying a forward bias to the pn junction, and therefore electrons, which are majority carriers, are injected from the n-swelled diffusion layer 12 into the p-type Si substrate 11.

Since the amount of injection follows the potential difference between points A and B, the potential increase at point A stops when the intensity of the light 17 or the photocurrent generated thereby is balanced.

That is, if the intensity of the light 17 is sufficiently large, the potential at point A will be higher than the potential at point B.

This phenomenon is the same as the photoelectric effect in solar cells and the like.

As shown in FIG. 3C, the injected electrons 119 are
They are minority carriers in the Si substrate 11, and are diffused to a point C, that is, n of an adjacent photoelectric conversion element, as shown by an arrow 117.
It flows into the swelling diffusion layer 12'.

Furthermore, as shown by potential curves 112 and 114, the injected electrons generate an electric field within the Si substrate 11 that moves the electrons away from the n-swelled diffusion layer 12, albeit slightly.
The adjacent n-swelled diffusion layer 1 is smaller than the case simply due to diffusion.
2' (for example, the electron 118 shown in Figure 3b)
) increase the ratio of

In particular, due to the interface effect between the S102 film 15 and the Si substrate 11, the potential for electrons on the surface of the Si substrate 11 is more likely to drop than inside the Si substrate 11, but in this case, a path for the injected electrons is created on the surface of the Si substrate 11. , efficiently saturates the adjacent n-swelled diffusion layer, and furthermore continues to forward bias the pn junction.

As an image signal, a so-called pluming occurs in which a white area spreads out even though a point-like light spot is transmitted.

As mentioned above, FIG. 2 shows a photodiode constituting one photoelectric conversion element and a MO8I-
The cross section of the Lanristor is shown in a, and the potential state of this part is shown in c.

As shown in Figure a, three points E and F are selected as representative points, and the state of the initial potential between these three points is determined by the midplane line 131. It is shown by curve 133 in c.

The outflow and mixing of photoelectrons between adjacent photodiodes has been described with reference to FIG. 3, but exactly the same thing occurs in the portion shown in FIG.

Photoelectrons generated deep inside the Si substrate 11, for example at point E, by the long wavelength component of the light incident on the n-swelled diffusion layer 12 constituting the photodiode, are generated according to the ratio of the distance between DEs and the distance between DEs.
It flows out into the n-swelled diffusion layer 13.

As a result, when a signal from another photoelectric conversion element sharing the signal line 16 (signal line 5 in FIG. 1A) is being read out, a photoelectronic signal due to light incident on the n-swelled diffusion layer 12 is mixed in.

Further, as the intensity of the incident light increases, the number of photoelectrons of this type due to diffusion from the Si substrate 11 represented by point E increases approximately in proportion to the intensity of the incident light. The pn junction formed by this becomes a forward bias, and a number of electrons approximately proportional to the amount of incident light are injected from the n-swelled diffusion layer 12 into the Si substrate 11.

This pattern is shown by potential curves M132 and M134, respectively, in FIG. 2c.

As is clear from FIG. C, majority carrier electrons 139 flow from the n-swelled diffusion layer 12 into the n-swelled diffusion layer 13.

As a result, as an image signal, when strong light is irradiated on the photoelectric conversion element of one pixel, a bright line appears on the screen as if the light was irradiated on all the photoelectric conversion elements that share the signal line. A blooming phenomenon unique to the device occurs.

The effect of electron injection from the n-swelling diffusion layer 12 to the n-swelling diffusion layer 13 (the same applies to the case shown in FIG. 2) is as follows.
n-swelled diffusion layer 12 as emitter, Si substrate 11 as base, n
This is usually performed more efficiently than the relationship between collector current and emitter current in a lateral bipolar transistor having the swelling diffusion layer 13 as the collector for the following two reasons.

The first reason is that n
Even though a bias voltage is applied to the gate electrode 14 to cut off the channel due to a change in threshold voltage due to an increase in the potential of the swelling diffusion layer 12, conduction occurs between the gate electrode 14 and the n-swelling diffusion layer 13, which becomes the drain, and the n-swelling diffusion layer 12 becomes conductive. The problem is that electrons are drawn out until the potential of the diffusion layer 12 drops to eliminate the change in threshold voltage.

The second reason is that the potential on the surface of the Si substrate 11 under the gate electrode 14 is usually lower than the potential inside the Si substrate 11 even when the MOS transistor is in a non-conducting state.

Therefore, the SiO □ between the photodiodes shown in FIG.
As in the case of the film 15 under the film 5, a path is created for the injected electrons, and the injected electrons efficiently flow out to the n-swelled diffusion layer 13.

In order to suppress these effects, other than making the non-conducting bias applied to the gate electrode 14 sufficiently negative (specifically, reducing the potential within the Si substrate 11 to the gate electrode 14)
However, it is difficult to generate such a negative voltage by a scanning circuit provided on the same substrate.

Even if it becomes possible to apply a sufficient negative voltage to the gate electrode 14, only the current flowing as the aforementioned lateral bipolar transistor will inevitably flow out.

Furthermore, in conventional solid-state imaging devices, the Si substrate 11 is a direct component of the photodiode 1 and the MOS transistor 2 (both shown in Figure 1), and influences the characteristics of the two elements. It is inevitable that there will be local fluctuations of 10% or more).

This non-uniformity originates from the manufacturing method of single-crystal Si, and in order to keep this non-uniformity small, one must be prepared for the Si substrate 11 to become extremely expensive.

On the other hand, in order to secure a sufficient number of pixels in solid-state imaging devices, the chip becomes extremely large compared to ordinary ICs, and the adverse effects of uneven impurity concentration on the Si substrate and uneven characteristics of each element are serious, making it difficult to put into practical use. This is one of the causes of inhibition.

It is an object of the present invention to provide a solid-state imaging device that eliminates various drawbacks of conventional solid-state imaging devices, such as poor spectral sensitivity characteristics, reduced resolution and blooming when using long wavelength light or high light intensity, and uneven image quality in various parts of the screen. purpose.

In order to achieve the above object, in the present invention, a semiconductor layer (hereinafter referred to as a well) having a conductivity type opposite to that of the semiconductor substrate is provided on the surface of the semiconductor substrate, and a bipolar transistor structure is formed in the vertical direction. A reverse bias voltage applying means was provided between the semiconductor substrate and the photoelectric conversion element group was arranged in this well soil.

FIG. 4 is a diagram showing an embodiment of the present invention.

A p-type well 21 is provided on an n-type Si substrate 31, and this well 21 is connected to the Si substrate 11 of the conventional structure (FIGS. 2 and 3).
, a pn junction type photodiode is configured, and n
The swelling diffusion layer is the emitter, the well 21 is the base, and the n-type Si
A vertical bipolar transistor (corresponding to a common base) is configured with the substrate 31 as the collector, and at the same time MO8I
- A photoelectric conversion element for one pixel is formed by the n-swelled diffusion layer 22 which becomes the source of the run lister, the n-swelled diffusion layer 23 which becomes the drain, and the gate electrode 24.

A reverse bias is applied between the well 21 and the Si substrate 31 by a power source 30 via a p-type diffusion layer 32 for making ohmic contact and an electrode 36 made of a good conductor such as Ad.

Instead of the p-type diffusion layer 32, an n-type diffusion layer may be used.

Since the junction with the well 21 is in the forward direction, it is possible to apply a predetermined bias.

The present invention will be explained in detail with reference to FIGS. 5 and 6 showing the cross section and potential of the photoelectric conversion element and its vicinity.

FIG. 5a is a sectional view taken along a plane in the vertical direction (of the screen) of two adjacent photoelectric conversion elements according to the present invention;
, 22' are n-swelled diffusion layers that constitute a pn junction photodiode in the light receiving portion of the adjacent photoelectric conversion element and also serve as a source of a MOS transistor.

For explanation, representative points G, H, LJ, L as shown in the figure
, and the state of the potential at each of these points is shown in Figure 5, c.

Since a reverse bias is applied between the p-type well 21 and the n-type Si substrate 31 by the power supply 30, the n-swelled diffusion layer 22
Light incident on the diffusion layer 22 generates photoelectrons that participate in the signal only within the diffusion layer 22 or within the thin well 21 below the diffusion layer 22.

Since electrons generated within the Si substrate 31 by long wavelength light or strong light are majority carriers within the Si substrate 31,
As can be seen from FIG. 5, for example, when generated at point 2, it cannot cross the high barrier caused by the well and cannot move to point G or point J.

Since the well 21 under the n-swelled diffusion layer 22 is thin, the diffusion electric field from the n-swelled diffusion layer 22 acts as a drift electric field for the photoelectrons generated here, and the photoelectrons diffuse into the n-swelled diffusion layer 22'. The probability is extremely small.

Furthermore, the drift electric field from the Si substrate 31 acts, and photoelectrons that are not directed toward the n-swelled diffusion layer 22 flow into the Si substrate 31.
It no longer goes toward the swelling diffusion layer 22'.

Therefore, it is possible not only to correct the spectral characteristics of a solid-state imaging device using a Si substrate with high sensitivity to long-wavelength light, but also to avoid deterioration in resolution due to signal leakage to adjacent photoelectric conversion elements.

Due to strong incident light, the potential of the n-swelled diffusion layer 22, similar to the case shown in FIG. 3, changes to the potential curve shown in FIG. 152 and 154, and surplus electrons are injected into the well 21.

However, most of the injected electrons flow out into the Si substrate 31 over the thin well 21 under the n-swelled diffusion layer 22 because the vertical bipolar transistor based on the well becomes conductive (6).

Furthermore, even a small number of electrons directed toward the adjacent n-swelled diffusion layer 22' have a considerable amount of components directed toward points within the Si substrate 31, for example, in the well 21 along the way.

In the end, the number of electrons that can reach the n-swelled diffusion layer 22' is extremely small.

Furthermore, if the reverse bias between the Si substrate 31 and the well 21 by the power source 30 is made sufficiently large, the well 21 in the portion between the n-swelled diffusion layer 22 and the Si substrate 31 will be depleted, and the By lowering the barrier itself, it is possible to limit the increase in the potential of the n-swelled diffusion layer 22 and suppress the injection of electrons into the well.

In this way, blooming between photoelectric conversion elements can be completely prevented.

FIG. 6a is a cross-sectional view of the photoelectric conversion element taken along a plane in the horizontal direction (of the screen), and representative points M and N are shown for explanation.
, P, Q, R, and S are selected, and the state of the potential at each of these points is shown in Figure 6c.

For example, when strong light is incident, the point M in the n-swelled diffusion layer 22
The potential of is expressed as curve 172. in Figure 6. Although the electrons may be pushed to the state shown by the curve 174 in c, most of the electrons are transferred to the point M where the well 21 is thin due to the vertical bipolar transistor function as in the case of FIG.
It is efficiently carried away to the Si substrate 31 along the path -pN→P (Figure b).

A small number of electrons may take the path to point M-PR as shown in Figure C, but a considerable number of them take the path to point R-+S on the way and go to the Si substrate 31. Sisters,
In the end, the n-swelled diffusion layer 2 becomes a drain along the path of point M-R-Q.
The number of electrons that reach 3 is extremely small.

In other cases, the Si substrate 3
1 (point P inside) and the well 21 (point N inside) do not flow into the diffusion layer 23 (point Q inside) that becomes the drain, and furthermore, the Si substrate 31 and the well 21 due to the power source 30 By increasing the reverse bias between them, the potential at point N can be lowered and electron injection itself from the n-swelled diffusion layer 22 into the well can be suppressed, and vertical line blooming can be completely prevented.

Furthermore, by making the scanning circuit that generates the voltage applied to the gate electrode 24 independent of the well 21, it becomes possible to arbitrarily select the voltage relationship between the well 21 and the gate electrode 24, and the variable bias value of the power supply 30 can be adjusted. By this, the potential under the gate electrode 24 can be set to a desired level (flat band or accumulation state).

Specifically, the scanning circuit may be formed using a p-channel type element in the Si substrate 31, or may be formed using an n-channel type element in a well separate from the well 21.

Further, the horizontal switch MOS transistor 3 (FIG. 1) is formed as an n-channel element in the well 21 in which the photoelectric conversion element group is formed, or as a p-channel element on the Si substrate 31. Alternatively, an n-channel type element may be formed in an independent well.

As can be seen from the above description, the larger the reverse bias from the power source 3o, the greater the effects of preventing blooming and resolution reduction, suppressing long wavelength light sensitivity, etc.

Electronic control of spectral sensitivity is also possible by bias control.

The impurity concentration and thickness of the p-type well 21 are the same as the n-swelling diffusion layer 22.
, 23, desired spectral characteristics, and applied reverse bias value.

Junction capacitance is approximately proportional to the square root of the impurity concentration of the well.

The thinner the thickness, the easier it is to suppress the sensitivity to long wavelength light, and the value of the reverse bias increases approximately in proportion to the product of the impurity concentration and the square of the thickness.

For example, the impurity concentration of the well is I x 1016/crl
, the thickness is 4 μm.

When the impurity concentration of the Si substrate is 1xlO''/i, the spectral characteristics are almost flat when the reverse bias is IOV, and no pluming occurs even for deer light that is about 1,000 times the saturated light amount of the junction capacitance.

If the scanning circuit is formed on the Si substrate 31 together with the anti-diffusion layer 32, a p-channel type can be obtained, and if a well 21 or a similar well is provided and formed in the same process as the photoelectric conversion element, an n-channel type can be obtained. Since there are no particular points to be noted, the following description of the manufacturing method will be given only for the photoelectric conversion section.

FIG. 7 is a manufacturing process diagram of one embodiment of the present invention described above.

(a): A single crystal Si substrate 41 with an n-type impurity concentration of about 1015/ffl is thermally oxidized to form a Si substrate with a thickness of about 05 μm.
O2 film 42 film type 2, then SiO2 film 42 film type 2
Open a hole in a predetermined pattern corresponding to a hole made of boron (B
) 40 is ion-implanted to form an ion-implanted layer 43.

The driving energy is an example. For example, at 50 KeV, the implantation amount is, for example, 4×10 12 /d.

(b): B of the ion implantation layer 43 is thermally diffused to a thickness of 4 μm.
A p-type well 46 of about m is formed.

Subsequently, the 5102 film 42 is removed or thermal oxidation is performed to form an Si02 film 44 with a thickness of approximately 1 μm.
is formed, and openings are made in the transistor portion 45 and the contact portion 50 of the well 46.

Next, a gate oxide film 47 having a thickness of about 01 μm is formed by thermal oxidation.

(C): A polycrystalline Si layer with a thickness of about 05 μm is formed by thermal decomposition of monosilane (SiH4), and this is selectively etched to form a gate electrode 48. Subsequently, using this gate electrode 48 as a mask, The gate oxide film 47 outside the portion of the gate electrode 48 is removed by etching.

(d): The contact portion 50 of the well 46 is connected to the resist 53.
Then, phosphorus (P) 52 is ion-implanted to form a P-implanted layer 51.

Instead of the resist 53, phosphorus glass (PSG), boron glass (BSG), or the like containing a high concentration of P, which is easily soluble, may be used.

In this case, thermal deposition may be used instead of ion implantation.

If the resist 53, pSG, or BSG mask is omitted, an n + p junction that is in the forward direction with the well when the aforementioned well-substrate bias is applied can be obtained.

In this case, the next B ion implantation is not necessary.

(e) P implanted layer 5 with resist in the same manner as in 2(d).
1 is covered, B is ion-implanted, and thermal diffusion is performed to form an n-swelling diffusion layer 54 and a diffusion-resistant layer 55.

Subsequently, a PSG film 56 with a thickness of 0.5 μm is formed.

(f): An opening is made in the PSG film 56 in a predetermined pattern such as for a signal line or a contact for the well 46, and the thickness is 1
A conductive material such as A7 having a thickness of about .mu.m is deposited and selectively etched in a predetermined wiring pattern to form a signal line 57 and a reverse bias applying electrode 58.

In this example, the process after forming the well 46 in step (b>) is the conventional n
Channel MO8 integrated circuit manufacturing technology or complementary MO
There is no particular difference from the manufacturing technology for type 8 integrated circuits, and manufacturing is easy.

FIG. 8 is a manufacturing process diagram of another embodiment of the present invention.

(a): 1 B is added as an impurity to the surface of a Si single crystal substrate 61 with an n-type impurity concentration of, for example, about 1016/cril.
A P-type Si layer 64 having a thickness of about 4 μm and including about 0.015/i is formed by epitaxial growth.

Subsequently, by vapor phase growth method or thermal oxidation method, a thickness of 1 μm was formed.
A 5i02 film 62 of about m is formed, and an opening 6 for diffusion separation is formed.
Open 3.

(b): P is thermally diffused through the opening 63 and the Si substrate 61
An n-swelled diffusion layer 65 reaching .

The n-swelled diffusion layer 65 divides the p-type Si layer 64 and forms a well 66 electrically isolated from the surroundings.

Subsequently, the 5102 film 62 is removed.

(C) The device of the present invention can be obtained by following the steps completely similar to step (b) and subsequent steps in the example shown in FIG.

With the manufacturing method described above, it is possible to form a well with a sufficiently uniform impurity concentration, at least for one chip of a solid-state imaging device, and it is possible to form a well with a sufficiently uniform impurity concentration, which is not caused by the non-uniformity of the impurity concentration in the Si substrate as in the conventional method. It disappears.

As explained above, according to the present invention, blooming does not occur in response to strong light, resolution does not deteriorate due to long wavelength light or strong light, and abnormally high sensitivity to long wavelength light is smoothed out, resulting in spectral sensitivity characteristics. can be made flat with respect to the wavelength or any desired value, and there is an effect that uniform good characteristics can be obtained over the entire imaging screen.

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram of a solid-state imaging device, Figs. 2 and 3 are diagrams showing the cross section and potential of a photoelectric conversion element of a conventional solid-state imaging device, Fig. 4 is a diagram of an embodiment of the present invention, and Figs. The figure shows the cross section and potential of the photoelectric conversion element according to the present invention, and FIGS. 7 and 8 are manufacturing process diagrams of the photoelectric conversion section of the apparatus of the present invention. 1...Photodiode, 2,3...Mo
S transistor, 5, 6...signal line, 9...
...Horizontal scanning circuit, 10... Vertical scanning circuit,
11, 31, 41, 61... Si substrate, 12,
13,22,23,54゜55.65,74,75...
...N-swelling diffusion layer, 14°24.48,68...
...Gate electrode, 15, 25° 42.44, 62, 71
...SiO2,2L46°66...Well, 53...Resist.

Claims (1)

[Scope of Claims] 1. A plurality of photodiode diffusion layers formed on the same semiconductor substrate corresponding to each pixel, and a plurality of photodiode diffusion layers formed on the semiconductor substrate as respective constituent parts. A large number of switch transistors and
In a solid-state imaging device comprising a scanning circuit that sequentially scans a large number of switching transistors, a semiconductor substrate is provided on the surface of the semiconductor substrate so as to constitute independent bipolar transistors together with the large number of photodiode diffusion layers and the semiconductor substrate. 1. A solid-state imaging device comprising: a semiconductor layer having conductivity opposite to that of the semiconductor substrate; and means for applying a reverse bias voltage between the semiconductor substrate and the semiconductor layer. 2. The solid-state imaging device according to claim 1, wherein the semiconductor layer is formed by ion implantation into the surface of the semiconductor substrate. 3. The solid-state imaging device according to claim 1, wherein the semiconductor layer is formed on the surface of the semiconductor substrate by epitaxial growth.