JPS5822704U - drive circuit - Google Patents

drive circuit

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Publication number
JPS5822704U
JPS5822704U JP11700181U JP11700181U JPS5822704U JP S5822704 U JPS5822704 U JP S5822704U JP 11700181 U JP11700181 U JP 11700181U JP 11700181 U JP11700181 U JP 11700181U JP S5822704 U JPS5822704 U JP S5822704U
Authority
JP
Japan
Prior art keywords
drive circuit
transistor
inductive load
turned
emitter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11700181U
Other languages
Japanese (ja)
Inventor
茂 山田
神月 宏一
Original Assignee
ヤマハ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ヤマハ株式会社 filed Critical ヤマハ株式会社
Priority to JP11700181U priority Critical patent/JPS5822704U/en
Publication of JPS5822704U publication Critical patent/JPS5822704U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の駆動回路の構成を示す回路図、第2図は
この考案の一実施例の構成を示す回路図、第3図は第2
図に示す回路においてトランジスタ1がOFFした時の
同回路の等価回路図である。 1・・・・・・トランジスタ、3・・・・・・誘導負荷
(コイル)。
Figure 1 is a circuit diagram showing the configuration of a conventional drive circuit, Figure 2 is a circuit diagram showing the configuration of an embodiment of this invention, and Figure 3 is a circuit diagram showing the configuration of an embodiment of this invention.
FIG. 2 is an equivalent circuit diagram of the circuit shown in the figure when transistor 1 is turned off. 1...Transistor, 3...Inductive load (coil).

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 誘導負荷を駆動する駆動回路において、ベースに供給さ
れる制御信号によりオンオフ制御されるトランジスタを
有し、このトランジスタのエミッタと接地との間に前記
誘導負荷を介挿してなる駆動回路。
A drive circuit for driving an inductive load, which includes a transistor that is turned on and off by a control signal supplied to its base, and the inductive load is inserted between the emitter of the transistor and ground.
JP11700181U 1981-08-06 1981-08-06 drive circuit Pending JPS5822704U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11700181U JPS5822704U (en) 1981-08-06 1981-08-06 drive circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11700181U JPS5822704U (en) 1981-08-06 1981-08-06 drive circuit

Publications (1)

Publication Number Publication Date
JPS5822704U true JPS5822704U (en) 1983-02-12

Family

ID=29911208

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11700181U Pending JPS5822704U (en) 1981-08-06 1981-08-06 drive circuit

Country Status (1)

Country Link
JP (1) JPS5822704U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5313880U (en) * 1976-07-17 1978-02-04

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5313880U (en) * 1976-07-17 1978-02-04

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