JPS58219731A - Vapor growth method for compound semiconductor - Google Patents

Vapor growth method for compound semiconductor

Info

Publication number
JPS58219731A
JPS58219731A JP10140382A JP10140382A JPS58219731A JP S58219731 A JPS58219731 A JP S58219731A JP 10140382 A JP10140382 A JP 10140382A JP 10140382 A JP10140382 A JP 10140382A JP S58219731 A JPS58219731 A JP S58219731A
Authority
JP
Japan
Prior art keywords
gas
active layer
doping
electron concentration
concentration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10140382A
Other languages
Japanese (ja)
Inventor
Takashi Udagawa
隆 宇田川
Tokuji Tanaka
篤司 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP10140382A priority Critical patent/JPS58219731A/en
Publication of JPS58219731A publication Critical patent/JPS58219731A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/02546Arsenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To perform the vapor growth wherein the variation of concentration of electrons, etc. at the interface region is steep by a method wherein the doping gas is supplied to a fixed temperature, and thereafter the main raw material gas which contains the gas of organic metal is supplied, resulting in vapor growth. CONSTITUTION:The main raw material gas is obtained by mixing the carrier gas in the vessel 103 with the gas in the vessels 101 and 104. When an active layer 202 of a required concentration is formed on a crystal substrate 201 placed in a reaction furnace 106, first the doping gas in the vessel 108 is supplied into the reaction furnace 106, and thus the concentration of the doping gas in the reaction furnace 106 is kept at a constant value. Thereafter, vapor growth is performed by starting the supply of the main raw material gas, and accordingly the active layer 202 of a required concentration is formed. The use of such a method enables to prevent the decrease of the electron concentration at the interface between the substrate crystal and the active layer by a method wherein the doping gas deposits on the internal wall, etc. of a piping member 111.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は、化合物半導体の気相成長法に係り。[Detailed description of the invention] [Technical field of invention] The present invention relates to a vapor phase growth method for compound semiconductors.

特に結晶基板と気相成長能動層との界面領域(こおける
電子、或いは正孔濃度の変化を急峻にさせるように成長
させる化合物半導体の気相成長法に関する。
In particular, the present invention relates to a method of vapor phase growth of compound semiconductors in which growth is performed so as to steeply change the concentration of electrons or holes at the interface region between a crystal substrate and a vapor phase grown active layer.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

例えばG a A s電界動弁トランジスタGaAs 
MESFBTのようなマイクロ波素子の製作に当っては
、気相成長法或いは液相成長法によりG a A s結
晶基板上(こ成長させたGaAa能動層が用いられる。
For example, GaAs electric field valve transistor GaAs
In manufacturing a microwave device such as a MESFBT, a GaAa active layer grown on a GaAs crystal substrate by a vapor phase growth method or a liquid phase growth method is used.

この様なGaAs能動層中の電字濃度、或いは正孔濃度
は。
What is the charge concentration or hole concentration in such a GaAs active layer?

適用する素子によって通常具なってくる。このため所望
の電子又は正孔濃度を有する能動層を1/)ま気相成長
法で得ようとするには、 GaやAsを含む主原料気体
に不純物を含む気体を故意に混入しなければならない。
It usually depends on the element to which it is applied. Therefore, in order to obtain an active layer with a desired electron or hole concentration by vapor phase growth, a gas containing impurities must be intentionally mixed into the main raw material gas containing Ga or As. No.

この場合n型能動層を成長させるには、■族元素の硫黄
ts>を含む硫化水素(H,S ) 。
In this case, in order to grow the n-type active layer, hydrogen sulfide (H,S) containing sulfur ts, a group Ⅰ element, is used.

■族元素の珪素(Si)を含むシラン(SIH,)など
Silane (SIH, ) containing silicon (Si), a group element.

またp型能動層を成長させるには、■族元素である亜鉛
(Zn)を含むジエチル亜鉛(Zp(CzHs)t)な
どの有機金属化合物が不純物添加用気体 1.Nわゆる
ドーピング用気体として用いられている。
Further, in order to grow a p-type active layer, an organic metal compound such as diethylzinc (Zp(CzHs)t) containing zinc (Zn), which is a group Ⅰ element, is used as an impurity doping gas. N is used as a so-called doping gas.

これらのドーピング用気体を用いてG a A s能動
層へのドーピングを行う場合1例えば有機Ga化合物を
用いる熱分解法では、第1図に模式的に示す様な成長装
置系統が一般に用いられる。即ちGaAs層の堆積は、
ステンレス収納容器(101)内のトリメチルガリウム
((CH3)3Ga ) (102)の蒸気と。
When doping a Ga As active layer using these doping gases, for example, in a thermal decomposition method using an organic Ga compound, a growth apparatus system as schematically shown in FIG. 1 is generally used. That is, the deposition of the GaAs layer is
The vapor of trimethyl gallium ((CH3)3Ga) (102) in the stainless steel storage container (101).

A s H3収納容器(103)から供給されるA s
 H3ガスとを夫々、水素(H2)収納容器(104)
から供給されキャリアガスとして利用されるH2ガスと
混合し、この主原料を含むH,ガスをガス導入口(10
5)から反応炉(106)に導入することによって結晶
基板(107)上に行なわれる。この様な成長系に於い
て例えば所望の電子濃度を有するn型GaAs能動層を
硫黄(81のドーピングにより反応炉(106)内に設
置した結晶基板(107)上に堆積する際には、硫化水
素ガス収納容器(108)から供給され流量計(109
)により所定の流量に調節されたH、Sガスをガス混合
器(110)内でH,キャリアガス中に添加することが
行なわれる。例えば第2図に示す様に半絶縁性G a 
A s結晶基板(201)上にSを添加して厚さ0.5
μm電子濃度I X I Q”c+n−3のn型G a
 A s能動層(202)を形成する際には、  H,
SガスのH2キャリアガスへの添加を上記能動層(20
2)の成長を開始する直前に行っている。
A s supplied from the A s H3 storage container (103)
H3 gas and hydrogen (H2) storage container (104)
The H2 gas containing the main raw material is mixed with the H2 gas supplied from the H2 gas and used as a carrier gas.
5) into the reactor (106), and then onto the crystal substrate (107). In such a growth system, for example, when depositing an n-type GaAs active layer having a desired electron concentration on a crystal substrate (107) placed in a reactor (106) by doping with sulfur (81), sulfur Supplied from the hydrogen gas storage container (108), the flow meter (109)
), H and S gases adjusted to predetermined flow rates are added to H and carrier gas in the gas mixer (110). For example, as shown in Fig. 2, semi-insulating Ga
A s crystal substrate (201) is doped with S to a thickness of 0.5
n-type Ga with μm electron concentration I X I Q”c+n-3
When forming the As active layer (202), H,
The addition of S gas to the H2 carrier gas was performed in the active layer (20
2) is done just before the growth starts.

しかしこのような従来の、ドーピング方法ではH,Sを
H,キャリアガスに混合した直後、反応炉(106)中
に導入されるH、キャリアガス中のH,S濃度は、 H
,8ガス収納容器(108)からガス導入口(105)
に致る配管部材(111)の内壁、或いは反応炉(10
6)の内壁等にH,Sが吸着するために一時的に低下す
る。このことに主として起因して半絶縁性基板結晶(2
01)と能動層(202)との界面付近(203)での
急峻な電子濃度の減少が損なわれる。
However, in such a conventional doping method, immediately after mixing H and S into the H and carrier gas, the H and S concentrations in the H and carrier gas introduced into the reactor (106) are
, 8 gas inlet (105) from gas storage container (108)
The inner wall of the piping member (111) or the reactor (10
6) Temporarily decreases due to adsorption of H and S on the inner walls, etc. This is mainly due to the semi-insulating substrate crystal (2
01) and the active layer (202), the steep decrease in electron concentration near the interface (203) is impaired.

第3図曲線(300)はこの場合に得られる界面付近で
の電子濃度分布で、なだらかな様相を呈している。この
様に能動層の電子濃度が界面付近で緩やかに減少してい
るエビタキシアルウニハラG a A s電界効果トラ
ンジスタの製作に適用すると、その素子特性特に電流−
電圧特性は、第4図に示すように劣悪なものとなり、い
わゆるピンチオフ(pinchoff)特性の悪化、相
互コンダクタンスの低下を招き、電界効果トランジスタ
の生産に著しい支障を来たす。従って界面付近での電子
濃度の急激な減少が必要不可欠とされる電界効果トラン
ジスタの製造に当っては、基板結晶と能動層との界面に
於いて急峻な電子濃度傾斜かえられる様なドーピング方
法が必要となる。
The curve (300) in FIG. 3 is the electron concentration distribution near the interface obtained in this case, and has a gentle appearance. When applied to the fabrication of an ebitaxial Unihara G a As field effect transistor in which the electron concentration in the active layer gradually decreases near the interface, the device characteristics, especially the current -
The voltage characteristics become poor as shown in FIG. 4, resulting in deterioration of so-called pinch-off characteristics and a decrease in mutual conductance, which significantly hinders the production of field effect transistors. Therefore, in manufacturing field effect transistors where a rapid decrease in electron concentration near the interface is essential, a doping method that can change the steep electron concentration slope at the interface between the substrate crystal and the active layer is required. It becomes necessary.

〔発明の目的〕[Purpose of the invention]

この発明は上記の欠点を除去し、基板結晶と気相成長能
動層との界面で電子濃度傾斜を急峻にさせるように気相
成長させる化合物半導体の気相成長方法を提供するにあ
る。
The present invention eliminates the above-mentioned drawbacks and provides a method for vapor phase growth of a compound semiconductor in which the compound semiconductor is grown in vapor phase so as to steepen the electron concentration gradient at the interface between the substrate crystal and the vapor phase grown active layer.

〔発明の概要〕[Summary of the invention]

即ちこの発明は、有機金属の熱分解を利用し且つドーピ
ングにより不純物を添加させる化合物半導体の気相成長
方法において、予じめドーピングガスを濃度が定常値に
達するまで反応炉内に供給し続け、定常値に達した後有
機金属ガスを含む主原料ガスの供給を開始して併給し乍
ら気相成長させる化合物半導体の気相成長方法にある。
That is, this invention is a compound semiconductor vapor phase growth method that utilizes thermal decomposition of an organic metal and adds impurities by doping, in which a doping gas is continuously supplied into a reactor until the concentration reaches a steady value, The present invention is a method for vapor phase growth of a compound semiconductor, in which the supply of a main raw material gas containing an organometallic gas is started after reaching a steady state value, and vapor phase growth is performed while simultaneously feeding the main raw material gas.

このようなこの発明によれば成長初期に生じる配管部材
或いは反応炉の内壁での吸着によるドーピン・グガス損
失を防止することが出□来、基板結晶と堆積層との界面
で急峻に不純物濃□度を変化させることが出来る。G 
a A sな、Jl−V族化合物半導体成長層への不純
物添加方法としてすぐれる。
According to this invention, it is possible to prevent the loss of doping gas due to adsorption on piping members or the inner wall of the reactor that occurs in the early stage of growth, and to prevent the impurity concentration from rapidly increasing at the interface between the substrate crystal and the deposited layer. You can change the degree. G
This is an excellent method for adding impurities to a Jl-V group compound semiconductor growth layer.

〔発明の実施例〕[Embodiments of the invention]

以下この発明の実施例について図面を参照して述べる。 Embodiments of the present invention will be described below with reference to the drawings.

この例ではまず硫黄(81をドーピングして電子濃度的
I X I Q17crtr−” 、厚さ0.5/jm
の() a A s能動層を、半絶縁性G a A s
結晶基板上に直接形成した電界効果トランジスタ用エピ
タキシアルウェハを作成する場合について述べる。上記
能動層の形成はアルシンとトリメチルガリウムを主原料
とする第1図熱分解気相成長装置を用いる。ドーピング
ガスは水素(Hl)希釈の硫化水素(HxS)ガスであ
る。又H,8ガス1lllfは約30ppm とする。
In this example, first, sulfur (81) is doped to give an electron concentration of I
( ) a As active layer of semi-insulating Ga As
A case will be described in which an epitaxial wafer for a field effect transistor is formed directly on a crystal substrate. The active layer is formed using a pyrolysis vapor phase growth apparatus shown in FIG. 1, which uses arsine and trimethylgallium as main raw materials. The doping gas is hydrogen sulfide (HxS) gas diluted with hydrogen (Hl). Also, 1lllf of H,8 gas is approximately 30 ppm.

H,Sガス収納容器(108)から反応炉(106)上
にあるガス導入口(105)に至る配管には、内径約6
朋のステンレス管が用いられ、またH、8ガス収納容器
(108)からガス導入口(105)に至るこのステン
レス管の長さは約4艙である。G a A s成長層の
堆積は、H,ガス収納容器(104)から反応炉(10
6)に供給されるH、キャリアガス流量を、 6.71
/f+、アルシンガス、但し濃度10.6%水素希釈の
収納容器(103)から供給されるアルシンガス流量を
217cc/分、及びOooに保持されたトリメチルガ
リウム(102)をバブルするH2流量を31cc/分
に各々設定し、基板温度は660°Cに設定する。これ
らの流量及び基板温度条件下で、上記の電子濃度I X
 10”α−3の能動層を形成するには、上記濃度にあ
るH、Sカスを毎分120ccの割合で反応炉(106
)に導入する必要がある。しかし、反応炉(106)に
導入されるH、Sガス流量を120cc/分とする場合
1反応炉に導入されるH1Sガスの濃度が定常に達する
には、H,8ガスをH,キャリアガスに混合器(110
)を介して添υ口した後最低10分を要する。
The piping from the H, S gas storage container (108) to the gas inlet (105) on the reactor (106) has an inner diameter of approximately 6.
A stainless steel pipe made by our company is used, and the length of this stainless steel pipe from the H.8 gas storage container (108) to the gas inlet (105) is about 4 lengths. The deposition of the Ga As growth layer is carried out from the H, gas storage container (104) to the reactor (10
6) H and carrier gas flow rate supplied to 6.71
/f+, arsine gas, but the arsine gas flow rate supplied from the storage container (103) diluted with hydrogen at a concentration of 10.6% is 217 cc/min, and the H2 flow rate to bubble the trimethyl gallium (102) held in Ooo is 31 cc/min. and the substrate temperature was set at 660°C. Under these flow rate and substrate temperature conditions, the above electron concentration I
To form an active layer of 10"α-3, H and S residues at the above concentration are heated in a reactor (106 cc) at a rate of 120 cc/min.
) must be introduced. However, when the H, S gas flow rate introduced into the reactor (106) is 120 cc/min, in order for the concentration of the H1S gas introduced into one reactor to reach a steady state, the H,8 gas must be replaced with the H, carrier gas. mixer (110
) for at least 10 minutes after attachment.

それ故この例では予じめ10分間H,8ガスのみを流し
、以後原料ガスを併給することにする。このため、コッ
ク(112)、 (113)をこの時点で開状態とする
。この条件で形成された基板結晶堆積層の深さ方向電子
濃度プロファイル(500)は第5図に示すように第3
図曲線(300)に比較するとき基板結晶と能動層との
界面で、電子濃度を急激に変化させている。このように
急峻な電子濃度プロファイルヲ有するG a A sエ
ピタキシアルウェハノ成長を可能にしている。またこの
様な急峻な電子濃度フロファイルを示す0aAsエピタ
キシアルウエハを用いて例えばゲート長1.0μmの電
界効果トランジスタを製作した際には、第6図電流電圧
特性曲線図に示すように良好なピンチオフを得させ、第
3図に示した界面付近電子濃度のエピタキシアルウェハ
を用いて製作した素子に係る第4図電界効果型トランジ
スタ特性と比較すると相互コンダクタンスにして約2倍
の改善が果される。−また第2図に示した様にG a 
A S結晶基板上に直接能動層を堆積せず、第7図に示
すようにG a A s基板結晶(701)と厚さ0.
5μm、電子濃度lX1017硼°1SドープG a 
A s能動層(702)との中間に厚さ277mの無添
加(アンドープ) GaAs緩衝層(704)を挿入し
た構造を有するエピタキシアルウェハを同様1\111 に成長させた場合の上記緩衝層(704)と能動層(7
02)との界面(703)付近の電子濃度プロファイル
を第8図(SOO)に示す。尚同図に示す電子濃度プロ
ファイル(801)は、第3図曲線(300)に係るエ
ピタキシャルウェハと同様にして形成され緩衝層をおく
型の比較例に係るものである。従来より行なわれていた
ドーピング法では、界面(703)付近で電子濃度が緩
やかに変化し、急峻な電子濃度プロファイルが得られな
いことが第8図中のプロファイル(801)から判る。
Therefore, in this example, only H, 8 gas is flowed for 10 minutes in advance, and then raw material gas is fed together. Therefore, the cocks (112) and (113) are opened at this point. The depth direction electron concentration profile (500) of the substrate crystal deposited layer formed under these conditions is as shown in FIG.
When compared to the curve (300) in the figure, the electron concentration changes rapidly at the interface between the substrate crystal and the active layer. In this way, it is possible to grow a GaAs epitaxial wafer having a steep electron concentration profile. Furthermore, when a field effect transistor with a gate length of 1.0 μm, for example, is fabricated using an 0aAs epitaxial wafer exhibiting such a steep electron concentration profile, a good current-voltage characteristic curve is obtained, as shown in the current-voltage characteristic curve diagram in Figure 6. When compared with the field-effect transistor characteristics shown in Figure 4 for a device manufactured using an epitaxial wafer with pinch-off and the electron concentration near the interface shown in Figure 3, the mutual conductance is improved by about twice. Ru. -Also, as shown in Figure 2, Ga
Instead of depositing the active layer directly on the A S crystal substrate, as shown in FIG.
5 μm, electron concentration 1×1017 degrees 1S doped Ga
When an epitaxial wafer having a structure in which an undoped GaAs buffer layer (704) with a thickness of 277 m is inserted between the As active layer (702) and the above buffer layer ( 704) and active layer (7
The electron concentration profile near the interface (703) with 02) is shown in FIG. 8 (SOO). Note that the electron concentration profile (801) shown in the same figure is related to a comparative example of the type in which the epitaxial wafer is formed in the same manner as the epitaxial wafer related to the curve (300) in FIG. 3, and a buffer layer is provided. It can be seen from the profile (801) in FIG. 8 that in the conventional doping method, the electron concentration changes slowly near the interface (703) and a steep electron concentration profile cannot be obtained.

しかしこの発明に依るドーピング方法を採用した場合に
は、第2図及び第7図に示したエピタキシャルウエノ1
の構造の相違に拘らず界面付近で何れの場合にも急峻な
電子濃度の変化が得られることは、第5図及び第8図に
示す電子濃度プロファイルから明白である。
However, when the doping method according to the present invention is adopted, the epitaxial wafer 1 shown in FIGS.
It is clear from the electron concentration profiles shown in FIGS. 5 and 8 that a sharp change in electron concentration is obtained near the interface regardless of the difference in structure.

なお上記実施例では、 GaAsエピタキシアル能動層
をSをドーピングすることによりG a A s基板結
晶上に形成しているが、この発明の方法は、このように
熱分解法でGaAs結晶基板上に不純物を添加しGaA
s能動層を形成する場合に限らず、他のt−V1!fc
半導体結晶例えばInP結晶基板上に/%ロゲン系気相
成長法により不純物を添加したGaAs、InPなどの
m−v族半導体、結晶からなる能動層を形成する場合に
も応用出来る。不純物はSに限定されず、この他n型成
長層の形成に際してはSiなどの■族元素、或いはSe
、Teなどの■族元素、又はp型成長層の形成に際−し
てはZnなどの■族元素を使用してよろしい。
In the above embodiment, the GaAs epitaxial active layer is formed on the GaAs crystal substrate by doping S, but the method of the present invention is to form the GaAs epitaxial active layer on the GaAs crystal substrate by the thermal decomposition method. GaA by adding impurities
Not only when forming the s active layer, but also when forming other t-V1! fc
The present invention can also be applied to the formation of an active layer made of an m-v group semiconductor such as GaAs or InP doped with impurities by a % rogen vapor phase epitaxy method on a semiconductor crystal, for example, an InP crystal substrate. The impurity is not limited to S, and when forming the n-type growth layer, group II elements such as Si, or Se
, Te, etc., or when forming the p-type growth layer, a group (1) element such as Zn may be used.

〔発明の効果〕〔Effect of the invention〕

以上述べたようにこの発明によれば、能動層と基板結晶
との界面、或いは緩衝層との界面で、急激に電子濃度を
変化させることを可能にする。また比較的薄い能動層内
の電子濃度を一定にし且つ上記界面付近で電子濃度を急
激に変化させることが必要な電界効果トランジスタ用の
エピタキシアルウェハは、この発明を採用することによ
り収率良く得られ、良好な特性を有する電界効果トラン
ジスタの生産性向上に寄与できる。
As described above, according to the present invention, it is possible to rapidly change the electron concentration at the interface between the active layer and the substrate crystal or at the interface between the buffer layer and the active layer. Furthermore, epitaxial wafers for field effect transistors, which require a constant electron concentration in a relatively thin active layer and a rapid change in electron concentration near the interface, can be obtained with high yield by adopting this invention. This can contribute to improving the productivity of field effect transistors with good characteristics.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は有機Ga化合物を用いる熱分解気相成長法で使
用する成長装置模式図、第2図はG a A s基板上
に能動層を形成したエピタキシアルウェハ断面図、第3
図は従来のドーピング方法に依って第2図構造のエピタ
キシアルウェハを作成した場合に得られる硫黄(8)ド
ープG a A s能動層内の電子濃度プロファイル、
第4図は第3図に示す電子濃度プロファイルを有するG
 a A s能動層を利用して作成したGaAs電界効
果トランジスタのドレイン電流−電圧、特性図、第5図
は電子濃度I X 10”α−3゜厚さ0.5μmのS
ドープ能動層を従来法、及び本発明方法で形成した際の
能動層内の電子濃度プロファイル、第6図は前記第5図
に示した本発明方法に依り達成された急峻な電子濃度プ
ロファイルの能動層を用いG a A s電界効果トラ
ンジスタを作成した場合に得られるドレイン電流−電圧
特性例。 竺7図はGaAs基板結晶上に緩衝層及びG a A 
s能動層を形成したエピタキシアルウェハの断面図。 第8図は前記第7図に示す構造のエピタキシアルウェハ
を従来法又は本発明決方法に依り作成したエピタキシア
ルウェハ内の電子濃度プロファイルを各々示す図である
。 第1図で (101)・・ トリメチルガリウム収納用ステンレス
製収納容器(102)・・・トリメチルガリウム (103)・・アルシンガス収納容器 (104)・・・水素ガス収納容器 (105)・・・ガス導入口 (106)・・・反応炉 (107)・・基板結晶 (108)・・・硫化水素ガス収納容器(109)・・
流量計 (110)・・・ガス混合器 (111)・・・配管部材 第2図で (201) ・−GaAs基板結晶 (202) −GaAs能動層 (203)・・・基板結晶と能動層の界面第3図及び第
5図で (300)・・・硫黄ドーピングを従来法に基づいて行
なった場合に得られる能動層の電子濃 度プロファイル 第5図で (500)・・・硫黄ドーピングを本発明の方法で行な
つた場合に得られる能動層の電子濃度 プロファイル 第7図で (701)・= GaAs結晶基板 (702)・・・能動層 (703)・・・緩衝層と能動層との界面(704)・
・緩衝層 第8図で (801)・・・従来方法に依って得られる緩衝層と能
動層界面の電子濃度プロファイル (800)・・・本発明方法により達成される緩衝層と
能動層界面の電子濃度プロファイルの 一例 代理人 弁理士 井 上 −男 第  1  図 トレイシ9七〔Z虹 (V〕□
Figure 1 is a schematic diagram of a growth apparatus used in the pyrolytic vapor phase growth method using organic Ga compounds, Figure 2 is a cross-sectional view of an epitaxial wafer with an active layer formed on a GaAs substrate, and Figure 3
The figure shows the electron concentration profile in the sulfur (8)-doped GaAs active layer obtained when an epitaxial wafer with the structure shown in Figure 2 is created using a conventional doping method.
Figure 4 shows G having the electron concentration profile shown in Figure 3.
Drain current-voltage characteristics diagram of a GaAs field effect transistor fabricated using aAs active layer, Figure 5 shows an electron concentration of I
Figure 6 shows the electron concentration profile in the active layer when the doped active layer is formed by the conventional method and the method of the present invention. An example of drain current-voltage characteristics obtained when a GaAs field effect transistor is created using the layer. Figure 7 shows a buffer layer and GaA on a GaAs substrate crystal.
s A cross-sectional view of an epitaxial wafer on which an active layer is formed. FIG. 8 is a diagram showing the electron concentration profile in an epitaxial wafer having the structure shown in FIG. 7, prepared by the conventional method or the method of the present invention. In Figure 1, (101)...Stainless steel storage container for storing trimethyl gallium (102)...Trimethyl gallium (103)...Arsine gas storage container (104)...Hydrogen gas storage container (105)...Gas Inlet (106)...Reactor (107)...Substrate crystal (108)...Hydrogen sulfide gas storage container (109)...
Flow meter (110)...Gas mixer (111)...Piping members (201) in Figure 2 -GaAs substrate crystal (202) -GaAs active layer (203)...Boast crystal and active layer Interfaces in Figures 3 and 5 (300)... Electron concentration profile of the active layer obtained when sulfur doping is performed based on the conventional method Figure 5 shows (500)... Sulfur doping is performed according to the present invention In Figure 7, the electron concentration profile of the active layer obtained when the method is carried out is as follows: (701)=GaAs crystal substrate (702)...Active layer (703)...Interface between buffer layer and active layer (704)・
・Buffer layer (801) in FIG. 8... Electron concentration profile at the buffer layer and active layer interface obtained by the conventional method (800)... The buffer layer and active layer interface achieved by the method of the present invention An example of an electron concentration profile Agent Patent attorney Inoue - Male Figure 1 Traci 97 [Z Rainbow (V]□

Claims (1)

【特許請求の範囲】 有機金属の熱分解を利用し且つドーピングにより成長層
に不純物を添加させる化合物半導体の気相成長方法にお
いて、予じめドーピングガスを濃度が定常値に達するま
で反応炉内に供給し続け。 定常値に達したのち有機金属カスを含む主原料ガスの供
給を開始して併給し乍ら気相成長させることを特徴とす
る化合物半導体の気相成長方法。
[Claims] In a compound semiconductor vapor phase growth method that utilizes thermal decomposition of an organic metal and adds impurities to a growth layer by doping, a doping gas is introduced into a reactor in advance until the concentration reaches a steady value. Continue to supply. A method for vapor phase growth of a compound semiconductor, which is characterized in that after reaching a steady state value, the supply of a main raw material gas containing organometallic scum is started and the vapor phase growth is performed while simultaneously feeding the main raw material gas.
JP10140382A 1982-06-15 1982-06-15 Vapor growth method for compound semiconductor Pending JPS58219731A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10140382A JPS58219731A (en) 1982-06-15 1982-06-15 Vapor growth method for compound semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10140382A JPS58219731A (en) 1982-06-15 1982-06-15 Vapor growth method for compound semiconductor

Publications (1)

Publication Number Publication Date
JPS58219731A true JPS58219731A (en) 1983-12-21

Family

ID=14299755

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10140382A Pending JPS58219731A (en) 1982-06-15 1982-06-15 Vapor growth method for compound semiconductor

Country Status (1)

Country Link
JP (1) JPS58219731A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0794758A (en) * 1991-09-12 1995-04-07 Pohang Iron & Steel Co Ltd Manufacture of delta-doped quantum well type field-effect transistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0794758A (en) * 1991-09-12 1995-04-07 Pohang Iron & Steel Co Ltd Manufacture of delta-doped quantum well type field-effect transistor

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