JPS58210721A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To make the injector currents of I<2>L circuits of multistage (stacked) constitution constant, by using the 1st I<2>L circuit and the 2nd I<2>L circuit connected in series with the negative side current line of the 1st I<2>L circuit. CONSTITUTION:Constant-current (injector) transistors TRQ11 and TRQ1n and switching TRs Q21 and Q2n constitute the 1st-stage I<2>L circuit. Further, constant- current TRs Q11' and Q1n' and switching TRs Q21' and Q2n' constitute the 2nd- stage I<2>L circuit. Those I<2>L circuits are connected in series to form two-stage constitution. Namely, an injection current IO1 is supplied from a constant current source to the positive power supply line (emitter of pnp TR Q11 or Q1n) of the 1st-stage I<2>L circuit. Further, the negative current source supply line (base of pnpTRQ11 or Q1n and emitter of npnTRQ21 or Q2n) of the 1st-stage I<2>L circuit is connected to the positive power supply line (emitter of pnpTRQ11' or Q1n') of the 2nd I<2>L circuit. Then, the I<2>L circuit of the other stage is provided to the negative-side power supply line of the 1st-stage I<2>L circuit and a dummy gate for switching current compensation is provided to the output gate.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor integrated circuit including an integrated injection logic (U, I"L) circuit.

Conventionally, 119 circuits as shown in FIG. 1 have been published. The engineering 3L circuit connects the injector terminal (lateral pnpl
'Emitter of transistor Qto) KO, it will operate if a voltage of about 7 volts is applied and a constant current flows. Also, engineering 2
The L structure can be formed by a combination of processes that are almost the same as those for a normal pievora-e C (integrated circuit). This means that, in principle, one chip 04Cll can be created using the same process as the digital chip C with the linear L configuration.
It means. In this case, the 'fIL source voltage follows the IJ near circuit and uses a relatively high voltage r, for example about 5 to 12 volts, so from the point of view of the I'L circuit that operates at about 0.7 volts, the reactive power becomes large.

Therefore, the inventors of this IjA developed a construction method as shown in Fig. 2.
The L circuit r is assembled into a series configuration to form the so-called stacked (
5 tacked ) engineering! As the Lm formation, we considered the effective use of the above-mentioned storm pressure.

As described above, the inventor's research has revealed that the stacked 2L configuration causes the following problems.

For example, as shown in FIG. 2, when transmitting the output signal of the I"L digital circuit to the near circuit through an output interface using a differential transistor circuit or the like, the switching of the switching transistor Q2n in the output IL gate Due to the operation, the injector current of the I''L circuit on the lower stage side fluctuates. In other words, engineering 1
When the output switching transistor Qvn of the L gate is on, the current 0 flows from the output interface circuit OUT to the 2L circuit side through the load resistor Rsk, whereas the above transistor Q!
When n is off, the current 0 does not flow into the 1L circuit. And this current work ◎ is the work 2L on the lower stage side.
It is used as part of the injector electrician ◎ mocking circuit. Similarly, in the lower circuit 2L circuit, the injector ◎l' turns on/off the transistors Q and an. 10Xo/
It fluctuates as shown in ◎1.

The injector current 01' is closely related to the signal transmission delay time of the 2L gate.

That is, as is well known, the signal transmission delay time decreases in inverse proportion to the increase in the injector current. Therefore, in the lower-stage circuit 2L circuit, its operating speed fluctuates in accordance with the switching operation of the above-mentioned output switching transistor Qsn on the upper stage.
This results in a pulse width variation t. On the other hand, the upper stage side 2L circuit operates at a constant flow rate of ◎1, and its operating speed is constant, so it becomes a big obstacle when providing one circuit function as a whole. Put it away.

In addition, the above-mentioned fluctuations in the injector current are caused by the voltage between the base and emitter of the pnp transistor Q' to GLtn', or in other words, the voltage fluctuation (switching noise) in the power supply line of the lower stage side 2L circuit. , another stage of engineering! The switching noise causes crosstalk to the L circuit, which also causes malfunction.

An object of the present invention is to provide a semi-dedicated integrated circuit in which the injector wL flow is made constant in a multi-stage (stacked) 2L circuit.

Other objects of the invention will become apparent from the following description and drawings.

FIG. 3 shows a circuit diagram of an embodiment of the present invention.

11. Current (injector) transistor Q or Q
ln and switching transistors Q21 to Qm
n constitutes a first-stage circuit 2L circuit.

In addition, a second stage L circuit is constituted by constant current transistors Qti' to Qtn' and switching transistors QfiI to Qnn', as in the above Me. . Although not particularly limited, in this embodiment, the 2L circuit is connected in series with the two-stage configuration of the first stage and the second stage. In other words, the injector current is supplied from a constant current source to the positive power supply line (PNP transistor Q to the emitter of Q, tn) in the first stage circuit 2L circuit. Also, the negative 11: source line (pnp transistor Qtt
The pace of transistors Qsn to Qsn and the emitters of transistors Q, 1 to Q2n) are the positive power supply line (pnp) transistor Q++' in the second stage circuit 2L circuit.
fx to the emitter of Qtn').

The same negative power supply line as described above in this second stage 2LL circuit is grounded.

First stage circuit: Like the L circuit, a murder circuit 2L circuit is provided on the negative side power supply line, but a double gate for compensating the switching current is provided in the D circuit. .

In this example, the transistor Qtn r Ghn l
) X output Gutke is configured, and one collector of the switching transistor Qzn is provided with a load resistor R3, and the output is transmitted to the linear circuit via its collector output or the output interface circuit OU Ttk.
L.

1. The output interface circuit OUT, and the differential transistors Q1 and Q!, although not particularly limited. , its collector resistors R1, R, and a constant current source ◎2. The collector output voltage of the transistor Q2n is applied to the pace of the differential transistor QI, and the other differential transistor Q! The logic threshold voltage vr is applied to the pace of .

Also, I11 of the output transistor Q1! One collector is transmitted to the input of a dummy gate formed by a transistor Qtpl;hp. The output transistor Q of this dark gate! A load resistance R similar to the above is attached to the collector of D.
31 are provided. This causes resistance RB, R3
', the same electric current 0 is made to flow in both.

The dummy gate operates in response to the signal from the output gate, so the switching transistor Q*
Qv pfl, operate in a complementary manner. Once, when the transistor Qvn is on, the current flow through the resistor R3 flows into the circuit H, and when the transistor Qzn is off, the transistor QID is turned on, and the current flow through the resistor Rs'k flows into the circuit side. ◎It will flow into the 2L circuit side. Such a transistor Qvrx * Q
Due to the complementary operation of 4p, the injector current in the 2L circuit on the lower stage side becomes a constant current (01 + ◎).

Therefore, the Potter IL circuit? It can be operated stably, and no switching noise is generated due to the switching operation of the W transistor on the upper stage side.

Note that the output signal on the lower stage side is also transmitted to the linear circuit via a predetermined output interface circuit 0UT17.

This invention is not limited to the above embodiments.

The collector loads of the output transistor Q and the dummy output transistors Q and ID may be a current source. In addition, the above output interface circuit 0UT
I, OUT! You may want to ask about the specific circuit.

Furthermore, the construction of the upper and lower tiers! Injector 1 of L circuit [k
If they are to be made equal, it is sufficient to provide a bypass circuit for the first flow of the flow iron ◎ in parallel to the circuit for the flow I on the lower stage side.

Further, the multi-stage configuration of the 1L circuit may be three or more stages. In this case, the lowest stage 2L circuit? A dummy gate for current compensation as in the embodiment described in MU may be provided at the output gate of the 2L circuit in each stage except for the above. The input signal to this dummy gate may be any signal as long as the output transistor of the output gate and the output transistor of the dummy gate operate complementary to each other.

[Brief explanation of drawings]

Figure 1 shows the published Ko! FIG. 2 is a circuit diagram of the L gate, and FIG. 2 is a circuit diagram of a stacked 25 circuit devised prior to the present invention. FIG. 3 is a circuit diagram showing an embodiment of the main part of the present invention.・ ・) ′, -2I Figure 1 Figure 2

Claims (1)

[Claims] 1. Receiving a predetermined digital signal, its collector output r
A switching transistor 2M that transmits to the linear circuit receives a digital signal r having an opposite phase to the above-mentioned digital signal, and a complementary current r similar to that of the switching transistor of the first circuit 2L gate is supplied to its collector. Current switching transistor'kW second
The work! L Gut? 1. A semiconductor integrated circuit comprising: a first 119 circuit including a first 2L circuit; and a second 119 circuit connected in series with the negative current line of the first 119 circuit. 2. The second step above! The negative phase digital signal No. 45 applied to the input of the L gate is the same as the above-mentioned "No. 45". Claim #lJ3 characterized in that it is one output signal of the L gate.
Section 1! 6 Semiconductor integrated circuits.