JPS58209148A - Microcomputer - Google Patents

Microcomputer

Info

Publication number
JPS58209148A
JPS58209148A JP57091374A JP9137482A JPS58209148A JP S58209148 A JPS58209148 A JP S58209148A JP 57091374 A JP57091374 A JP 57091374A JP 9137482 A JP9137482 A JP 9137482A JP S58209148 A JPS58209148 A JP S58209148A
Authority
JP
Japan
Prior art keywords
socket
microcomputer
contacts
eprom
electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57091374A
Other languages
Japanese (ja)
Inventor
Kensaku Wada
健作 和田
Hidehiko Akasaki
赤崎 英彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57091374A priority Critical patent/JPS58209148A/en
Publication of JPS58209148A publication Critical patent/JPS58209148A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/32Holders for supporting the complete device in operation, i.e. detachable fixtures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Connecting Device With Holders (AREA)

Abstract

PURPOSE:To miniaturize the constitution by loading a socket encasing a semiconductor memory storage of leadless chip carrier structure onto a socket encasing the micro-computer of the same structure. CONSTITUTION:With the socket 12 for an EPROM, a concave section encasing an EPROM 11 is formed, a pluraity of contacts 12a being in contact with the electrode of the ROM 11 are set up to the inside, and a plurality of contacts 12b being in contact with the electrode of the upper surface of the micro-computer 13 are fitted to a lower surface. With the socket 14 for the microcomputer, a concave section encasing the computer 13 is formed, and a plurality of contacts 14a being in contact with the electrodes of the side surface of the computer 13 are set up to the inside while an electrode 14b for loading to a printed board 16 is fitted to a lower surface. The sockets 12, 14 each encases the ROM 11 and the computer 13, are positioned and are fixed. Accordingly, the microcomputer can be constituted to a small-sized one.

Description

【発明の詳細な説明】 il+  発明の技術分野 本発明はマイクロコンピュータにROMヌはRAMを直
結したマイクロコンピュータに関するものである。
DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a microcomputer in which a ROM and a RAM are directly connected to the microcomputer.

(2)技術の背景 従来、電子計算装置などに用いられるマイクロコンピュ
ータにはRAM又はROMが接続されているが、装置の
小型化要Xから、第1図に示す如くプリント配線板1の
h品搭載密度を増すため、マイクロコンピュータ2にR
OM5jはRAMを搭載する方法かとられている。また
このROM¥ DRAMの内容を必要により書き替えた
いとき、特に試作段階などではROM又はRA Mの代
りに1・き替え可能なEPROM3が用いられる。この
鳴合の書き替えは、第1図aの如く紫外線照射4Vcよ
って記1内容を消去し、誉き込みは第1図すの如<EP
EOMライタにケーブル5で接続されたソケット6をE
PROM3に嵌着して行なうようになっている。
(2) Background of the technology Conventionally, a RAM or ROM has been connected to a microcomputer used in an electronic computing device, etc., but due to the need for miniaturization of the device, as shown in FIG. In order to increase the mounting density, R is installed on the microcomputer 2.
OM5j is said to be a method of mounting RAM. Furthermore, when it is desired to rewrite the contents of this ROM\DRAM as necessary, a replaceable EPROM 3 is used instead of the ROM or RAM, especially in the trial production stage. To rewrite this chorus, the contents of note 1 are erased by ultraviolet irradiation at 4Vc as shown in Figure 1a, and the inscription is written as shown in Figure 1A.
Connect socket 6 connected to EOM writer with cable 5 to E
This is done by fitting it into PROM3.

(3)  従来技術と問題点 上記のようにマイクロコンビー−夕[EPROMを搭載
する場合、両者を直接接続することは技術上困難である
ので、従来はDIP型パックーソのマイクロコンビーー
タに第2図に示す如きシヶクIf介してEPROMを搭
載している。ところが第2図に示すソケット7けEPR
OM3の!極との接続全平面部で行なっており、接続用
のばね8のばね性を確保するため、その長さtを充分に
取る必要があり、そのためソケット7の外形が大きくな
り、またばね8′f抑えるため蓋9を要したり、その止
め金10を要するなどにより大型化する。
(3) Conventional technology and problems As mentioned above, when installing a microcontroller and an EPROM, it is technically difficult to connect the two directly. An EPROM is mounted through the interface as shown in the figure. However, the 7-socket EPR shown in Figure 2
OM3's! The connection with the pole is made on the entire flat surface, and in order to ensure the springiness of the connection spring 8, it is necessary to have a sufficient length t.As a result, the external shape of the socket 7 becomes large, and the spring 8' The lid 9 is required to suppress f, and the stopper 10 is required, resulting in an increase in size.

従って従来のマイクロコンピュータは上記のソケットを
用いているため大型化するという欠点かあった。
Therefore, since conventional microcomputers use the above-mentioned sockets, they have the disadvantage of being large in size.

(4)発明の目的 本発明は上紀従米の欠点[鑑み、従来に比し小型化した
マイクロコンピュータを提供することを目的とするもの
である。
(4) Purpose of the Invention In view of the drawbacks of the above-mentioned technology, it is an object of the present invention to provide a microcomputer that is smaller than the conventional one.

(5)発明の構成 そしてこの目的は本発明によれば、側面及び上面にそれ
ぞれ複数個の電極を有するリードレスチップキャリヤ構
造のマイクロコンピュータを収容したソケットの上に、
lll1面に複数個の電極を有するリードレスチップキ
ャリヤ構造の半導体記憶装置を収容し之ソケットを着脱
自在に搭載して成り、前記半導体記憶装置組ソケットV
Cは半導体記憶装) 置を収容する凹部の内側に半導体記憶装置の電極に接触
する榎iaのコンタクトを設けると共にソケット底面に
は前記マイクロコンピュータの上面の電極に接触する複
数個のコンタクトをしけ、前記マイクロコンピュータの
ソケットには前にマイクロコンピュータを収容する凹部
の内10i1に前桁、マイクロコンビーータの電極に接
触する複数41&のコンタクトを設けると共に、ソケッ
ト底面にはグリント基板のパターンに接続する複数個の
電極をbけたことを特徴とするマイクロコンピュータを
提供することによって達成される。
(5) Structure and object of the invention According to the present invention, on a socket containing a microcomputer having a leadless chip carrier structure having a plurality of electrodes on each side and top surface,
The semiconductor memory device assembly socket V accommodates a semiconductor memory device having a leadless chip carrier structure having a plurality of electrodes on one surface, and is removably mounted with a socket.
C is a semiconductor memory device) A contact for contacting the electrode of the semiconductor memory device is provided inside the recess for accommodating the device, and a plurality of contacts for contacting the electrode on the top surface of the microcomputer are provided on the bottom of the socket. In the socket of the microcomputer, a plurality of contacts 41 and 41 are provided in the front part of the recessed part 10i1 for housing the microcomputer, and a plurality of contacts contacting the electrodes of the microcomputer are provided on the bottom surface of the socket, and the contacts are connected to the pattern of the glint board on the bottom surface of the socket. This is achieved by providing a microcomputer that is characterized by having a plurality of electrodes arranged on it.

(6)  発明の実施例 以下本発明実施例を図面によって詳述する。(6) Examples of the invention Embodiments of the present invention will be described in detail below with reference to the drawings.

第3図は本発明によるマイクロコンピュータの構造を示
す分解斜視図であろう P1図において11はE P ROD/l、12はgp
既胤用ソケット、13flマイクロコンピユータ、14
は71クロコンピユータ用ソケツトをそれぞれ示してい
る。
FIG. 3 is an exploded perspective view showing the structure of a microcomputer according to the present invention. In FIG. P1, 11 is E P ROD/l, 12 is gp
Existing socket, 13fl microcomputer, 14
71 indicates a computer socket.

EPROM11flリードレスチツプキヤリヤ(LCC
)構造をなし、その憤1面rCは複数イ固の電極11a
が設けられている。マイクロコンピュータ13はEPR
OMと同様にLCC構造fなし、その側面及び上面には
電樅13a及び13bが設けられている。
EPROM11fl leadless chip carrier (LCC)
) structure, and its first surface rC has a plurality of electrodes 11a.
is provided. Microcomputer 13 is EPR
Like the OM, there is no LCC structure f, and electric fences 13a and 13b are provided on the side and top surfaces.

EPROM用ソケット12はE P ROMを収容する
凹部が設けられ、その内111[E P ROM 11
の電極11a[接触する複数個のコンタク) 12aが
版けられ、また下面にマイクロコンピュータ13の上面
の電極13bと接触する複数個0!コンタク)12b(
第4図参照)が設けられているっマイクロコンピュータ
用ソケット14はEPROM用ソケット12とほぼ同様
の形状をなし、マイクロコンピュータ13を収容する凹
部が設けられ、そノ内側にマイクロコンピュータ13の
慟1面の電極13a[接触する複数個のコンタクト14
aが設けられると共に、下面にグリシlへの搭載用の電
極14b(第4図参照)が設けられている。
The EPROM socket 12 is provided with a recess for accommodating an EPROM, of which 111 [EPROM 11
The electrodes 11a (a plurality of contacts) 12a are printed, and the lower surface of the microcomputer 13 has a plurality of electrodes 11a [0! Contact) 12b (
The microcomputer socket 14 has almost the same shape as the EPROM socket 12, and is provided with a recess for accommodating the microcomputer 13. Surface electrode 13a [multiple contacts 14 in contact]
a is provided, and an electrode 14b (see FIG. 4) for mounting on the grid plate is provided on the lower surface.

なおマイクロコンピュータ用ソケット14には位置合せ
用のビン14cが設けられ、EPROM用ソケット12
には該ビン14cか挿入される位置合せ用の孔が設けら
れていて両者の位置合ぜが行なわれるようになっている
う 第4図は本発明によるマイクロコンどエータの構造を示
″′r組立断面図である。
Note that the microcomputer socket 14 is provided with an alignment pin 14c, and the EPROM socket 12 is provided with an alignment pin 14c.
is provided with an alignment hole into which the bottle 14c is inserted, so that the two can be aligned. FIG. 4 shows the structure of the microcomputer according to the present invention. It is an assembled sectional view.

同図において、11はEPROM、12はEPROM用
ソケット、13はマイクロコンピュータ、14けマイク
ロコンピュータ用ソケット、15は固定金具、16iプ
リント板、12 a fl EPROM用ソケットのコ
ンタクト、12 bij−EPRO&i用ソケットの下
面に設けられ、マイクロコンピュータの上面の電極に接
触するコンタク)、14auマイクロコンピュータ用ソ
ケットのコンタクト、14bは該ソケットの下面に設け
られ、プリント板の・ゼターンに接続される電極、14
Cは位置合せ用ビンをそれぞれ示している。
In the same figure, 11 is an EPROM, 12 is an EPROM socket, 13 is a microcomputer, 14 is a microcomputer socket, 15 is a fixture, 16i printed board, 12 is a fl EPROM socket contact, and 12 is a bij-EPRO&i socket. A contact (14b) of the 14au microcomputer socket (14b) is an electrode (14b) provided on the underside of the socket and connected to the zetern of the printed circuit board (14).
C indicates the alignment bins.

コンタクト12a、12b、14aUそれぞればね性を
有し相手電極に接触するようになっており、−Tイクロ
コンピュータ用ソケット14の下面の電極14bはプリ
ント板16のパターンに半田付けされるようになってい
る。
The contacts 12a, 12b, and 14aU each have a spring property and come into contact with a mating electrode, and the electrode 14b on the lower surface of the -T microcomputer socket 14 is soldered to the pattern on the printed circuit board 16. There is.

EPROM用ソケット12とマイクロコンピュータ用ソ
ケット14とはそれぞれEPROMI 1、マイクロコ
ンピュータ13を収容し、位置合せ用ビン14cによっ
て位置合せされ、固定金具15によって固定され本発明
C゛マイクロコンピユータ奪取される。
The EPROM socket 12 and the microcomputer socket 14 accommodate the EPROMI 1 and the microcomputer 13, respectively, and are aligned by the alignment bin 14c and fixed by the fixing fittings 15 to obtain the microcomputer of the present invention C.

(7)  発明の効果 以上詳細に説明したように、本発明のマイクロコンピュ
ータtrxLccWI令のマイクロコンピュータを収容
したソケットの上に、LCC構造のEPROMを収容し
たソケットを搭載することにより、小型に虜57され、
かつEPROMの着脱が容易であり、EPROMの書替
が極めて容易にlし仲るといった効果大なるものである
(7) Effects of the Invention As explained in detail above, by mounting a socket containing an EPROM of an LCC structure on a socket containing a microcomputer of the trxLccWI order of the present invention, the microcomputer of the present invention can be miniaturized. is,
Moreover, it is easy to attach and detach the EPROM, and the EPROM can be rewritten very easily, which is a great effect.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はEPROMの1・替え方法を説明するたぬのド
′、第2図は従来のEPROM用ソケットの構造を示す
図、第3図および第4図は不発明によるマイクロコンピ
ュータの構造金示す図であり、第3図は分解糾祝図、第
4図は組立断ばである。 図面において、11にEPROM、12はEPROMl
+3ソケット、13V:Lマイクロコンピュータ、14
ばマイクロコンピュータ用ソケット、15に固定金具、
16にグリント研を・それぞれ示す。 特許出願人 富士通株式会社 特許出願代理人 弁理士  宵 木    朗 弁理士  西 舘 和 之 弁理士  内  1) 幸  男 弁理士   山  口  昭  2 第 1図 第 2図
Fig. 1 is a drawing explaining how to replace an EPROM, Fig. 2 is a diagram showing the structure of a conventional EPROM socket, and Figs. FIG. 3 is an exploded view, and FIG. 4 is an assembled cross-section. In the drawing, 11 is an EPROM, and 12 is an EPROM1.
+3 socket, 13V: L microcomputer, 14
A socket for a microcomputer, a fixing metal fitting at 15,
16 shows Glint Lab. Patent applicant Fujitsu Ltd. Patent agent Akira Yoiki Patent attorney Kazuyuki Nishidate 1) Yukio Patent attorney Akira Yamaguchi 2 Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 1、 側面及び上面にそれぞれ複数個の電極を有するリ
ードレスチップキャリヤ1造のマイクロコンピュータを
収容したソケットの上に、側面に複数個のt極を有する
リードレスチップキャリヤ1造の半導体記憶装置を収容
し友ソケットを着脱自在に搭載して成り、前記半導体記
憶装置用ソケットには半導体記憶装置を収容する凹部の
内仙に半導体記憶装置の電極に接触する複数個のコンタ
クトを設けると共Vこソケット底面には@記マイクロコ
ンピュータの上面の電*Ki触する複数個のコンタクト
を設け、前記マイクロコンピュータのソケットには前4
1’マイクロコンピユータを収容する凹部の内側に前記
マイクロコンピュータの電極に接触する複数個のコンタ
クトを設けると共に、ソケット底面にはプリント基鈑の
/母ターンに接続する複数個の電極を設けた仁とを特徴
とするマイクロコンピュータ。
1. A semiconductor memory device made of one leadless chip carrier having a plurality of T-poles on the side surface is placed on a socket housing a microcomputer made of one leadless chip carrier having a plurality of electrodes on the side and top surfaces respectively. The semiconductor memory device socket is provided with a plurality of contacts in contact with the electrodes of the semiconductor memory device on the inner side of the recess for accommodating the semiconductor memory device. The bottom of the socket is provided with a plurality of contacts that contact the top surface of the microcomputer mentioned above.
1' A plurality of contacts for contacting the electrodes of the microcomputer are provided inside the recess that accommodates the microcomputer, and a socket is provided on the bottom surface of the socket with a plurality of electrodes for connecting to the mother turn of the printed circuit board. A microcomputer featuring:
JP57091374A 1982-05-31 1982-05-31 Microcomputer Pending JPS58209148A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57091374A JPS58209148A (en) 1982-05-31 1982-05-31 Microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57091374A JPS58209148A (en) 1982-05-31 1982-05-31 Microcomputer

Publications (1)

Publication Number Publication Date
JPS58209148A true JPS58209148A (en) 1983-12-06

Family

ID=14024594

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57091374A Pending JPS58209148A (en) 1982-05-31 1982-05-31 Microcomputer

Country Status (1)

Country Link
JP (1) JPS58209148A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5479051A (en) * 1992-10-09 1995-12-26 Fujitsu Limited Semiconductor device having a plurality of semiconductor chips
US5523608A (en) * 1992-09-01 1996-06-04 Sharp Kabushiki Kaisha Solid state imaging device having a solid state image sensor and its peripheral IC mounted on one package

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5523608A (en) * 1992-09-01 1996-06-04 Sharp Kabushiki Kaisha Solid state imaging device having a solid state image sensor and its peripheral IC mounted on one package
US5479051A (en) * 1992-10-09 1995-12-26 Fujitsu Limited Semiconductor device having a plurality of semiconductor chips

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