JPS58207118A - Power supply device - Google Patents
Power supply deviceInfo
- Publication number
- JPS58207118A JPS58207118A JP7878882A JP7878882A JPS58207118A JP S58207118 A JPS58207118 A JP S58207118A JP 7878882 A JP7878882 A JP 7878882A JP 7878882 A JP7878882 A JP 7878882A JP S58207118 A JPS58207118 A JP S58207118A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- voltage
- circuit
- regulator
- reg2
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/577—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices for plural loads
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Control Of Voltage And Current In General (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、複数個の電子回路に箪涙電圧を供線するのに
好適な電源装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power supply device suitable for supplying a dielectric voltage to a plurality of electronic circuits.
複数個の電子回路からなるシステムにおいて、主導的な
回路(例えばディジタル回鮎)と、それに従属する回路
(611えげアナログ回路)がある場合、従属側回路が
主導側回路から解放されて不用意な動作を防止するため
に、主導側回路の電画が立ち上り安定した徒に従P砥側
回路の電源を立ち上け、we弄断晴には先に従属側回路
の%淵を立下けてから主導僻回路の電首を立ち下げる必
要がある。W数の電子回路からなるシステムにおいて、
各回路の電源は共通の皐−電首からレギュレータを介し
て取るのが普通である。星−の電源からレギュレータを
介して主導側回路とこれに従属する電子回路にV:源電
圧を供給する場を、上記したように共通の宵、源の投入
/遮断暗に各電子回路の電源電圧の立ち上り/立ち下り
の順序を規制するKは伺人らかの制御手段が必要である
。このような制御手段を有する複数の電子回路からなる
システムにおける位来の電源装置を第1夕IK示す。In a system consisting of multiple electronic circuits, if there is a leading circuit (for example, a digital circuit) and a subordinate circuit (611 analog circuit), the subordinate circuit may be released from the leading circuit, causing an accidental situation. In order to prevent this, turn on the power supply of the slave side circuit when the power of the leading side circuit starts up and becomes stable, and when the power goes off, turn off the power of the slave side circuit first. After that, it is necessary to turn off the power line of the main remote circuit. In a system consisting of an electronic circuit with a number of watts,
The power source for each circuit is usually taken from a common power supply via a regulator. As mentioned above, the source voltage is supplied from the main power supply to the main circuit and the electronic circuits subordinate to it via the regulator, and the power source for each electronic circuit is turned on/off at the same time as described above. K, which regulates the order of voltage rise/fall, requires a control means by the person in charge. A conventional power supply device in a system consisting of a plurality of electronic circuits having such a control means is shown in the first example.
第1図において、SOけ交流電σ、J、BEは整流平滑
回路、REG工、R2O3けt源SOの出力を共通の入
力とするレギュレータ、Lo工、 Lo□はそれぞれ電
子回路で、この場合電子回路LO□を主導側の電子回路
、Lo2を従属側の電子回路として示゛す。DTは主導
側のレギュレータREG□の出力電圧を検出する検出回
路で、その検出信aBは従r側レギュレータREG2に
設けらり、たスイッチSWを駆動する。In Figure 1, the SO output AC currents σ, J, and BE are rectifier and smoothing circuits, REG circuits, regulators that use the output of the R2O3 ket source SO as a common input, and Lo circuits and Lo□ are electronic circuits. Circuit LO□ is shown as a leading electronic circuit, and Lo2 is shown as a subordinate electronic circuit. DT is a detection circuit that detects the output voltage of the regulator REG□ on the leading side, and its detection signal aB is provided to the slave regulator REG2 and drives the switch SW.
このような従来の笥、源装置においては、主導側レギュ
レータREG1の出力が立ち上ったのを給出回路DTで
檜出し、その検出信号SでスイッチSWをオンKしてレ
ギュレータREG2の出力電圧を従属回路Lo2 K供
給する。同様に電源の立ち下り(検出回路DTで検出し
、その検出信号SでスイッチSWをオンにして従属側の
レギュレータREG2の出力の立ち下りのタイミングを
制御するようにしている。このようが第1図の電沖装情
は複数の電子回路を有するシステムの電挿回路として従
来より用いられているが、
0) モノマルチ等を含む独立が検出回路DTを必要と
する。In such a conventional power source device, the rising output of the main side regulator REG1 is detected by the supply circuit DT, and the detection signal S turns on the switch SW to control the output voltage of the regulator REG2. Supply circuit Lo2 K. Similarly, the fall of the power supply is detected by the detection circuit DT, and the detection signal S is used to turn on the switch SW to control the timing of the fall of the output of the dependent regulator REG2. The electrical system shown in the figure has been conventionally used as an electrical insertion circuit in a system having multiple electronic circuits, but: 0) An independent detection circuit DT is required, including mono-multiple circuits.
(ロ) 電源立ち下り時のマージンがとりにくい。(b) It is difficult to maintain a margin when the power supply drops.
を4 レギュレータREG1とREG2側の電源コモン
が分離されている鳩舎には、光アイソレータ笛の特別な
配、Wが必要である。4. A special arrangement of optical isolator whistles, W, is required for pigeon lofts where the power supply commons on the regulators REG1 and REG2 sides are separated.
箸の問題を有していた。大発明はこれらの間喚点を一掃
したもので、その実施例のブロック図を第2図に示寸。Had a problem with chopsticks. The great invention was to eliminate these shortcomings, and a block diagram of its embodiment is shown in Figure 2.
た2図において、SOは交流%1:1ilt、SEは整
流壬滑回Q、REGlは主導側同社のレギュレータ、R
EG2け従属側回路のレギュレータ、LO□け主導側の
電子回路、Lo□は従w、側の電−7−[61F’であ
る。In Figure 2, SO is AC %1:1ilt, SE is rectifier Q, REGl is the company's regulator on the leading side, and R is
EG2 is the regulator of the slave side circuit, LO□ is the electronic circuit on the main side, and Lo□ is the slave w side electric circuit -7-[61F'.
電源SOの出力は整/lIf平滑回rv SEで整流平
滑さね、その平滑出力であるW流電圧V□はレギュレー
タREG□、 REG2に共通に加えられる。この直流
電圧V□は一定の立ち上り鴫定数、立ち下り時定斂をも
つもので、その波形の一例を第3図の(イ)に示す。な
お、第51421 (44において、Vs□け主導@n
レギエレータREG1のスレシホールド電圧を、VS2
は従属側レギュレータREG2のスレシホールド電圧を
示すもので、実施例ではVs□<、VS2<Vlに選ば
ハでいる。The output of the power supply SO is rectified and smoothed by a rectification/lIf smoothing circuit rvSE, and its smoothed output, the W current voltage V□, is commonly applied to the regulators REG□ and REG2. This DC voltage V□ has a constant rise constant and a constant fall time constant, and an example of its waveform is shown in FIG. 3(a). In addition, No. 51421 (in 44, Vs□ke led @n
The threshold voltage of regierator REG1 is set to VS2
indicates the threshold voltage of the dependent side regulator REG2, and in the embodiment, Vs<□ and VS2<Vl are selected.
したがって、直流電圧v1がレギュレータREG1に加
えらねると、V□) Vs□の期間、レギュレータRE
G1は波高値がVslで規制された第3図(ロ)に示す
安定化電圧vO□を出力し、この安定化電圧V01は主
導側電子回路LOに誉カ・電圧として加えられる。壕ま
た、直流電圧v1がレギュレータREG2’に加えられ
ると、vl〉Vs2の期間、レギュレータREG2は波
高値がVs−で却制された第3図1e→に示す安定化電
圧vO3(Vs工< Vo < VS2 )を出力し
、この安定化電圧vO□は従」仲回路LO□に加えられ
る。このように、ヌレシホールドT圧VB1とVS2の
大き宴の差に起因してレギュレータREG1の出力電圧
vO□に対して、レギュレータREG2の出力電圧VO
2は第3図(ロ)、(ハ)から明らかな如く確実に遅延
時間TDonと先行時間TDoff を持つことになる
。よって、複数個の電子回路Lo1. Lo2をもつシ
ステムにおいて、電源投入時においては従属側電子回路
I、02の電源は主導側電子回路Lo1の電源電圧が立
ち上シ安定したのち加えられる。虜た、電源遮断時には
従属側電子回路LO3の電源が立ち下ったのち主導側電
子回路Lo工の電源が立ち下がることになる。したかっ
て、従部側回路LO□が主導側電子回路L01から蹟放
されて不用意な動作が起ることが確実に防止される。Therefore, if the DC voltage v1 is not applied to the regulator REG1, during the period of Vs□, the regulator RE
G1 outputs a stabilized voltage vO□ shown in FIG. 3 (b) whose peak value is regulated by Vsl, and this stabilized voltage V01 is applied to the leading electronic circuit LO as an output voltage. Furthermore, when the DC voltage v1 is applied to the regulator REG2', during the period of vl>Vs2, the regulator REG2 becomes the stabilized voltage vO3 (Vs<Vo) shown in FIG. <VS2), and this stabilized voltage vO□ is applied to the slave circuit LO□. In this way, due to the large difference between the null threshold T pressures VB1 and VS2, the output voltage VO of the regulator REG2 is
As is clear from FIGS. 3(b) and 3(c), time 2 definitely has a delay time TDon and a lead time TDoff. Therefore, a plurality of electronic circuits Lo1. In a system having Lo2, when the power is turned on, the power to the slave electronic circuits I and 02 is applied after the power supply voltage of the leading electronic circuit Lo1 has started up and stabilized. When the power is cut off, the power to the slave electronic circuit LO3 is turned off, and then the power to the leading electronic circuit LO is turned off. Therefore, it is reliably prevented that the slave side circuit LO□ is disconnected from the master side electronic circuit L01 and an unexpected operation occurs.
レギュレータREG1fたはREG2の具体的回路構成
としては特に)−I−1定するものではないが、レギュ
レータREG2の実鮒の一例を第4図に示す。第4りl
において、■□は第2図で示した整汐平滑回路REの出
力直済電圧を示すものである。D□、D2はツェナーダ
イオード、R工〜R5は析損素子、 TR1〜TR3は
トランジスタ、C1はコンデンサである。ツェナーダイ
オードD1のツェナー電圧はレギュレータREG2のス
レシホールド電圧VS2を決定している。P蒲平滑電圧
v1がツェナーダイオードD1のツェナー電圧を越える
とこのツェナーダイオードはオンになり、抵抗素子R2
を通してトランジスタTR工にペース電流が流れてTR
1がオンになり、TR2がオフになるOその結果、抵抗
R4とR51ツェナーダイオードD2゜コンデンサC1
およびトランジスタTR3よりなる回路は公知のシリー
ズレギュレータとなり、制御電圧VC2により出力電圧
Vc2t” Vo□が得られる。この出力電圧vO□は
第3図の(ハ)iv波形となり、前t’ した従属側電
子回路L02に電源電圧として加えられる。vl〈Vs
2となるとツェナーダイオードD1がオフになり、その
結果トランジスタTRIA+オフ、TR2がオンになる
ため、制御電圧Vc2+=O、すなわちvO□−0とな
る。第4図の回路にふいて、コンテンサC工は抵抗素子
R4,R5とともに一定の時定数を椿たせ、小力電圧V
O2の立ち上り時の回路への急tie、 3ラツシユカ
レントを緩和濱ゼると同時にツェナーダイオードD2に
よるノイズ発生を抑止するものでおる。なお、第4rj
Ilの回路において、抵抗素子R5けトランジスタTR
2がオンするときにコンデンサC□にチャージさhた電
荷によシ破壊されることを防止するものであるが必ずし
も必要ないものである。Although the specific circuit configuration of the regulator REG1f or REG2 is not fixed in particular, an example of the real carp of the regulator REG2 is shown in FIG. 4th ril
, □ indicates the output direct voltage of the rectifying and smoothing circuit RE shown in FIG. D□ and D2 are Zener diodes, R to R5 are loss generating elements, TR1 to TR3 are transistors, and C1 is a capacitor. The Zener voltage of the Zener diode D1 determines the threshold voltage VS2 of the regulator REG2. When the P voltage smoothed voltage v1 exceeds the Zener voltage of the Zener diode D1, this Zener diode turns on, and the resistance element R2
A pace current flows to the transistor TR through
1 turns on and TR2 turns off. As a result, resistor R4 and R51 zener diode D2 ° capacitor C1
The circuit consisting of transistor TR3 and transistor TR3 becomes a well-known series regulator, and an output voltage Vc2t''Vo□ is obtained by control voltage VC2.This output voltage vO□ has the (c)iv waveform in FIG. Applied to the electronic circuit L02 as a power supply voltage.vl<Vs
2, the Zener diode D1 is turned off, and as a result, the transistor TRIA+ is turned off and TR2 is turned on, so that the control voltage Vc2+=O, that is, vO□-0. In the circuit shown in Fig. 4, the capacitor C has a constant time constant with resistance elements R4 and R5, and a small voltage V
This is intended to alleviate the sudden tie and rush current to the circuit when O2 rises, and at the same time suppress noise generation by the Zener diode D2. In addition, the 4th rj
In the circuit of Il, resistor R5 and transistor TR
This is to prevent the capacitor C□ from being destroyed by the electric charge when the capacitor C□ is turned on, but it is not necessarily necessary.
前記したように、このレギュレータREG2は必ずしも
第4図と同一構成のものでなくてもよく、またレギュレ
ータREG□の構成も特定するものではなし、第4図の
回路であってもよい。蚤するに5レギユレータREG1
はスレシホールド電圧Vs1をもち、レギュレータRE
G2けスレシホールド賃、庄V82 ヲ4ち、そしてと
のVs□とVB2との間にはVsl< VB2の関係が
あシ、またこれらが整流平滑電圧v1に対してvSl<
VB2〈Vlの関係があるレギュレータであればよい。As described above, this regulator REG2 does not necessarily have the same configuration as that shown in FIG. 4, and the configuration of the regulator REG□ is also not specified, and may be the circuit shown in FIG. 4. Flea 5 Regulator REG1
has a threshold voltage Vs1, and the regulator RE
There is a relationship of Vsl<VB2 between Vs□ and VB2 of G2, V82, and VB2, and these also have a relationship of VSl<VB2 with respect to the rectified and smoothed voltage v1.
Any regulator that has a relationship of VB2<Vl may be used.
このよう々構成の本発Rtj においては、(イ)′
各V半回W#ぼけレギユレータにより安定化された電源
電圧≠;加えられるが、このレギュレータのスレシホー
ルドレベルをb定すわば良−く、第1図装置の如く特別
な検出回路DTを不貼とし、その結果#威が簡略化され
る。In the main source Rtj configured in this way, (a)'
The power supply voltage stabilized by each V/half W# blur regulator is applied, but it is only necessary to determine the threshold level of this regulator, and a special detection circuit DT is not required as in the device shown in Fig. 1. As a result, #width is simplified.
1口)′ 直流電圧Viが本質的にもつ立ち上り/立ち
下り時の時定数によシ時間差を検出するようにしている
ので、そのシーケンスi−を羅実に保証さすする。また
、電源の立ち下り時、従来方式に比して十分なマージン
がある。1)' Since the time difference is detected using the time constant at the time of rise/fall that the DC voltage Vi essentially has, the sequence i- is guaranteed to be accurate. Furthermore, when the power supply is turned off, there is a sufficient margin compared to the conventional method.
(ハ)′ レギュレータ自身て電源の立ち上り、立ち下
りを検出しているので、電源コモンの共通/分離を問わ
ない。(c)' Since the regulator itself detects the rise and fall of the power supply, it does not matter whether the power supply common is common or separate.
等の特長がある。It has the following features.
第1図は従来の1f源@置のブロックρ1、第2ダは本
発明装置の一実、、加、例を示すブロック−1、第31
111111: 。
図は大発明装置の動作を説明するための波形図、第4図
は第2図装置に用いられるレギュレータREG2の具体
的回路図である。
ST!、・・・整流平滑回路、REGl、RBG2・・
・レギュレータ。
第 11ね
第 2 眠FIG. 1 shows the block ρ1 of the conventional 1f source @ position, and the second block shows an example of the device of the present invention.
111111: . The figure is a waveform diagram for explaining the operation of the device of the great invention, and FIG. 4 is a specific circuit diagram of the regulator REG2 used in the device of FIG. 2. ST! ,... rectifier smoothing circuit, REGl, RBG2...
·regulator. 11th sleep 2nd sleep
Claims (1)
力としそれぞれスレシホールドレベルカ異なる複数個の
レギュレータを具備し、前記直流源電圧として供給する
ように被成した電源装置。A power supply device that is configured to input a DC voltage having constant rise and fall time constants, and is provided with a plurality of regulators each having a different threshold level, and is configured to supply the DC voltage as the DC source voltage.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7878882A JPS58207118A (en) | 1982-05-11 | 1982-05-11 | Power supply device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7878882A JPS58207118A (en) | 1982-05-11 | 1982-05-11 | Power supply device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58207118A true JPS58207118A (en) | 1983-12-02 |
Family
ID=13671614
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7878882A Pending JPS58207118A (en) | 1982-05-11 | 1982-05-11 | Power supply device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58207118A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07274511A (en) * | 1994-03-30 | 1995-10-20 | Nec Corp | Image distributor and rectification power supply for image distributor |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53136646A (en) * | 1977-05-06 | 1978-11-29 | Hitachi Ltd | Power source device |
JPS55117431A (en) * | 1979-03-03 | 1980-09-09 | Canon Kk | Power supply system |
-
1982
- 1982-05-11 JP JP7878882A patent/JPS58207118A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53136646A (en) * | 1977-05-06 | 1978-11-29 | Hitachi Ltd | Power source device |
JPS55117431A (en) * | 1979-03-03 | 1980-09-09 | Canon Kk | Power supply system |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07274511A (en) * | 1994-03-30 | 1995-10-20 | Nec Corp | Image distributor and rectification power supply for image distributor |
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