JPS58207117A - Controller - Google Patents

Controller

Info

Publication number
JPS58207117A
JPS58207117A JP9107082A JP9107082A JPS58207117A JP S58207117 A JPS58207117 A JP S58207117A JP 9107082 A JP9107082 A JP 9107082A JP 9107082 A JP9107082 A JP 9107082A JP S58207117 A JPS58207117 A JP S58207117A
Authority
JP
Japan
Prior art keywords
transistor
turned
base
resistor
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9107082A
Other languages
Japanese (ja)
Inventor
Takashi Ikehara
池原　隆志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP9107082A priority Critical patent/JPS58207117A/en
Publication of JPS58207117A publication Critical patent/JPS58207117A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/12—Regulating voltage or current wherein the variable actually regulated by the final control device is ac
    • G05F1/40—Regulating voltage or current wherein the variable actually regulated by the final control device is ac using discharge tubes or semiconductor devices as final control devices
    • G05F1/44—Regulating voltage or current wherein the variable actually regulated by the final control device is ac using discharge tubes or semiconductor devices as final control devices semiconductor devices only
    • G05F1/45—Regulating voltage or current wherein the variable actually regulated by the final control device is ac using discharge tubes or semiconductor devices as final control devices semiconductor devices only being controlled rectifiers in series with the load
    • G05F1/455—Regulating voltage or current wherein the variable actually regulated by the final control device is ac using discharge tubes or semiconductor devices as final control devices semiconductor devices only being controlled rectifiers in series with the load with phase control

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

PURPOSE:To ensure simply a switch between the 100% electric power and the optional voltage, by switching properly the conduction of a semiconductor switching element between the ON/OFF control and the phase control. CONSTITUTION:A transistor TR11 is turned off at the zero cross time point of an AC power supply 1 since a signal of full wave rectification is applied to the base of the TR11. While a TR17 is turned off when the TR11 is turned on. Therefore the potential of a capacitor 20 is turned into a sawtooth signal synchronizing with the power supply 1 and then applied to the base of a TR26. The TR26 conducts with a certain phase angle of the supply 1 in relation to a TR27. A TR31 is turned on when the TR26 is turned on, and the output of the TR31 is differentiated and applied to the base of a TR37. While a TR38 is turned on at the zero cross time point of the supply 1. Therefore a triac 3 conducts completely with full wave when a contact is closed at the side A and then conducts in terms of the phase control when the contact is closed at the side 2 respectively. Thus the electric power having the conduction with a phase angle is applied.

Description

【発明の詳細な説明】 本発明は半導体スイッチング素子にて負荷の通電を制御
する制御装置に関し、特に該半導体スイッチング素子の
導通をオン・オフ制御方式と位相制御方式とに適宜切替
え、負荷に１００％の電力若しくは任意の電力（１００
％以Ｆ）を得られる如くしてなる制御装置に関するもの
である。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control device that controls the conduction of a load using a semiconductor switching element, and more particularly, the present invention relates to a control device that controls the conduction of a load using a semiconductor switching element, and in particular, appropriately switches the conduction of the semiconductor switching element between an on/off control method and a phase control method, and % power or any power (100
% or more F).

以下本発明の制御装置の一実施例を図面と々もに説明す
る。An embodiment of the control device of the present invention will be described below with reference to the drawings.

第１図に於て、■は交流電源、２は負荷、３はトライア
ック等の半導体スイッチング素子（以下、トライアック
で説明する）、４は全波整流ブリッジ、５はツェナーダ
イオード（定電圧ダイオード）、６はダイオード、７は
コンデ／Ｍ、８〜１ｏは抵抗、１１はｎｐｎ　トランジ
スタ、１２はタイオード、１３〜！６は抵抗、１７ｉ：
ｔｎｐｎトランジスタ、１８〜１９は抵抗、２０　ｉｆ
　：Ｊ：／テンサ、２１〜２２は抵抗、２３は呵塵抵抗
器（ポリウノ。）、２４〜２５は抵抗、２６〜２７はｎ
ｐｎトランジスタ、２８〜３０は抵抗、３１はｐ口ｐト
ランジスタ、３２は抵抗、３３はコンデンサ、３４〜３
５は抵抗、３６はダイオード、３７〜３８はｎｐｎトラ
ンジスタ、３９は切替スイッチ、４０はクイ］−ド、４
１はパルストランス、４２はダイオードである。In Fig. 1, ■ is an AC power supply, 2 is a load, 3 is a semiconductor switching element such as a triac (hereinafter referred to as a triac), 4 is a full-wave rectifier bridge, 5 is a Zener diode (constant voltage diode), 6 is a diode, 7 is a capacitor/M, 8~1o are resistors, 11 is an npn transistor, 12 is a diode, 13~! 6 is resistance, 17i:
tnpn transistor, 18-19 are resistors, 20 if
:J:/tensa, 21-22 are resistors, 23 are solid resistors (polyuno.), 24-25 are resistors, 26-27 are n
pn transistor, 28-30 resistor, 31 p-p transistor, 32 resistor, 33 capacitor, 34-3
5 is a resistor, 36 is a diode, 37 to 38 are npn transistors, 39 is a selector switch, 40 is a quadrupole, 4
1 is a pulse transformer, and 42 is a diode.

そ（２て交Ｍｆ電源ｉに負荷２，１−ライア・７り３が
。(The load 2, 1-Liar 7 is connected to the AC Mf power supply i.

直列に接続されて主回路をなしている。該主回路に並列
に余波整流ブリッジ４の入力端が接続されている。そし
てその出力にはツェナーダイオード５及びタイオード６
を介し、て・１；、滑川コンデンサ７か接続されて直流
電源をな１．τいる。該ツエナーダイオード５の両端に
抵抗８，９が接続されている。また、直流電源に抵抗１
３〜１５が接続されていて、抵抗８，９の接続端はトラ
ンジスタ１１のベースに、抵抗１４．１５の接続端はト
ランジスタ１７のベースに接続されている。該トランジ
スタ１１−は抵抗１０を介して直流電源に接続されてい
て、該トランジスタ１１のコレクタと抵抗１０の接続端
は抵抗１６を介してトランジスタ３８のベースに接続さ
れている。そして抵抗１３．１４の接続端とトランジス
タ１１のコレクタはダイオード１２を介して短絡されて
いる。またトランジスタ１７は抵抗１８を介して、直流
電源に接続された抵抗１９とコンデンサ２０の、該コン
デンサ２０の両端に接続されている。該抵抗１９とコン
デンサ２０の接続端は抵抗２１を介してトランジスタ２
６のベースに接続されている。該トランジスタ２６のベ
ースと直流電源の低側間に抵抗２２を介してボリウム２
３が接続されている。該トランジスタ２６のコレクタは
抵抗２５を介して直流電源の高側に接続され、該トラン
ジスタ２６のコレクタと抵抗２５の接続端は抵抗２４を
介してトランジスタ３Ｉのベースに接続されている。該
トランジスタ２６のエミッタはトランジスタ２７のエミ
ッタと短絡されて抵抗２８を介して直流電源の低側に接
続され、該トランジスタ２７のコレクタは直流電源の高
側に接続されている。またトランジスタ２７のベースは
、直流電源に接続された抵抗２９．３０の接続端に接続
されている。１−記トランジスタ３１のエミ・ツタは直
流電源に接続され、コレクタは抵抗３２．３４コンデン
サ３３よりなる微分回路の入力に接続されている。該抵
抗３４の両端には逆極性をなすダイオード３６が並列に
接続され、上記微分回路の出力は抵抗３５を介シてトラ
ンジスタ３７のベースに接続されている。上記トランジ
スタ８７．８８は切替スイッチ３９を介して並列に接続
され、該切替スイッチ３９はパルスＩ・ランス４．１１
の一次側を介して直流電源の高側に接続されている。該
パルストランスの一次側には逆極性をなす保護ＩＴＩダ
イオード４０が並列に接続され、該パルストランス４１
の−０次側はダイオード４２を介してトライアック３の
ゲート（Ｇ）　−（Ｔ＋　）端子間に接続されている。They are connected in series to form the main circuit. The input end of the aftermath rectifier bridge 4 is connected in parallel to the main circuit. And the output has Zener diode 5 and diode 6.
1; Namekawa capacitor 7 is connected to the DC power source 1. There is τ. Resistors 8 and 9 are connected to both ends of the Zener diode 5. Also, a resistor 1 is connected to the DC power supply.
The connecting ends of resistors 8 and 9 are connected to the base of transistor 11, and the connecting ends of resistors 14 and 15 are connected to the base of transistor 17. The transistor 11- is connected to a DC power supply via a resistor 10, and the connection end between the collector of the transistor 11 and the resistor 10 is connected to the base of a transistor 38 via a resistor 16. The connection ends of the resistors 13 and 14 and the collector of the transistor 11 are short-circuited via a diode 12. Further, the transistor 17 is connected via a resistor 18 to both ends of a resistor 19 and a capacitor 20, which are connected to a DC power source. The connection end between the resistor 19 and the capacitor 20 is connected to the transistor 2 via the resistor 21.
It is connected to the base of 6. Volume 2 is connected via a resistor 22 between the base of the transistor 26 and the low side of the DC power source.
3 is connected. The collector of the transistor 26 is connected to the high side of the DC power supply via the resistor 25, and the connection end between the collector of the transistor 26 and the resistor 25 is connected via the resistor 24 to the base of the transistor 3I. The emitter of the transistor 26 is short-circuited to the emitter of a transistor 27 and connected to the low side of the DC power supply via a resistor 28, and the collector of the transistor 27 is connected to the high side of the DC power supply. Further, the base of the transistor 27 is connected to the connecting end of a resistor 29, 30 connected to a DC power source. 1- The emitter and ivy of the transistor 31 are connected to a DC power supply, and the collector is connected to the input of a differentiating circuit consisting of a resistor 32, a capacitor 33, and a capacitor 33. A diode 36 of opposite polarity is connected in parallel to both ends of the resistor 34, and the output of the differential circuit is connected to the base of a transistor 37 via a resistor 35. The transistors 87 and 88 are connected in parallel via a changeover switch 39, and the changeover switch 39 is connected to the pulse I/lance 4.11.
is connected to the high side of the DC power supply through the primary side of the A protective ITI diode 40 having a reverse polarity is connected in parallel to the primary side of the pulse transformer.
The -0th order side of the triac 3 is connected between the gate (G) and (T+) terminals of the triac 3 via a diode 42.

第２図に於て、イはトランジスタ１１のコレクタ信す、
口は微分回路の出力信り°、ハはトライアック３のゲー
ト信５、二は負荷２の通電波形、ホは交流電源波形であ
る。また（Ａ）は第１図の切替スイッチ３７の接点を（
イ）側にしたとき、（Ｂ）は（Ｂ）側にしたときのもの
である。In FIG. 2, A is the collector of transistor 11,
3 is the output signal of the differential circuit, C is the gate signal 5 of the triac 3, 2 is the energizing waveform of the load 2, and E is the AC power waveform. (A) also shows the contact point of the changeover switch 37 in Fig. 1 (
(B) is when it is on the (B) side.

以］−構成の制御装置に於て、トランジスタ１１のベー
スには全波整流（平滑前）の信号が印加されているので
トランジスタ１１は交流電源１のゼロクロス時（略０．
７Ｖ以ド）オフ（ＯＦＦ）となる。In the control device having the following configuration, since a full-wave rectified (before smoothing) signal is applied to the base of the transistor 11, the transistor 11 is activated at the zero cross of the AC power supply 1 (approximately 0.
7V or higher, it becomes OFF.

（それ以外はオン（ＯＮ））、従ってトランジスタ１１
のコレクタは短時間パルス状に（電源のゼロクロス時に
同期して）高（６）信号となる。また、トランジスタＩ
ＩのＯＮ時、トランジスタ１７のベース信号はダイオー
ドＩ　２　、　ｌ−ランジスタ１１を介してバイパスさ
れる為、トランジスタ１７はＯＦ　Ｆである。（交流電
源１のゼロクロス時ＯＮ）。(Otherwise ON), therefore transistor 11
The collector of is briefly pulsed to a high (6) signal (synchronized with the zero cross of the power supply). Also, transistor I
When I is on, the base signal of the transistor 17 is bypassed via the diode I 2 and the l-transistor 11, so the transistor 17 is off. (ON at zero cross of AC power supply 1).

従ってコンデンサ２０はトランジスタ１７のＯＦＦ時に
抵抗１９を介して充電し、トランジスタ１７のＯＮ時に
低抵抗１８．トランジスタ１７を介して放電される。そ
の為コンデンサ２０の電位は交流電源に同期（ゼロクロ
ス時に低レベル）シタ鋸歯状信号となる。そして該鋸歯
状信号は抵抗２１を介して、抵抗２２．ボリウム２３に
よりレベル調整されてトランジスタ２６のベース信号と
して印加される。トランジスタ２６．２７は差動増幅器
を構成して居り、他方のトランジスタ２７のベースには
抵抗２９．３０により決定せられる基べｆ′倍信号印加
されている。従ってトランジスタ２６のベース信号（鋸
歯状信号）がトランジスタ２７のベース信号以上のレベ
ルとなった時点でトランジスタ２６はＯＮする。即ち交
流電源１のある位相角で導通ずる。トランジスタ２６が
ＱＨするとトランジスタ２６のフレフタ電位は低レベル
（ＯＦＦ時は高レベル）となるので、トランジスタ３１
はＯＮ’する。そして、抵抗３２，３４、コンデン→Ｊ
３３よりなる微分回路により微分されて（第２図口の如
く）抵抗３５を介してトランジスタ３７のべ−スに印加
される。一方トランジスタ３８のベースには抵抗１６を
介してトランジスタ１１のコレクタ信号（第２図イ）が
印加されているので、トランジスタ３８は交流電源１の
ゼロクロス時にパルス状にＯＮ、またトランジスタ３７
はトランジスタ２６．３１の０８時（ある位相角で）パ
ルス状にＯＮする。従ってパルストランス４１に発生（
誘起）される信号は、切替スイッチ３９が（Ａ）側の接
点に閉成されているときは第２図（４）ハの如くとなり
、（Ｂ）側の接点に閉成されているときは第２図（６）
ハの如くとなる。Therefore, the capacitor 20 is charged via the resistor 19 when the transistor 17 is OFF, and is charged by the low resistance 18 when the transistor 17 is ON. It is discharged through transistor 17. Therefore, the potential of the capacitor 20 becomes a sawtooth signal synchronized with the AC power supply (low level at zero cross). The sawtooth signal is then passed through resistor 21 to resistor 22 . The level is adjusted by the volume controller 23 and applied as a base signal to the transistor 26 . Transistors 26 and 27 constitute a differential amplifier, and a signal multiplied by f' determined by resistors 29 and 27 is applied to the base of the other transistor 27. Therefore, when the base signal (sawtooth signal) of the transistor 26 reaches a level higher than the base signal of the transistor 27, the transistor 26 is turned on. That is, conduction occurs at a certain phase angle of the AC power source 1. When the transistor 26 is QH, the flipter potential of the transistor 26 becomes a low level (high level when OFF), so the transistor 31
turns on. And resistance 32, 34, capacitor → J
The voltage is differentiated by a differentiator circuit 33 and applied to the base of a transistor 37 via a resistor 35 (as shown at the beginning of FIG. 2). On the other hand, since the collector signal of the transistor 11 (FIG. 2A) is applied to the base of the transistor 38 via the resistor 16, the transistor 38 is turned on in a pulsed manner at the zero cross of the AC power supply 1, and the transistor 37
is turned on in a pulsed manner at 08 o'clock (at a certain phase angle) of the transistor 26.31. Therefore, it occurs in the pulse transformer 41 (
The induced signal is as shown in Fig. 2 (4) C when the changeover switch 39 is closed at the contact on the (A) side, and as shown in Fig. 2 (4) C when the switch 39 is closed at the contact on the (B) side. Figure 2 (6)
It will look like ha.

従って、接点が（Ａ）側に閉成されているときは、トラ
イアック３のゲートには第２図（６）ハの如く、交流電
源１（第２図ホ）のゼロクロス時に同期したパルス信号
が印加される為、トライアック３は全波で完全に導通す
る。従って負荷２には第２図（６）二の如くの１００％
電力が印加される。また切替スイッチ３９の接点かの）
側に閉成されているときはパルストランス４１には、２
２図（Ｂ）ハの如くある位相角でパルス信号が誘起され
る為、その時点でトライアック３はゲート信号が供給さ
れる為トライアック３は位相制御的に導通し、負荷２に
は第２図（ト））二の如くの位相角（α）で通電された
電力が印加される。そして、この場合の電力はボリウム
２３を可変することにより可変できる。即ちボリウム２
３の値が大きいときは鋸歯状借りのレベルか高くなる為
交流電源の甲い時点、（大きい導通角）でトランジスタ
２６即ちトライアック３がＯＮ　’ｔ、、ボリウムの値
か小さいときは鋸歯状借６７のレベルが低くなる為交流
電源の遅い時点（小さい導通角）でトランジスタ２６即
ちトライアック３がＯＮする。Therefore, when the contact is closed to the (A) side, the gate of the triac 3 receives a pulse signal synchronized with the zero cross of the AC power supply 1 (Fig. 2 E) as shown in Fig. 2 (6) C. Since the voltage is applied, the triac 3 is completely conductive for all waves. Therefore, load 2 has 100% as shown in Figure 2 (6) 2.
Power is applied. Also, the contact of the changeover switch 39)
When the pulse transformer 41 is closed on the side, the pulse transformer 41 has 2
Since a pulse signal is induced at a certain phase angle as shown in Figure 2 (B) C, the triac 3 is supplied with the gate signal at that point, so the triac 3 conducts in a phase controlled manner, and the load 2 receives the signal shown in Figure 2. (g)) Electric power is applied at a phase angle (α) such as 2. The power in this case can be varied by varying the volume 23. That is, volume 2
When the value of 3 is large, the level of the sawtooth borrowing becomes high, so at the high point of the AC power supply (large conduction angle), the transistor 26, that is, the triac 3, is turned on.If the value of the volume is small, the sawtooth borrowing becomes high. Since the level of 67 becomes low, the transistor 26, that is, the triac 3 is turned on at a late point in time (small conduction angle) of the AC power supply.

以上説明の如く、位相制御のみては１００％の電力を負
荷は消費できす、ＯＮ　、　ＯＴ：　Ｆ制御のみては任
意の電力を負荷は消費できないが、本発明に依れは、切
替スイッチを切替るたけで簡単に１００％の電力と任意
の電力を１切：り替ることができ、しかもボリウムを可
変設定するだけで任意の電力が得られ、その上簡単な構
成で可能な為非常に有用で１本。As explained above, the load can consume 100% of the power only with phase control, and the load cannot consume any power with only ON, OT:F control, but according to the present invention, the load can consume 100% of the power using the changeover switch. You can easily switch between 100% power and any desired power by just switching, and you can obtain any desired power by simply setting the volume variable. Moreover, it is possible with a simple configuration, so it is very convenient. One useful book.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明の制御装置の一実施例を示す回路図、第
２図は第１図の主要各部の信号波形図である。 図面中、２は負荷、３は半導体スイッチング素モ、３９
は切替スイッチを示す。 代理人　弁理士　福　士　愛　彦（他２名）ｌFIG. 1 is a circuit diagram showing an embodiment of the control device of the present invention, and FIG. 2 is a signal waveform diagram of each main part of FIG. 1. In the drawing, 2 is a load, 3 is a semiconductor switching element, 39
indicates a changeover switch. Agent Patent attorney Aihiko Fuku (and 2 others)

Claims (1)

【特許請求の範囲】[Claims] １　半導体スイッチング素子にて負荷の通電を制御する
制御装置に於て、該半導体スイッチング素子の導ａをオ
ン・オフ制御方式と位相制御方式とに適宜切替える切替
手段を具備してなることを特徴とする制御装置。1. A control device for controlling energization of a load using a semiconductor switching element, characterized by comprising a switching means for appropriately switching conductor a of the semiconductor switching element between an on/off control method and a phase control method. control device.
JP9107082A 1982-05-27 1982-05-27 Controller Pending JPS58207117A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9107082A JPS58207117A (en) 1982-05-27 1982-05-27 Controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9107082A JPS58207117A (en) 1982-05-27 1982-05-27 Controller

Publications (1)

Publication Number Publication Date
JPS58207117A true JPS58207117A (en) 1983-12-02

Family

ID=14016237

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9107082A Pending JPS58207117A (en) 1982-05-27 1982-05-27 Controller

Country Status (1)

Country Link
JP (1) JPS58207117A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63231606A (en) * 1987-03-20 1988-09-27 Matsushita Electric Ind Co Ltd Power supply circuit
JPS6455095A (en) * 1987-08-24 1989-03-02 Matsushita Electric Ind Co Ltd Logic switching circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63231606A (en) * 1987-03-20 1988-09-27 Matsushita Electric Ind Co Ltd Power supply circuit
JPS6455095A (en) * 1987-08-24 1989-03-02 Matsushita Electric Ind Co Ltd Logic switching circuit

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