JPS58205865A - Two-electrode type digital display conductivity measuring circuit - Google Patents

Two-electrode type digital display conductivity measuring circuit

Info

Publication number
JPS58205865A
JPS58205865A JP16570682A JP16570682A JPS58205865A JP S58205865 A JPS58205865 A JP S58205865A JP 16570682 A JP16570682 A JP 16570682A JP 16570682 A JP16570682 A JP 16570682A JP S58205865 A JPS58205865 A JP S58205865A
Authority
JP
Japan
Prior art keywords
converter
conductivity
voltage
cell
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16570682A
Other languages
Japanese (ja)
Inventor
Oohirou Kinoshita
大日郎 木下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Horiba Ltd
Original Assignee
Horiba Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Horiba Ltd filed Critical Horiba Ltd
Priority to JP16570682A priority Critical patent/JPS58205865A/en
Publication of JPS58205865A publication Critical patent/JPS58205865A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Abstract

PURPOSE:To exclude the reception of influence due to external disturbance noise, by a method wherein a current detecting resistor is provided to a conductivity cell in series and voltages at both ends of said resistor are inputted in an A/D converter while voltages at both ends of a conductive cell are connected to the reference input terminal of the A/D converter. CONSTITUTION:Voltage difference e1-e2 at both ends of a current detecting resistor R is multiplied by a differential amplifier 14 and rectified by a rectifying circuit 15 to be inputted in an A/D converter 17. On the other hand, the voltage e2 at both ends of a conductivity cell 13 is rectified by a rectifying circuit 16 to be applied to the reference input terminal of the A/D converter 17 and e4 is divided by e5 in the A/D converter 17 to be displayed by a digital display 18. By this constitution, because one end of the conductivity cell 13 can be connected to a common terminal, a conductivity measuring circuit becomes strong against disturbance noise and, because cell applied voltage e1 does not impart influence to the display value at all, it is unnecessary to provide a buffer circuit even if an unstable power source is used.

Description

【発明の詳細な説明】 本発明Fi2極式ディジタル表示導電率測定回路に関す
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an Fi bipolar digital display conductivity measuring circuit.

かかる測定回路として従来は第1図に示す回路が用いら
れている。図中E1.E!は基準電圧、lは11流電圧
−交流電圧変換器(以下、D−A変換器という)、2は
出力電圧et’を一定にするためのバッファー回路、3
は導電率セル、4d増幅器、5は整流回路、6はアナロ
グディジタル変換器(以下A−D変換器という。)、7
#iディジタル表示器である。
Conventionally, a circuit shown in FIG. 1 has been used as such a measuring circuit. E1 in the figure. E! is a reference voltage, l is a 11 current voltage-AC voltage converter (hereinafter referred to as a DA converter), 2 is a buffer circuit for keeping the output voltage et' constant, 3
is a conductivity cell, 4d amplifier, 5 is a rectifier circuit, 6 is an analog-to-digital converter (hereinafter referred to as an A-D converter), 7
#i Digital display.

この測定回路において導電率を測定できる原理は次の如
くである。即ち、導電率セル3に印加される電圧をel
s増幅器4の出力電圧をC2、導電率セルの等価抵抗を
γとすると、elは f eオニ−一 ・C1・・・・・・・・・・・・ (1)
γ で表わせる。e、は上述の如く一定電圧と考えられるか
ら、e!は一つまり導電率に比例することとなる。この
測定され比導電率はアナログ量なので整流回路5、A−
D変換器61に通じてディジタル量に変換され、表示器
7にてディジタル表示される。
The principle by which conductivity can be measured using this measuring circuit is as follows. That is, the voltage applied to the conductivity cell 3 is el
If the output voltage of the s amplifier 4 is C2, and the equivalent resistance of the conductivity cell is γ, then el is f e one - C1... (1)
It can be expressed as γ. Since e is considered to be a constant voltage as mentioned above, e! is equal to 1, that is, it is proportional to the conductivity. Since this measured specific conductivity is an analog quantity, the rectifier circuit 5, A-
The signal is converted into a digital quantity through a D converter 61 and displayed digitally on a display 7.

ところで上記測定回路においては実際上の測定に際して
次のような欠点がある。
However, the above measurement circuit has the following drawbacks in actual measurement.

■ 導電率セルの両端ともコモン端子から浮いているの
で、外乱ノズルを受けやすく、それによる測定誤差を生
じる。
■ Both ends of the conductivity cell are floating from the common terminal, so it is susceptible to disturbance nozzles, which causes measurement errors.

■ セル印加電圧e、が変動すると直接測定精度に影響
する。このためe!の変動を防止する必要かあり、バッ
ファー回路2は不可欠な構成となる。しかしながらこの
バッファー回路を設けるためにセル印加電圧源側の回路
構成が非常に複雑となる。
■ Fluctuations in the cell applied voltage e directly affect measurement accuracy. For this reason e! Therefore, the buffer circuit 2 becomes an essential configuration. However, in order to provide this buffer circuit, the circuit configuration on the cell applied voltage source side becomes extremely complicated.

本発明は、従来の測定回路に訃ける前述した欠点を解消
し得る新規な2極式ディジタル表示導電率測定回路を提
供するものであり、その要旨とするところは、導電率層
ルに直列に電流検出用抵抗を設け、この抵抗の両端の差
の電圧をアナログディジタル変換器の入力に接続し、父
、導電率セル両端の電圧を前記変換器の基準入力端子に
接続した点に存する。
The present invention provides a novel two-electrode digital display conductivity measurement circuit that can eliminate the above-mentioned drawbacks of conventional measurement circuits. A current detection resistor is provided, the voltage difference across the resistor is connected to the input of an analog-to-digital converter, and the voltage across the conductivity cell is connected to the reference input terminal of the converter.

以下、本発明の実施例を図面に基づき説明する。Embodiments of the present invention will be described below based on the drawings.

第2図は本発明の一実施例としての2極式ディジタル表
示導電率測定回路を示し、図中EIFi基準電圧、11
はD−へ変換器、12は、該変換器を駆動する発振器、
13は導電率セルで、電流検出用抵抗Rと直列接続され
てD−A変換器11の出力端子に接続されている。そし
て導電率セル13の−mはコモン端子に接続されている
。I4は差動増幅器、15.16は整流回路、17けA
−D変換器、18はディジタル表示器である。
FIG. 2 shows a two-pole digital display conductivity measurement circuit as an embodiment of the present invention, in which the EIFi reference voltage, 11
is a D- converter, 12 is an oscillator that drives the converter,
A conductivity cell 13 is connected in series with a current detection resistor R and connected to the output terminal of the DA converter 11. -m of the conductivity cell 13 is connected to the common terminal. I4 is a differential amplifier, 15.16 is a rectifier circuit, 17 A
-D converter, 18 is a digital display.

この構成によれば、電流検出用抵抗Rの両端の電圧の差
(e+e2)が差動増幅器14で増幅され整流回路15
で整流されてA−D変換器17に入力され、又、導電率
セル13の両端の電圧e!が整流回路16で整流されて
A−D変換器170基準入力端子に加えられる。そして
、A−0変換器17はA−D変換過程で前者の入夫電圧
e、t−後者の基準入力電圧e5で除し、その除算出方
がディジタル表示器1Bに表示される。
According to this configuration, the voltage difference (e+e2) between both ends of the current detection resistor R is amplified by the differential amplifier 14, and the rectifier circuit 15
The voltage e! across the conductivity cell 13 is rectified and input to the A-D converter 17. is rectified by the rectifier circuit 16 and applied to the reference input terminal of the A-D converter 170. Then, the A-0 converter 17 divides the input voltage e, t of the former by the reference input voltage e5 of the latter in the A-D conversion process, and the method of division is displayed on the digital display 1B.

以ヒの動作によってディジタル表示器18が導電率セル
13の導電率K(=−)を表示し得るこγ と全数式により説明すると次の如くである。導電率セル
13に流れる電流IはRe eH,C2を用いて表わす
と、 差動増幅器14の出力電圧e3、整流回路15の出力電
圧e4は、 C3”” eHC2・・・・・・・・・・・(3)C4
= a x C3= a (e+−e、) +++++
+・・+ −−−(4)但し、aけ整流回路15の変換
係数である。(2)式に(3)(<)式を代入し整理す
ると、e、とIとの関係は となる。或いは次のようにも書ける。
The digital display 18 can display the conductivity K (=-) of the conductivity cell 13 by the following operation.The following is an explanation using all mathematical formulas. When the current I flowing through the conductivity cell 13 is expressed using Re eH, C2, the output voltage e3 of the differential amplifier 14 and the output voltage e4 of the rectifier circuit 15 are C3"" eHC2... ...(3)C4
= a x C3= a (e+-e,) +++++++
+...+ --- (4) However, it is a conversion coefficient of the aperture rectifier circuit 15. When formula (3) (<) is substituted into formula (2) and rearranged, the relationship between e and I becomes as follows. Alternatively, it can also be written as follows.

C4=aXRXI     ・・・・・・・・・・・・
・ (6)−万、前記電流■と導電率セル13の両端の
電圧e2の関係は、 整流回路16の変換係数をbとするとその出力゛電圧e
5t/′i、 A−D変換器17の出力電圧、即ちディジタル表示器1
8の表示値Aは(6)、(8)式から、C50 となり、結局、ディジタル表示器は導電率Kに比例した
値全表示することとなる。そして、この場合、」la 
X Rを1になるよう調整しておけば導電率にそのもの
を表示することができる。
C4=aXRXI ・・・・・・・・・・・・
・ (6) - 10,000, the relationship between the current ■ and the voltage e2 across the conductivity cell 13 is as follows: If the conversion coefficient of the rectifier circuit 16 is b, its output voltage e
5t/'i, the output voltage of the A-D converter 17, that is, the digital display 1
The displayed value A of 8 becomes C50 from equations (6) and (8), and as a result, the digital display will display all values proportional to the conductivity K. And in this case, "la
If XR is adjusted to 1, it can be displayed in the conductivity.

kころで上記構成においては導電率セル13の一端がコ
モン端子に接続できるので、外乱ノズルに対し強くなる
し、又(9)式かられかるように表示値にはセル印加電
圧e1が全く影響を与えないので出力インピーダンスの
高い電源や周囲条件によって影響される不安定な電源例
えばバッテリでも用いることができるのである。しかも
そのような不安定な電源音用いても、従来回路のように
バツフアー回−ヲ設ける必要もないのである。
In the above configuration, one end of the conductivity cell 13 can be connected to the common terminal, making it resistant to disturbance nozzles, and as can be seen from equation (9), the cell applied voltage e1 has no effect on the displayed value. Therefore, it can be used even with power sources with high output impedance or unstable power sources that are affected by ambient conditions, such as batteries. Moreover, even if such unstable power supply noise is used, there is no need to provide a buffer circuit as in conventional circuits.

伺、@2図においてけ差動増幅器14で電源検出用抵抗
Rの両端の電圧の差を増幅して後整流するようにしてい
るが、その逆に、先ず両端の電圧を各別に整流してから
その差電圧を増幅するようにしてもよい。その場合の回
路をgIIJ3図に示す。
Hi, in Figure @2, the differential amplifier 14 amplifies the difference in voltage across the power supply detection resistor R and then rectifies it, but conversely, the voltages at both ends are first rectified separately. The difference voltage may be amplified. The circuit in that case is shown in Figure gIIJ3.

又A−D変換器として差動増幅器を内蔵したものを用い
れば回路素子が低減できて好都合である。
Furthermore, it is advantageous to use an A-D converter with a built-in differential amplifier, since the number of circuit elements can be reduced.

@4図に示す回路は、差動増幅器を内蔵したA−り変換
器17を用い、かつ整流回路15.16として同期整流
回路を用い之測定回&11’r示している。
The circuit shown in Figure 4 uses an A-reverse converter 17 with a built-in differential amplifier, and uses synchronous rectifier circuits as the rectifier circuits 15 and 16.

この回路は第3図に示した回路と等価である。しかし、
第4図に示す回路で実施すれば第2.3図に示した回路
に比して回路素子が少なく全体が簡素化してコストダウ
ンが図れるし、又消費電力が少なくて済むという付加的
な利点をもつ。
This circuit is equivalent to the circuit shown in FIG. but,
If implemented using the circuit shown in Fig. 4, there will be fewer circuit elements than the circuit shown in Fig. 2.3, and the overall structure will be simplified, resulting in cost reduction, and additional advantages include lower power consumption. have.

本発明に係る2極式ディジタル表示導電率測定回路はヒ
述の如く構成したため次のような効果がある。
Since the bipolar digital display conductivity measuring circuit according to the present invention is constructed as described above, it has the following effects.

■ 導電率セルに直列に接続した抵抗で電源を検出する
ことができるので、導電率セルの一端はコ、モン端子に
落とすことができ、外乱ノズルに対して強くなる。
■ Since the power source can be detected with a resistor connected in series with the conductivity cell, one end of the conductivity cell can be dropped to the common or common terminal, making it resistant to disturbance nozzles.

■ ディジタル表示器の指示値にはセル印加電圧が影響
しなくなるため、セル印加電源にバッテリ等の不安定な
電源ヲ世いることができ、しかも電圧安定用のバッファ
ー回路が不要となる。従ってこれによって電源側回路の
簡素化やコストダウンが1名、る等の効果がある。
- Since the cell applied voltage does not affect the indicated value of the digital display, an unstable power source such as a battery can be used as the cell applied power source, and a buffer circuit for voltage stabilization is not required. Therefore, this has the effect of simplifying the power supply side circuit and reducing costs by one person.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の2極式ディジタル表示導電率測定回路を
示す回路図、第2図は本発明の一実施例としての回路図
、第3図、第4図は夫々本発明の他の実施例としての回
路図である。 13・・・導電率セル、  17・・・A−D変換器、
R・・・電流検出用抵抗。
FIG. 1 is a circuit diagram showing a conventional two-pole digital display conductivity measurement circuit, FIG. 2 is a circuit diagram as an embodiment of the present invention, and FIGS. 3 and 4 are respectively other embodiments of the present invention. FIG. 2 is an example circuit diagram. 13... Conductivity cell, 17... A-D converter,
R...Resistance for current detection.

Claims (1)

【特許請求の範囲】 導電率セルに直列に電流検出用抵抗を設け、この抵抗の
両端の差の電圧をアナログディジタル変換器の入力に接
続し、父、導電率セル両端の電圧紗 全前記変換器の基準入力端子に接続きれたことを特徴と
する2極式ディジタル表示導電率測定回路。
[Claims] A current detection resistor is provided in series with the conductivity cell, and the voltage difference between both ends of this resistor is connected to the input of an analog-to-digital converter, and the voltage across the conductivity cell is converted as described above. A two-electrode digital display conductivity measuring circuit characterized in that it can be connected to the reference input terminal of a device.
JP16570682A 1982-09-22 1982-09-22 Two-electrode type digital display conductivity measuring circuit Pending JPS58205865A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16570682A JPS58205865A (en) 1982-09-22 1982-09-22 Two-electrode type digital display conductivity measuring circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16570682A JPS58205865A (en) 1982-09-22 1982-09-22 Two-electrode type digital display conductivity measuring circuit

Publications (1)

Publication Number Publication Date
JPS58205865A true JPS58205865A (en) 1983-11-30

Family

ID=15817504

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16570682A Pending JPS58205865A (en) 1982-09-22 1982-09-22 Two-electrode type digital display conductivity measuring circuit

Country Status (1)

Country Link
JP (1) JPS58205865A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS549674A (en) * 1977-06-23 1979-01-24 Seiko Epson Corp Digital resistant meter

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS549674A (en) * 1977-06-23 1979-01-24 Seiko Epson Corp Digital resistant meter

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