JPS58203569A - マルチプロセツサシステム - Google Patents

マルチプロセツサシステム

Info

Publication number
JPS58203569A
JPS58203569A JP57086577A JP8657782A JPS58203569A JP S58203569 A JPS58203569 A JP S58203569A JP 57086577 A JP57086577 A JP 57086577A JP 8657782 A JP8657782 A JP 8657782A JP S58203569 A JPS58203569 A JP S58203569A
Authority
JP
Japan
Prior art keywords
memory
processor
data
common
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57086577A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6337419B2 (enFirst
Inventor
Fumihiko Takezoe
竹添　文彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Fuji Facom Corp
Original Assignee
Fuji Electric Co Ltd
Fuji Facom Corp
Fuji Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd, Fuji Facom Corp, Fuji Electric Manufacturing Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP57086577A priority Critical patent/JPS58203569A/ja
Publication of JPS58203569A publication Critical patent/JPS58203569A/ja
Publication of JPS6337419B2 publication Critical patent/JPS6337419B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)
  • Multi Processors (AREA)
  • Memory System (AREA)
JP57086577A 1982-05-24 1982-05-24 マルチプロセツサシステム Granted JPS58203569A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57086577A JPS58203569A (ja) 1982-05-24 1982-05-24 マルチプロセツサシステム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57086577A JPS58203569A (ja) 1982-05-24 1982-05-24 マルチプロセツサシステム

Publications (2)

Publication Number Publication Date
JPS58203569A true JPS58203569A (ja) 1983-11-28
JPS6337419B2 JPS6337419B2 (enFirst) 1988-07-25

Family

ID=13890856

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57086577A Granted JPS58203569A (ja) 1982-05-24 1982-05-24 マルチプロセツサシステム

Country Status (1)

Country Link
JP (1) JPS58203569A (enFirst)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52142454A (en) * 1976-05-21 1977-11-28 Mitsubishi Electric Corp Composite type processing device
JPS5344136A (en) * 1976-10-05 1978-04-20 Toshiba Corp Multiprocessor system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52142454A (en) * 1976-05-21 1977-11-28 Mitsubishi Electric Corp Composite type processing device
JPS5344136A (en) * 1976-10-05 1978-04-20 Toshiba Corp Multiprocessor system

Also Published As

Publication number Publication date
JPS6337419B2 (enFirst) 1988-07-25

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