JPS58202682A - Waveform coding device - Google Patents

Abstract

PURPOSE:To lower the average bit rate with a simple constitution and to improve the quality of signal transmission, by detecting the frequency band of the input information of waveform coding and decoding devices and controlling both the oscillating frequency of a clock generator and the cut-off frequency of a variable LPF. CONSTITUTION:The input information given from an information input terminal is opplied to a variable LPF4 of a waveform coding device 1, and the output of the LPF4 is applied to an adaptive delta modulator 5 which uses the clock signal given from a variable clock generator 7 as an input. A modulation signal received delta modulation on the basis of the clock signal given from the device 1 is applied to an adaptive delta modulation decoder 8 of a decoder 2 via a transmission line 3. Thus the modulated signal is demodulated by the decoder 8 and outputted via a variable LPF9. Then HPF11 and 13 and level detecting circuits 12 and 14 are connected to the output side of the modulator 5 and the decoder 8 of devices 1 and 2 respectively. Thus the oscillating frequencies of variable clock generators 7 and 10 of the devices 1 and 2 are controlled together with the cut-off frequencies of LPF4 and 9. As a result, the average bit rate is lowered.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a waveform encoding device that is capable of varying the clock rate used to encode and transmit information signals such as audio signals and video signals, and particularly has a simple configuration and good performance. This makes it possible to vary the lock rate, lower the average bit rate, and improve signal transmission quality.

2. Description of the Related Art Conventionally, there is a waveform encoding device as shown in FIG. 1 in which the clock rate can be varied.

That is, (1) is a waveform encoding device that constitutes a transmitting device, (
2) is a decoding device that constitutes a receiving device, (3m) and (3
b) shows the respective transmission paths. This waveform encoding device (1) converts the information signal supplied to the information signal input terminal (1a) into a control signal CB whose cutoff frequency fv is the frequency of a clock signal of a variable clock generator (7) which will be described later. The information signal is supplied to the adaptive delta modulator (5) constituting the waveform encoder via a variable low-pass filter (4) configured to be controlled to a frequency of 1, and is also supplied to this information signal input terminal (1a). An information signal corresponding to the input information signal is supplied to a bandwidth detection port M (6) for detecting the effective frequency bandwidth, and a DC voltage corresponding to the effective frequency bandwidth of the input information signal is supplied to the output side of the bandwidth detection circuit (6). control signal C8 obtained at the output side of this bandwidth detection circuit (6).
1l is supplied to the oscillation frequency control terminal of a variable clock generator (7) composed of a plurality of voltage generator oscillator circuits, and this control signal C3 is supplied to the cutoff frequency control terminal of the variable low-pass filter (4). The cutoff frequency fv of this variable low noise filter (4) is controlled, and the clock signal obtained at the output side of this variable clock generator (7) is supplied to an adaptive delta modulator (5). In (5), this clock signal is used for sampling, etc., and this clock signal is used for encoding. A delta modulation signal obtained at the output terminal (5a) of the adaptive delta modulator (5) and a control signal C6 obtained at the output terminal (6a) of the bandwidth detection circuit (6) of this conventional waveform encoding device (1). is transmitted to the decoding device (2) via the transmission paths (3a) and (3b), and the delta modulation signal obtained at the information signal input terminal (2a) of the decoding device (2) is transmitted to the adaptive delta modulation decoder ( 8) for demodulation, and the demodulated signal obtained at the output side of this adaptive delta modulation decoder (8) is supplied to the demodulated signal output terminal (9a) via a variable low-pass filter (9), and this decoding A voltage variable oscillator circuit or a system that supplies the control signals "+,'CI" obtained at the control signal input terminal (2b) of the device (2) and the clock signal obtained at its output side to the adaptive delta modulation decoder (8). This control signal C
1 is the cutoff frequency f of the variable low-pass filter (9)
, and the cutoff frequency fv of the variable low noise filter (9) is set to be equal to the frequency of the clock signal of the variable clock generator αQ.

In such a conventional waveform encoding device (1) and decoding device (2), the frequency band of the input information signal is detected and the oscillation frequency of the variable clock generator (7) αQ and the variable low-yas filter (4) are detected. Since the cutoff frequency fv of (9) is controlled, when there is no high-frequency component in the input information signal, the oscillation frequency of variable clock generator (7) (l) is lowered, making it possible to lower the average bit rate. As a result, the signal transmission quality can be improved, and the cutoff frequency fv of the variable low-pass filters (4) and (9) can also be lowered, and quantization noise can be reduced.

However, such conventional waveform encoding device (1) and decoding i
t (2) Yo m □ I, aa, a2. □A transmission line (3b) for transmitting the control signal C3 obtained at the output side of the bandwidth detection circuit (6) is required in addition to the transmission line (3a), which has the disadvantage of complicating the configuration accordingly. The bandwidth detection circuit (6) requires an FFT (Fast Fourier Transformer) or the like, which has the disadvantage that its configuration is complicated.

In view of these points, the present invention is designed to enable variable lock rate with a simple configuration, to lower the average bit rate, and to improve signal transmission quality.

An embodiment of the waveform encoding device of the present invention will be described below with reference to FIG. In FIG. 2, parts corresponding to those in FIG. 1 are given the same reference numerals, and detailed explanation thereof will be omitted.

In this example, the information signal supplied to the information signal input terminal (1a) is supplied via a variable low-pass filter (4) to an adaptive delta modulator (5) constituting a waveform encoder.

In this example, a local decoding section (5b) is provided as a part of this adaptive delta modulator (5). This local decoding section (5b) re-decodes the delta modulated signal encoded in the adaptive delta modulator (5), and the output side of this local decoding section (5b) is a decoding device (2) which will be described later. (5) A demodulated signal similar to the output signal of the delta modulation decoder (8) is obtained. The demodulated signal obtained at the output side of this local decoding section (5b) is supplied to the bypass filter Q logic. Cutoff frequency f of this bypass filter α
For example, h is 1.5 when the demodulated signal is an audio signal.
kHz, this signal of 1.5 kHz or more is supplied to the level detection circuit (6), and this level detection circuit (b) detects the level of the signal that has passed through the bias filter α. A DC voltage corresponding to the level of the high-frequency signal is obtained, and from this it is possible to know the amount of the high-frequency component υ, which can be regarded as the effective frequency bandwidth of the input information signal, such as an audio signal.

The level detection signal of this level detection circuit 0 is converted into a control signal C.
A is supplied to the oscillation frequency control terminal of a variable clock generator (7) configured with a voltage variable oscillator circuit, and the frequency of the clock signal generated by this variable clock generator (7) is detected by the level detection circuit (6). The level detection signal of the level detection circuit (6) is used as the control signal C8 to increase the level according to the level of the variable low-pass filter (4).
) is supplied to the cutoff frequency control terminal (6) of the variable clock generator (7), and the control signal C6 sets the cutoff frequency fv of the variable low-pass filter (4) to one part of the frequency of the clock signal of the variable clock generator (7). Let it be the frequency. Further, the clock signal of the variable clock generator (7) is supplied to the adaptive delta modulator (5), and the input information signal is delta-modulated in the adaptive delta modulator (5) using this clock signal as a reference.

The delta modulated signal obtained at the output terminal (5a) of this adaptive delta modulator (5) is transmitted to the decoding device (
2), and the information signal input terminal of this decoding device (2) -
The delta modulation signal obtained at f-C2a) is supplied to an adaptive delta modulation decoder (8) for demodulation, and the demodulation signal obtained at the output side of the adaptive delta modulation decoder (8) is supplied to a variable low
Demodulated signal output terminal (9a) via 9 filter (9)
supply to.

In addition, the demodulated signal obtained at the output side of the adaptive delta modulation decoder (8) is... The signal is supplied to a bypass filter (6) to pass through, and the output signal of this high-speed filter (G) is supplied to a level detection circuit α◆ configured similarly to the level detection circuit (6), and this level detection circuit α◆ In this case, the level of the signal that has passed through the high-frequency filter is detected, and a DC voltage corresponding to the level of this high-frequency signal is obtained. From this, it is possible to know the amount of high-frequency components, and this can be input. It can be regarded as the effective frequency bandwidth of an information signal, for example, an audio signal.The level detection signal of this level detection circuit α→ is used as a control signal C6 to control the oscillation frequency of a variable clock generator CIO configured by a variable voltage oscillation circuit. This variable clock generator (
The frequency of the clock signal generated by (g) is increased in accordance with the detection level of the level detection circuit α→, and the level detection signal of the level detection circuit α◆ is used as the control signal C1 of the variable low-pass filter (9). The control signal C8 is used to set the cutoff frequency fv of the variable low-pass filter (9) to a frequency seven times the frequency of the clock signal of the variable clock generator (9). Further, the clock signal of the variable clock generator α0 is supplied to the adaptive delta modulation decoder (8), and the delta modulation signal is demodulated in the adaptive delta modulation decoder (8) using this clock signal as a reference.

The waveform encoding device (1) and decoding device (2) shown in FIG.
1, the frequency band of the input information signal is detected to control the oscillation frequency of the variable clock generator (7) α0 and the cutoff frequency fv of the variable low-pass filters (4) and (9). Therefore, when there is no high-frequency component in the input information signal, the oscillation frequency of the variable clock generator (7) α1 is low, and the average bit rate can be lowered, thereby improving the υ signal transmission quality. At the same time, the cutoff frequency fv of the variable loss filters (4) and (9) is also lowered, and quantization noise can be reduced. Furthermore, in this example, the demodulated signal demodulated by the decoder (5b) (8) is sent to the high-noise filter (11) CIJ.
Since the level detection circuit α and α are used to detect the frequency band, the detection circuit for detecting this frequency band is simple and a special control signal C is required.

This has the advantage of simplifying the configuration since it does not require a transmission line for transmitting the information.

In the above embodiment, variable low-pass filters (9) and (4) were provided, but since the adaptive delta modulator (5) also has the effect of a variable low-pass filter, the variable rotor and filter (4) can be omitted. I can do it. Further, the present invention is not limited to the above-described embodiments, and it goes without saying that various other configurations can be adopted without departing from the gist of the present invention.

[Brief explanation of the drawing]

Figure 1 is a configuration diagram showing an example of a conventional waveform encoding device;
The figure is a block diagram showing an embodiment of the waveform encoding device of the present invention. (1a) is an information input terminal, (4) is a variable low-pass filter, (5) is an adaptive delta modulator, (5m) is an output terminal,
(5b) is a local decoding unit, (7) is a variable clock generator,
CI]) is a bypass filter, and (6) is a level detection circuit. Agent Sadado Ito Hidemori Matsukuma (]0)

Claims (1)

[Claims] Waveform encoding means having a local decoding section configured to encode an input signal and transmit the encoded signal, variable clock generation means for supplying a clock signal to the waveform encoding means, and the waveform encoding means. and a parameter extracting means for extracting four parameters related to the bandwidth of the output signal of the local decoding section of the local decoding section, and a parameter extracting means for extracting four parameters related to the bandwidth of the output signal of the local decoding section, and the clock signal of the variable clock generating means is A waveform encoding device characterized by controlling frequency.