JPS58202613A - Differential amplifying circuit - Google Patents
Differential amplifying circuitInfo
- Publication number
- JPS58202613A JPS58202613A JP8598382A JP8598382A JPS58202613A JP S58202613 A JPS58202613 A JP S58202613A JP 8598382 A JP8598382 A JP 8598382A JP 8598382 A JP8598382 A JP 8598382A JP S58202613 A JPS58202613 A JP S58202613A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- base
- common
- constant
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Amplifiers (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、ペース接地構成された高利得で特に広帯域幅
の差動増幅回路に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a high gain, particularly wide bandwidth, differential amplifier circuit in a grounded-to-ground configuration.
従来の差動増幅回路は、第1図のようにエミッタ接地増
幅回路を二つ用い、共通エミッタ端子を定電流回路Aに
接続して共通エミッタ端子を流れる電流を一定に保ち、
トランジスタ1とトランジスタ2のコレクタ電流の和を
一定に保ち、入力端子3,4にそれぞれ加わる入力電圧
の差を増幅するという動作をさせていた。しかし、エミ
ッタ接地構成のため、使用トランジスタの高周波特性が
βしゃ断簡波数fβで制限され、この構成の差動増幅回
路は帯域幅が狭いという欠点があった。A conventional differential amplifier circuit uses two common emitter amplifier circuits as shown in Figure 1, and connects the common emitter terminal to a constant current circuit A to keep the current flowing through the common emitter terminal constant.
The operation was such that the sum of the collector currents of transistors 1 and 2 was kept constant, and the difference between the input voltages applied to input terminals 3 and 4 was amplified. However, due to the common emitter configuration, the high frequency characteristics of the transistors used are limited by the β-cutoff wave number fβ, and the differential amplifier circuit with this configuration has the disadvantage of a narrow bandwidth.
本発明は、差動増幅回路における従来のかかる欠点を除
去するため、ベース接地構成として、差動増幅回路の高
周波特性を改善するという特徴をもつものである。In order to eliminate such drawbacks of the conventional differential amplifier circuit, the present invention is characterized in that the high frequency characteristics of the differential amplifier circuit are improved by using a common base configuration.
以下図面を用いて詳細を説明する。ベース接地増幅回路
の高周波特性は、αしゃ断簡波数fαが支配的であるか
ら、βしゃ断簡波数fβが支配的であるエミッタ接地増
幅回路よりも帯域幅が広い。Details will be explained below using the drawings. Since the high frequency characteristic of the common base amplifier circuit is dominated by the α-cutting simple wave number fα, the bandwidth is wider than that of the common-emitter amplifier circuit in which the β-cutting simple wave number fβ is dominant.
これを差動増幅回路に応用すれば、高利得でかつ広帯域
幅を持つ差動増幅回路ができる。If this is applied to a differential amplifier circuit, a differential amplifier circuit with high gain and wide bandwidth can be created.
第2図は、本発明の基本回路である。二つのベース接地
増幅回路のベース端子を共通にして、共通ベース端子を
流れる電流を一定に保ては、トランジスタ1とトランジ
スタ2のコレクタ電流の和が一定となシ、入力端子3,
4にそれぞれ加わる入力電圧の差を増幅でき、帯域幅の
広い高利得な差動増幅回路となる。FIG. 2 is a basic circuit of the present invention. If the base terminals of the two base-grounded amplifier circuits are made common and the current flowing through the common base terminal is kept constant, the sum of the collector currents of transistor 1 and transistor 2 will be constant, and input terminal 3,
It is possible to amplify the difference between the input voltages applied to each of the four input voltages, resulting in a wide-bandwidth, high-gain differential amplifier circuit.
第3図は、本発明の実施例で、トランジスターと負荷抵
抗5、トランジスタ2と負荷抵抗6とで構成される二つ
のベース接地増幅回路のベース端子を共通とし、その共
通ベース端子を、FE’l’9とトランジスター0で構
成された微小定電流回路A′に接続しである。ベース共
通であるため共通端子を流れる電流が微小であり、第1
図にあるような従来の定を光回路Aは使用できない。こ
のため第3図のA′に示すようにFET9にトランジス
タ10をつなぎ微小定電流回路を構成している。FIG. 3 shows an embodiment of the present invention in which two common base amplifier circuits each consisting of a transistor and a load resistor 5, and a transistor 2 and a load resistor 6 have a common base terminal, and the common base terminal is connected to an FE' It is connected to a minute constant current circuit A' composed of l'9 and transistor 0. Since the base is common, the current flowing through the common terminal is minute, and the first
The optical circuit A cannot use the conventional settings as shown in the figure. Therefore, as shown in A' in FIG. 3, a transistor 10 is connected to the FET 9 to form a minute constant current circuit.
FET9で構成される定電流回路で、トランジスタ10
のコレクタ電流が一定となシ、コレクタ電流を電流増幅
度で割ったものがベース電流であるカラトランジスタ1
00ベース電流は一定となり、共通ベース端子電流を一
定に保つことが出来る。A constant current circuit consisting of FET9, transistor 10
The collector current of the transistor 1 is constant, and the base current is the collector current divided by the current amplification degree.
00 base current becomes constant, and the common base terminal current can be kept constant.
また第3図では、ベース接地回路の前段に、エミッタフ
ォロア回路を接続し、回路の入力インビー論。In addition, in Figure 3, an emitter follower circuit is connected before the common base circuit, and the input input logic of the circuit is established.
ダンスの低下を防いでいる。Prevents dance from deteriorating.
以上の回路構成とすることで、ベース接地構成の差動増
幅回路を実現し、差動増幅回路の帯域幅を広げることが
できる。With the above circuit configuration, it is possible to realize a differential amplifier circuit with a common base configuration and widen the bandwidth of the differential amplifier circuit.
第1図は、従来の差動増幅回路、第2図は本発明の基本
回路、第3図は、本発明実施例の回路である。
なお図において、1,2・・・・・・差動増幅用トラン
ジスタ、3,4・・・・・・入力端子、5,6・・・・
・・負荷抵抗、7,8・・・・・・エミッタフォロア用
トランジスタ、9・・・・・・定電流用PET、10・
・・パ・大電流・微小電流変換用トランジスタ、A、A
’・・・・・・定電流回路、B、C・・・・・・電源端
子(正、負)、である。
代理人 弁理士 内 原 晋FIG. 1 shows a conventional differential amplifier circuit, FIG. 2 shows a basic circuit according to the present invention, and FIG. 3 shows a circuit according to an embodiment of the present invention. In the figure, 1, 2... differential amplification transistor, 3, 4... input terminal, 5, 6...
...Load resistance, 7, 8...Emitter follower transistor, 9...PET for constant current, 10.
・・Transistor for large current/small current conversion, A, A
'... Constant current circuit, B, C... Power terminals (positive, negative). Agent Patent Attorney Susumu Uchihara
Claims (1)
共通ペース端子を微小定電流回路に接続した構成を特徴
とする差動増幅回路。A differential amplifier circuit characterized by a configuration in which two base-grounded amplifier circuits have a common base terminal, and the common pace terminal is connected to a minute constant current circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8598382A JPS58202613A (en) | 1982-05-21 | 1982-05-21 | Differential amplifying circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8598382A JPS58202613A (en) | 1982-05-21 | 1982-05-21 | Differential amplifying circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58202613A true JPS58202613A (en) | 1983-11-25 |
Family
ID=13873927
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8598382A Pending JPS58202613A (en) | 1982-05-21 | 1982-05-21 | Differential amplifying circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58202613A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0774705B1 (en) * | 1995-11-16 | 2003-07-23 | Sgs-Thomson Microelectronics Gmbh | Comparator with hysteresis for use in a voltage regulating circuit |
-
1982
- 1982-05-21 JP JP8598382A patent/JPS58202613A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0774705B1 (en) * | 1995-11-16 | 2003-07-23 | Sgs-Thomson Microelectronics Gmbh | Comparator with hysteresis for use in a voltage regulating circuit |
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