JPS58202611A - Current mirror circuit - Google Patents

Abstract

PURPOSE:To set the current amplification factor nearly at an ideal level even in a region where the current amplification factor is small, by adding a transistor TR to a conventional current mirror circuit. CONSTITUTION:The emitters of PNP transistors TRQ11 and Q12 are connected in common, and this joint middle point is connected to a power supply terminal VCC. At the same time, the bases of TRQ11 and Q12 are connected in common, and this joint middle point is connected with the emitter of a PNPTRQ13. The base of the TRQ13 is connected to the collector of the TRQ11, and this collector is connected to the emitter of a PNPTRQ14. The base of the TRQ14 is connected to the collector of the TRQ12, and the joint middle point between the collector of the TRQ12 and the base of the TRQ14 is connected to an output terminal P2. Thus the relation between an input current I1 and an output current I2 is shown by the equation, where the amplification factor A is set at 0.916 even when beta is small and set at 2 for example. This value is approximate to the ideal value of A=1 and shows considerable improvement of the amplification factor.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a current mirror circuit that is frequently used as a constant current circuit or a current amplification circuit.

[Technical background of the invention and its problems]

When configuring various circuit systems, constant current circuits and current amplification circuits are often required. Such a circuit system is called a semiconductor integrated circuit (hereinafter referred to as "semiconductor integrated circuit").

(referred to as an IC), a current mirror circuit is often used as the constant current circuit or current amplification circuit.

That is, in a current mirror circuit, if the input current is fixed, an output current of a constant level can be obtained, so that it can be used as a constant current circuit. On the other hand, if the input current is made variable, an output current that changes following changes in the input current can be obtained, so it can be used as a current amplification circuit.

Basically, the current mirror circuit is as shown in Figure 1.
Two transistors with similar characteristics Qlt r Qtm
It is composed of a combination of. In this case, transistor Q
ll * Qtm pace emitter junction has power supply VC
A voltage of the same level is applied from C. As a result, substantially equal currents flow through the emitters of the transistors Qll r Qlll.

Now, assuming that the current amplification factor β of the common emitter of the transistor Qll + Qlll is large, the transistor Qll
+ Qlg pace current is negligible. therefore,
Under such conditions, the input current 11 flowing to the input terminal P1 and the output current I2 flowing to the output terminal P2 are almost equal.

However, if the current amplification factor β of the transistor Q1t r Qtz is small, in the circuit shown in FIG.
The effect caused by the equal pace current of tt + Qtm cannot be ignored. This pace current varies accordingly when the current amplification factor β varies. In the configuration of FIG. 1, the sum of the pace currents of transistors Qll + Qtm is the input terminal P.

It only flows into. Therefore, transistor Q1t +
If the current amplification factor β of Qtz is small, the circuit will be overpowered. Also, if the current amplification factor β fluctuates in a small value region,
The current amplification degree (5) also varies greatly.

When implementing the transistor Qlt # Qtm into an IC, if an NPN (NPN) transistor is used as the transistor Qll + Qtm, the current amplification factor β can be set to a relatively large value, so the above-mentioned problems can be avoided. If it's a problem, then no. However, due to power reasons, when using a PNP transistor, it is difficult to increase the current amplification factor β, and the current amplification factor β generally becomes small. I did 2
5i, the above-mentioned problem arises in such a case. Note that when using a PNP transistor, it is difficult to increase the current amplification factor β for the following reason. When converting a transistor into an IC, an NPN epitaxial layer is formed on a P-type substrate.
) made mainly of transistors. Therefore, the PNP (usually lateral PNP) made from the same zoroses (usually pierced with the lateral PNP) is NPN
) It is not possible to obtain sufficient characteristics compared to transistors.

In particular, the current amplification factor β is small, and moreover, it tends to vary within that small region. The width of the dispersion is about 2 at the lower limit.
They can live up to 30 years, with the upper limit being around several dozen.

As explained above, in the current mirror circuit of FIG. 1, there are relatively few problems when the current amplification factor β of the transistors Qs1t Qtm is large, but when the current amplification factor β is small, the current amplification degree (A) is not ideal. 5- There is a problem when the value deviates greatly from the value or varies widely.

FIG. 2 is a circuit diagram showing a conventional current mirror circuit configured to solve the above problem.

This current mirror circuit is obtained by adding a transistor Q1g to the current mirror circuit shown in FIG. According to such a configuration, the transistor Qll + Qxz
The total current of the pace current flows into the collector of the transistor Qss, and the pace current of the transistor Q13 flows into the input terminal P1. Since this pace current is smaller than the collector current, the influence of the current amplification factor β on the current amplification degree (A) is alleviated.

However, even with such a configuration, sufficient performance cannot be obtained. Now, transistor Qtt l Qtm +Qt
It is assumed that the current amplification factors β of 3 are approximately equal. In this case, the input current 11 and the output current I2 are each expressed by the following formula (1),
It is expressed as (2).

6- However, the output current 2 is given by the following formula (
3).

can be ignored if is large. However, when the current amplification factor β is small, for example, about 20 or less, the fluctuation of the current gain cannot be ignored. Therefore, the current amplification factor β is approximately 2
When the current amplification value is in the region below 0, the current amplification value is far from the ideal value (-: 1 in this case). Also, the current amplification factor β
If the current amplification factor (~) varies within a range of about 20 or less, it is not possible to create a current mirror circuit with uniform performance. For example, for β-2, I2 = 0.75
It is true, A=0.75. Further, if β-10, I 2 = 0.98 Il, and A = 0.
It becomes 98. Normally, if β=10 and the variation is assumed to be centered around this, when β is 2, the output current I2 decreases by 24% compared to the normal state.

[Purpose of the invention]

This invention was made in order to deal with the above-mentioned circumstances, and it is possible to make the current amplification factor almost an ideal value even if the current amplification factor of the transistor is in a small region, and also to prevent variations in the current amplification factor in the small region. An object of the present invention is to provide a current mirror circuit that can suppress variations in current amplification even when the current mirror circuit is used, and is suitable for IC implementation.

[Summary of the invention]

Therefore, the present invention is directed to, for example, the transistor Q1s'□-.

The emitter is connected to the collector of transistor Q12.
A transistor is provided whose collector is connected to the pace and whose collector is connected to the reference potential side, and the transistor Q
It is configured so that a current corresponding to a collector current of 1 m flows through the output terminal p.

[Embodiments of the invention]

Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 3 is a circuit diagram of the first embodiment of the invention.

3 differs from FIG. 2 in that a transistor Q14 is added, and other parts are the same, so the same parts are given the same reference numerals.

That is, PNP ) transistor Qll r Chz
The emitters of are commonly connected, and the midpoint of the connection is the power supply terminal v
connected to cc. Also, this transistor Qll
*Qtz is also commonly connected to the pace, and its connection midpoint is connected to the emitter of PNP) Lanzostar Qxs. The pace of this transistor Qsa is the transistor Q
1t, and the collector is connected to the emitter of a PNP (PNP) Lanzoster Q14. The pace of transistor Q14 is connected to the collector of transistor Q1z. The connection midpoint between the collector of the transistor Qll and the 10-pin of the transistor Qss is connected to the long sword terminal P1.

The midpoint between the collector of transistor Q12 and the pace of transistor Q14 is connected to output terminal P2.

The collector of transistor Q14 is grounded.

The operation in the above configuration will be explained. Now transistor Q
Assuming that the emitter current of 11+Q12 is 18.

The input current 11 and the output current I3 are each expressed by the following formula (4).

It is expressed as (5).

From equations (4) and (5), the output current r2 is expressed by the following equation (6).

10- In equation (6), when β=2, Is =0.916
11, and A=0.916. When β = 10, I = 0.998 I 1, and A = 0.99
It becomes 8. Based on the output current I when β=10, the output current T3 when β-2 is reduced by only 8 times. This value is about 1/3 of the value in the circuit of FIG. 2 described above.

According to this embodiment described in detail above, the following effects are obtained.

■ Even if the current amplification factor β is in a small region.

The current amplification degree (4) can be obtained as a value close to a substantially ideal value (1 in this case). That is, when β=2, A=0.916(
middle 1), and when β = 10, A = 0.998,
:,)－,,Ah. '1''''゛■ Even if the current amplification factor β varies in a small region, the current amplification factor (A) hardly varies. That is, the current amplification factor β is 10
Even if it fluctuates in the range of ~2, the current amplification ratio only fluctuates within the range of 10%.

(2) Since it has the effects shown in (2) and (2), even if a lateral PNP transistor is used as a transistor, a current mirror circuit with uniform performance and excellent performance can be made. Therefore, it is suitable for IC implementation.

FIG. 4 is a circuit diagram showing a second embodiment of the invention.

In this embodiment, the transistor Qrs and the transistor Ql
This is a Darlington connection of s. Even in such a configuration, the same effects as in the previous embodiment can be obtained. In this case, the relationship between the input current II and the output current 2 is expressed as follows.

FIG. 5 is a circuit diagram showing a third embodiment of the invention.

In the circuit shown in FIG. 5, the collector of the transistor Qss of the transistors Qss + Qts in the Darlington configuration shown in FIG. 4 is grounded. Even in such a configuration, the same effects as in the previous embodiment can be obtained. Incidentally, Kanto diagram 6 of the input current 1 and the output current I2 in this case is a characteristic diagram showing the change characteristics of the current amplification factor (4) with respect to variations in the current amplification factor .beta.. In the figure, characteristic curves (,) to (d) are shown in figures 2 to 5, respectively.
1 is a characteristic curve of the circuit shown in the figure. It can be seen from the figure that in the circuit shown in FIG. 3, the degree of variation in the current amplification degree (4) with respect to the variation in β is significantly reduced compared to the circuit shown in FIG. 2. Furthermore, it can be seen that in the circuit of FIG. 4, the degree of variation in current amplification (4) is reduced over the entire range of variation in β compared to the circuit in FIG. It can also be seen that the circuit of FIG. 5 is more effective in reducing the degree of variation in current amplification (4) over the entire variation range of β than the circuit of FIG. 4.

Incidentally, in FIG. 4, the structure in which the transistor Q1m and the transistor Qts are connected in a Darlington manner can be seen as a composite transistor similar to the transistor Q111 in FIG. 3. This is nothing but changing the current amplification factor of the transistor Qss in FIG. 3 by connecting the transistor Q1M to the transistor Qss in Darlington. Therefore, in Figure 3, 1
4- The current amplification factor of transistor Qu is the same as that of other transistors Ql.
It can be different from β of l + Q12 + Q14 and proportional to this β. Now β this. Then, the general formula for the output current I2 in this invention is as follows. That is, first, input current II
+ Expressing the output tube and the flow 2 using the emitter current ■, the following equations 〇→, θ■ are obtained.

The output current I2 is expressed by the following general formula (L→).

Although the details are omitted, the configuration in FIG. 5 is similar to the configuration in FIG. 4 by replacing the transistor Q1g in FIG. 3 with a composite transistor consisting of transistors Qts+Qts. This is nothing more than changing the current amplification factor. By the way, in the above explanation, transistor Qo + Q12 * Q14
Although the explanation has been made assuming that the current amplification factors are the same, the effects of the present invention can be obtained even if the current amplification factors are different. Also,
In the above description, the case where the ideal value of the current amplification degree (4) is 1 has been described as a representative example, but it goes without saying that the effects of the present invention can be obtained even when the ideal value is other than 1. Note that the ideal value of the current amplification degree (A) is, for example, the transistor Q1t and Q
It can be determined by the ratio of the emitter area to tz. If the emitter area ratio is 1:a, the current amplification degree (,) ideally becomes a.

[Effects of the Invention] □ As described above, according to the present invention, even if the current amplification factor of the transistor is in a small region, the current amplification factor can be set to an ideal value, and even if the current amplification factor varies in the small region. It is also possible to suppress variations in current amplification, and I
A current mirror circuit suitable for C conversion can be provided.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing an example of a conventional constant current circuit, wc2
3 is a circuit diagram showing another example, FIG. 3 is a circuit diagram showing a first embodiment of the constant current circuit according to the present invention, and FIG. 4 is a circuit diagram showing another example.
Figure 5 shows the second part of this invention. FIG. 6 is a circuit diagram showing the 30th embodiment, and is a characteristic diagram showing a comparison of the fluctuation characteristics of the output tube 1 flow with respect to variations in the current amplification factor of the circuits shown in FIGS. 2 to 5. Q■~Qts...transistor, Pl...input terminal P2...output terminal, VCC...power supply. Patent Attorney Suzue Takehiko'-17- Figure 1 Figure 2 Figure 3 Figure 4

Claims (3)

[Claims] (1) Emi and ri are connected to the first reference potential end side,
The first page has a common connection. a second transistor;
The emitter is the first emitter. a third transistor connected to a common connection point side of the pace of the second transistor, the pace being connected to the collector side of the first transistor; and a third transistor having an emitter connected to the collector side of the third transistor; is connected to the collector side of the second transistor, and a fourth transistor whose collector is connected to the second reference potential end side. (2) The current mirror circuit according to claim 1, wherein the third transistor is a composite transistor consisting of two transistors connected in a Darlington connection. (3) The 31st) transistor has an emitter that is connected to the 1st transistor. A fifth transistor is connected to the common connection point side of the pace of the transistor i2, and has its collector connected to the collector side of the fourth transistor, and has an emitter connected to the pace of the fifth transistor, and the pace is connected to the common connection point side of the pace of the transistor i2. 2. The current mirror according to claim 1, wherein the current mirror is a composite transistor comprising a sixth transistor connected to the collector side of the first transistor and whose collector is connected to the second reference potential end side. circuit.