JPS58201482A - Quantizer of video signal - Google Patents

Abstract

PURPOSE:To decrease the mounting area and number of components, to reduce the number of adjusting positions and the effect of noise, by AD-converting an analog video signal and an envelope voltage of this analog video signal and processing them as digital signals. CONSTITUTION:An envelope voltage 52 is extracted from the analog video signal 51 at an envelope detecting circuit 501 and converted into the digital signal 54 at an AD-conversion circuit 503. Further, the analog video signal 51 is converted into a digital signal 53 at an A-D conversion circuit 502. An output of the A-D conversion circuits 502, 503 is latched in latch circuits 507, 508 with a timing pulse 58 in synchronizing with a picture element output respectively. An output signal of the latch circuits 507, 508 is taken as a readout address of the 1st storage circuit 504. On the other hand, a quantized value corresponding to the envelope voltage and the video signal voltage is stored in each address of this storage circuit 504 in advance as digital information, and the digital video signal is outputted with the output of this storage circuit 504.

Description

[Detailed description of the invention] The present invention relates to a video signal quantization device.

As shown in FIG. 1, this type of conventional device inputs an analog video signal 11 to an envelope detection circuit 101, extracts its envelope voltage 12, and calculates the voltage according to the level difference from the envelope voltage 12. A slice setting circuit 102 is provided which determines slice levels in multiple stages. Multiple slice levels can be obtained by resistor division or the like. The slice setting circuit 1
A comparator circuit 103 compares the plurality of slice level signals 13 outputted by the 02 and the level of the analog video signal 11, and the output of the comparator circuit 103 is quantum encoded by an encoding circuit 1G4 to output quantized information 14. It is composed of

For example, when the analog video signal 11 has an analog waveform as shown in FIG. 2, the envelope voltage 12 output from the envelope detection circuit 101 becomes as shown in FIG. The slice setting circuit 102 outputs a plurality of slice level signals 13 (slice levels 01, 10° 11, etc.) based on the envelope voltage 12, and provides them to the comparison circuit 103. The comparison circuit 103 compares the video signal 11 with each slice level 01, 10.11, etc., determines the corresponding slice level, and sends it to the encoding circuit 104.
From 04 onwards, quantized information 14 which has been encoded in accordance with the slice level is output as shown in FIG. That is, for the white level (same as the envelope voltage) of the video signal 11 in FIG. 2, the quantization information "00" is used, and for the black part in FIG. Quantization information °01'' is displayed for the gray portion in Fig. 2. It goes without saying that the quantization information '1bi', '0bi, etc. correspond to the slice levels '1bi, '''0bi, etc.

The above-mentioned conventional device includes an envelope detection circuit 1o1. Since the slice setting circuit 102 and the comparison circuit 103 are all constructed of analog circuits, there is a drawback that complicated circuit adjustment is required in order for each circuit to operate correctly. Also,
Since these analog circuits are composed of discrete components such as resistors and capacitors, their mounting area is limited and it is difficult to miniaturize them. In addition, in order to process high frequency analog signals,
There are many inconveniences, such as the need to pay sufficient attention to quality deterioration due to the incorporation of noise and the like.

An object of the present invention is to solve the above-mentioned conventional drawbacks, reduce the mounting area and the number of parts, reduce the number of adjustment parts, and provide a low cost video signal quantization lid that is resistant to noise.
be.

The quantization device of the present invention includes: an envelope detection circuit that detects an envelope voltage of an analog video signal; a first A-D conversion circuit that converts the envelope voltage output from the circuit into a digital signal; a second A-D conversion circuit that converts a video signal into a digital signal, and the first and second A-D conversion circuits;
and a first storage circuit that stores in advance a quantized value corresponding to an address position addressed by the output signal of the i-conversion circuit, and outputs a digital video signal by the output of the first storage circuit. It is characterized by

It should be noted that a shift register is provided that sequentially stores the output signal of the first storage circuit for a plurality of both lines, and the parallel output signal of the shift register is used as an address signal to transfer the digital video signal from the corresponding address of the second storage circuit. By outputting a suitable digital value at each address position of the second storage circuit, it is possible to further reduce the influence of noise.

Next, the present invention will be explained in detail with reference to the drawings.

FIG. 5 is a block diagram showing one embodiment of the present invention.

That is, an envelope voltage 52 is extracted from the analog video signal 51 by an envelope detection circuit 501, and the envelope voltage 52 is extracted from the analog video signal 51.
It is converted into a digital signal 54 by a conversion circuit 503.

The analog video signal 51 is also sent to an A-D converter circuit 50.
2 and is converted into a digital signal 53. A-
The outputs of the D conversion circuits 502 and 503 are latched by latch circuits 507 and 508, respectively, by a timing pulse 58 synchronized with the pixel output. Latch circuit 507.5
The output signal 08 is used as the read address of the first memory circuit 504.

On the other hand, in each address of the first storage circuit 504, quantized values corresponding to the envelope voltage and the video signal voltage are stored in advance as digital information. Since the quantized value Q of each pixel is determined only by the video signal voltage value 7 and the envelope voltage value 2, the quantized value Q is expressed by the following function: Q=f(vv, v□). Therefore, the video signal voltage value vv
, the digital conversion data of the envelope voltage value vw are denoted as ``target'' and ``Dw'', respectively, then it can be expressed as Q''=f' (Dv #Dw).In other words, the quantized value Q is unique depending on the digital conversion data Dv and the axis. In this example,
The address structure of the first storage circuit 504 is as shown in FIG.
and digital conversion data DWK of envelope voltage value vw,
In correspondence, a quantized value of Q=f' (Dv, Dw) is stored in each of the six addresses in advance.

Since the signal data output from the latch circuits 507 and 508 shown in FIG. 5 in accordance with the timing pulse 58 is nothing other than the digital value Dv of the video signal and the digital value Dw of the envelope at each pixel point, both of the above data are The output signal 55 read out from the first storage circuit 504 as an address signal is the quantized value Q for the pixel.

That is, the output signal 55 of the first storage circuit 504 can be directly output as a digital video signal.

However, in this embodiment, the influence of noise is further reduced by providing a shift register 505 and a second storage circuit 506.

That is, as shown in FIG.
has, for example, five stages of memory elements, and the first memory circuit 50
The output signal 55 for one pixel outputted by No. 4 is sequentially stored in the first storage element by the timing pulse 58, and a shift operation is performed. Therefore, the quantized output values Gll to G15 for five consecutive pixels are stored in the five stages of storage elements.

The output values of each stage of the shift register 505 are parallelized and used as a read address signal for the second storage circuit 506. The second storage circuit 506 stores in advance the optimum digital value for the central pixel of the five pixels at the address position. The optimum digital value is not the output value G13 of the central storage element itself, but is a value that also takes into account the output values of the preceding and following storage elements.

For example, the single child output values Gll to G1 for 5 consecutive pixels
5 as shown in FIG. 8, -oo', '″oo-
, j"Ol", 'OO", -oo", the second storage circuit 506 stores "
A digital value "00" is stored at the address. That is, the digital value output from the second storage circuit 506 becomes "00", which becomes a white level signal. Therefore, the output values G1'1 to G1'5 of the second storage circuit 506 for the above-mentioned consecutive five pixels are "00" as shown in the figure.
″.

“oo”, “oo”, “00”, “OO”. In other words, when noise instantaneously mixed into the analog video signal 51 causes only one pixel in the white level of the previous and subsequent pixels to become a gray level, the level of the preceding and following pixels will be taken into consideration. The value from which the influence of is removed is output.

The shift register 505 in this state is shown in FIG.
The output value 56 and the value of the digital video signal 57 output from the second storage circuit 506 are shown.

Also, for example, the quantized output value G16 for five consecutive pixels
G20 is '1 bi' as shown in FIG.

“10”, “00”, “11”, “10#”, “jl 100” of the second storage circuit 506
For example, ``0bi'' is read from address 01110''. In this case, the digital video signal 57 output from the second storage circuit 506 is for example "
11', "10", @Obi, "11#, "10", and when the center of the black bit is missing, it is possible to output data corrected by taking into account the previous and subsequent levels.

The value stored at the above address of the second storage circuit 506 is
It can also be set to "10" or "1 bit" instead of "-01". In either case, the influence of noise can be reduced compared to outputting "00" as it is affected by noise. In addition to simply correcting noise and omissions (for example, it is also possible to appropriately set the interior of a certain screen, that is, the digital output value, in relation to the output values of the pixels before and after it. For example, it is possible to adjust the contrast. It is possible to change.

In the above embodiment, the analog circuit is only the envelope detection circuit, and there is no need for slice setting circuits, comparison circuits, etc. as in the conventional case, so circuit adjustment is easy and miniaturization is possible. , which has the effect of being less susceptible to noise. Further, the output of the first storage circuit 504 is accumulated in the shift register 505, and the output signal of the shift register is stored in the second memory t1110! As the read address of the circuit 506, the previous and next one is preset from the second memory circuit 506.
By reading out digital values that take into account the 11i elementary state, the influence of noise can be further reduced.

As described above, in the present invention, it is possible to significantly reduce the circuit adjustment required in conventional analog quantization circuits, and because discrete components such as resistors and capacitors, analog ICs, etc. are replaced with digital circuits. , it becomes possible to improve circuit packaging density, reduce costs, etc. Further, conventionally, a power source other than +5V was required for analog ICs, but according to the present invention, there is an advantage that the power supply voltage can be unified to, for example, +5V.

Furthermore, there is no need to provide a separate board for analog signal processing (and simultaneous mounting on a digital circuit board is also possible.In addition, digital processing has the effect of being resistant to noise.
Sara K11. It is also possible to arbitrarily set the quantization level of one pixel from information for several pixels, and in this case, the influence of noise can be further reduced.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an example of a conventional video signal quantization device, Fig. 2 is a waveform diagram showing an example of an analog video signal, and Fig. 3 is a setting for the envelope line of the analog video signal in the conventional device. FIG. 4 is a diagram showing a quantization output value when the video signal of FIG. 2 is quantized by a conventional device #, and FIG. 6 is a diagram showing the address structure of the memory circuit 504 in the above embodiment, FIG. 7 is a diagram showing the connection relationship between the shift register and the second memory circuit in the above embodiment, and FIG. 8 is a diagram showing the connection relationship between the shift register and the second memory circuit in the above embodiment. A diagram showing the relationship between the input value and the output data of the second storage circuit 506 when noise is mixed into the shift register 5osK continuous white level signal in the example, and FIG. 9 is the input of the shift register 505 in the above embodiment. Signal and second storage circuit 50
6 is a diagram showing an example of the relationship with the output data of No. 6. FIG. In the figure, 11.51...analog video signal, 1
2.52... Envelope voltage, 13... Slice level signal, 14... Child information, 53.54... A-D
Output signal of conversion circuit, 55... Output signal of first storage circuit, 56... Output signal of shift register 505, 5
7... Digital video signal, 58... Timing pulse, 101.501... Envelope detection circuit, 102...
... Slice setting circuit, 103 ... Comparison circuit, 104
... encoding circuit, 502.503 ... first and second A-Dr conversion circuit, 504 ... first σ] storage circuit,
505...Shift register, 506...Second storage circuit, 507, 508...Latch circuit. Patent Attorney Resident 1) Envoy So Figure 2 Figure 3 Figure 4 Figure 6 MSB
LSEI Figure 7 6 No. 81” No. 9

Claims (2)

[Claims] (1) An envelope detection circuit that detects the envelope voltage of an analog video signal, a first A-D conversion circuit that converts the envelope voltage output from the circuit into a digital signal, and a first A-D conversion circuit that converts the analog video signal into a digital signal. a second A-D converter circuit for converting into a second A-to-D converter circuit; A video signal quantization device comprising: a storage circuit; and outputs a digital video signal based on the output of the first storage circuit. (2) The video signal quantization device according to claim 1, further comprising: a shift register that sequentially stores the output value of the first storage circuit for the next several pixels; and a parallel arrangement of data for the plurality of pixels in the shift register. a second storage circuit that stores in advance a corrected quantization value for a central pixel of the plurality of pixels at an address location addressed by the output signal; A device characterized by outputting.