JPS58195318A - Voltage detector of series thyristor - Google Patents
Voltage detector of series thyristorInfo
- Publication number
- JPS58195318A JPS58195318A JP7947082A JP7947082A JPS58195318A JP S58195318 A JPS58195318 A JP S58195318A JP 7947082 A JP7947082 A JP 7947082A JP 7947082 A JP7947082 A JP 7947082A JP S58195318 A JPS58195318 A JP S58195318A
- Authority
- JP
- Japan
- Prior art keywords
- output
- reverse voltage
- shot
- amplifier
- voltage detection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/10—Modifications for increasing the maximum permissible switched voltage
- H03K17/105—Modifications for increasing the maximum permissible switched voltage in thyristor switches
Landscapes
- Electronic Switches (AREA)
- Power Conversion In General (AREA)
- Thyristor Switches And Gates (AREA)
Abstract
Description
【発明の詳細な説明】 この発明は、直列サイリスタの電圧検出装置に関する。[Detailed description of the invention] The present invention relates to a voltage detection device for a series thyristor.
この種の電圧検出装置の従来例を第1図に示すっ同図に
おいて、1は複数のサイリスタ1m、〜1dを直列接続
してなる回路であって、各サイリスタ18〜1dの夫々
に検出素子である発光ダイオード21〜2dが並列に挿
入されている。31〜3dは*に制限抵抗であって夫々
発光ダイオード2a〜2dを保護する為に設けである。A conventional example of this type of voltage detection device is shown in FIG. Light emitting diodes 21 to 2d are inserted in parallel. 31 to 3d are limiting resistors provided to protect the light emitting diodes 2a to 2d, respectively.
発光ダイオード28〜2dは、サイリスタ11〜1dの
逆方向電圧印加時に光信号を出力する。発光ダイオード
18〜1dの光信号は夫々伝送路を構成するライトガイ
ド4a〜4dで低電位側にある受信部5a〜5dの光電
変換器6a〜6dに伝送される。光th、変換器68〜
6dの出力は夫々増巾器71〜7dで増巾された後、出
力部の論理和素子8を通して出力される。The light emitting diodes 28 to 2d output optical signals when a reverse voltage is applied to the thyristors 11 to 1d. Optical signals from the light emitting diodes 18 to 1d are transmitted to photoelectric converters 6a to 6d of the receiving units 5a to 5d on the low potential side by light guides 4a to 4d, respectively, which constitute transmission paths. Light th, converter 68~
The outputs of 6d are amplified by amplifiers 71 to 7d, respectively, and then outputted through the OR element 8 of the output section.
この従来装置では、回路1にサイリスタ1a〜1dの逆
方向電圧が印加されると、ライトガイド、光電変換器及
び増巾器を含む夫々の経路を経て逆す向電圧の印加を知
らせる信号が逆方向電圧印加時間TAの間論理和素子8
に入力され該論理和素子8から逆方向電圧検出信号eが
出力されるが、上記逆方向電圧が印加されていない時に
上記複数経路中の1に何らかの原因で異常信号が生じた
場合にも、該異常信号が論理和素子8から逆方向電圧、
検出信号eとして出力されるという誤動作が起る欠点が
あった。In this conventional device, when the reverse voltage of the thyristors 1a to 1d is applied to the circuit 1, a signal indicating the application of the reverse voltage is sent through each path including the light guide, the photoelectric converter, and the amplifier. During the directional voltage application time TA, the OR element 8
is input to the logical OR element 8, and a reverse voltage detection signal e is output from the OR element 8. However, even if an abnormal signal occurs in one of the plurality of paths for some reason when the reverse voltage is not applied, The abnormal signal is a reverse voltage from the OR element 8,
This has the drawback that a malfunction occurs in that it is output as the detection signal e.
この発明は、上記した従来のもの\欠点を除去する為に
なされたもので、受信部と出力部との間に論理積素子を
挿入し、該論理積素子に、受信部の出力を直接及びワン
ショットマルチを介して人力することにより、従来に比
し信頼性の高い直列サイリスタの電圧検出装置を提供す
ることを目的とする。This invention was made to eliminate the drawbacks of the conventional ones described above, and includes an AND element inserted between a receiving section and an output section, and the output of the receiving section is directly transmitted to the AND element. The purpose of this invention is to provide a voltage detection device for series thyristors that is more reliable than the conventional one by manually performing one-shot multiplexing.
以下に、この発明の一実施例を図について説明する。An embodiment of the present invention will be described below with reference to the drawings.
第2図において、9a〜9dはワンショットマルチであ
って、夫々増巾器1a〜7dの出力によって駆動される
。ワンシミツトマルチ91〜9dは、その出力の時間巾
TBが逆方向電圧印加時間TA より若干大きくなる
Jうに構成されている。In FIG. 2, reference numerals 9a to 9d are one-shot multi-channel amplifiers, which are driven by the outputs of amplifiers 1a to 7d, respectively. The one-sided multipliers 91 to 9d are configured such that the time width TB of their output is slightly larger than the reverse voltage application time TA.
10a〜10dは論理積素子であって、夫々ワンショッ
トマルチ9a〜9dの出力と増巾器7a〜7dの出力を
受け、対応するワンショットマルチ9a〜9bと協動し
て異常信号阻止部を構成する。10a to 10d are AND elements, which receive the outputs of the one-shot multis 9a to 9d and the outputs of the amplifiers 7a to 7d, respectively, and cooperate with the corresponding one-shot multis 9a to 9b to block an abnormal signal. Configure.
論理積素子10a〜10dの出力は論理和素子8に入力
される。他の構成は、第1図のものと同じである。The outputs of the AND elements 10a to 10d are input to the OR element 8. The other configurations are the same as those in FIG.
この構成では、発光ダイオード2&、ライトガイド4m
、光電変換器6a1増巾器71、ワンショットマルチ9
m、論理積素子10mに異常がない場合には、サイリス
タ1aに逆方向電圧が加わる逆方向電圧印加時に、ワン
ショットマルチ9aが出力し、TB)TAである為、時
間TAの間、論理積木子10mが出力し、逆方向電圧検
出信号eが得られる。他の発光ダイオード1b〜1dと
夫々の出力の径路が正常である場合にも同様である。こ
の正常時の各部の出力のタイムチャートを:1
第3図に示す。図においてT1〜T3は夫々時間IJ、
j:
を表わしている。In this configuration, there are 2 light emitting diodes & 4 m light guides.
, photoelectric converter 6a1 amplifier 71, one-shot multi 9
m, if there is no abnormality in the AND element 10m, the one-shot multi 9a outputs when a reverse voltage is applied to the thyristor 1a, and since TB)TA, the logical building block is The output terminal 10m outputs a reverse voltage detection signal e. The same applies when the output paths of the other light emitting diodes 1b to 1d are normal. A time chart of the output of each part during normal operation is shown in Figure 3. In the figure, T1 to T3 are respectively times IJ,
j: represents.
この状態で、例えば増巾器7dが故障して出力しなくな
った一合、第4図に示す如く、ワンショットマルチ9d
、論理積素子10dは出力しない lが、他のワンショ
ットマルチ9a〜9c、m埋積素子10a〜10Cが出
力する為、逆方向電圧検出信号eが論理和素子8から発
生する。@5図に示す如く、ワンショットマルチ9dが
故障して出力しなくなった場合も、同様に逆方向電圧検
出信号eは出力される。従って、1の検出素子とその出
力を出力部に導く経路が正常であれば、回路1にサイリ
スタの逆方向電圧が印加されていることが検出される。In this state, if, for example, the amplifier 7d fails and does not output, the one-shot multiplier 9d as shown in FIG.
, the AND element 10d does not output l, but the other one-shot multiplexers 9a to 9c and m buried elements 10a to 10C output, so the reverse voltage detection signal e is generated from the OR element 8. As shown in Figure @5, even if the one-shot multi 9d fails and no longer outputs, the reverse voltage detection signal e is similarly output. Therefore, if the first detection element and the path leading its output to the output section are normal, it is detected that the reverse voltage of the thyristor is applied to the circuit 1.
逆に、サイリスタ11L〜1dの導通時に、例えば、増
巾器7dに異常が生じて該増巾器1dが異常信号を出力
した場合、該異常信号は上記異常の原因が除去されるま
では継続するので、この異常信号は、時間TBの間だけ
論理和素子を通過するが、以後は論理和素子に入力され
ないので、実質上、ワンショットマルチ9dと論理積素
子10dにより阻止される。Conversely, when the thyristors 11L to 1d are conductive, for example, if an abnormality occurs in the amplifier 7d and the amplifier 1d outputs an abnormal signal, the abnormal signal will continue until the cause of the abnormality is removed. Therefore, this abnormal signal passes through the OR element only during the time TB, but is not input to the OR element thereafter, and is substantially blocked by the one-shot multi 9d and the AND element 10d.
以上の如ぐ、この発明によれば、各受信部と出力部の間
に、ワンショットマルチと論理積素子を直列に挿、入し
、ワンショットマルチの入力と出力を論理積素子の入力
とする構成としたことにより、発光ダイオードと出力部
間の経路中の受信部等に故障が生じてサイリスタが逆方
向電圧を受けていない時に異常信号が発生しても、該異
常信号は、実質上、阻止されるので、従来に比して、信
頼性を鮪めることができる。As described above, according to the present invention, a one-shot multi and an AND element are inserted in series between each receiving section and an output section, and the input and output of the one-shot multi are connected to the input and output of the AND element. With this configuration, even if an abnormal signal is generated when the thyristor is not receiving reverse voltage due to a failure in the receiving section, etc. in the path between the light emitting diode and the output section, the abnormal signal will be effectively suppressed. , the reliability can be improved compared to the conventional method.
第1図は従来の直列サイリスタの電圧検出装置の回路図
、第2図はこの発明による直列サイリスタの電圧検出装
置の実施例の回路図、第3図〜第5しjけこの実施例の
動作を説明する為の各部信号のタイムチャートである。
図において、18〜1d・・・サイリスタ、2a〜2d
・・・発光ダイオード、4a〜4d・・・伝送路、5a
〜5d・・・受信部、8・・・論理和素子、9a〜9d
・・・ワンショットマルチ、10a〜10d・・・論理
積素子。
なお、図中、同一符号は同−又は相当部分を示す。
代理人 葛 野 信 −
7d
渕
別
丁I T2FIG. 1 is a circuit diagram of a conventional series thyristor voltage detection device, FIG. 2 is a circuit diagram of an embodiment of a series thyristor voltage detection device according to the present invention, and FIGS. 3 to 5 show the operation of this embodiment. 2 is a time chart of various signals for explaining. In the figure, 18-1d...thyristor, 2a-2d
...Light emitting diode, 4a to 4d...Transmission line, 5a
~5d... Receiving section, 8... OR element, 9a to 9d
. . . One-shot multi, 10a to 10d . . . AND element. In addition, in the figures, the same reference numerals indicate the same or corresponding parts. Agent Shin Kuzuno - 7d Fuchibetsu I T2
Claims (1)
れた発光ダイオード、各発光ダイオードが出力する光信
号を夫々受光して電気信号に変換する受信部を具える直
列サイリスタの電圧検出装置において、上記各受信部の
次段にワンショットマルチを設けると共に、該ワンショ
ットマルチの出力と上記受信部の出力を受ける論理積素
子を夫々設け、上記ワンショットマルチの出力に上記受
信部の出力部より小さくない時間巾を持たせたことを特
徴とする直列サイリスタの電圧検出装置。In a voltage detection device for a series thyristor, the voltage detection device includes a light emitting diode inserted between the anode and docker electrodes of each series thyristor, and a receiving section that receives an optical signal output from each light emitting diode and converts it into an electric signal. A one-shot multi is provided at the next stage of the receiving section, and an AND element is provided to receive the output of the one-shot multi and the output of the receiving section, and the output of the one-shot multi is not smaller than the output of the receiving section. A voltage detection device for a series thyristor characterized by having a time width.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7947082A JPS58195318A (en) | 1982-05-10 | 1982-05-10 | Voltage detector of series thyristor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7947082A JPS58195318A (en) | 1982-05-10 | 1982-05-10 | Voltage detector of series thyristor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58195318A true JPS58195318A (en) | 1983-11-14 |
Family
ID=13690771
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7947082A Pending JPS58195318A (en) | 1982-05-10 | 1982-05-10 | Voltage detector of series thyristor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58195318A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58222777A (en) * | 1982-06-16 | 1983-12-24 | Internatl Rectifier Corp Japan Ltd | Gate drive circuit for gate turn-off thyristor |
JPS5914357A (en) * | 1982-07-15 | 1984-01-25 | Hitachi Ltd | Controller for thyristor converter |
JPH02116218A (en) * | 1988-10-26 | 1990-04-27 | Nichicon Corp | Transistor trouble detecting circuit |
-
1982
- 1982-05-10 JP JP7947082A patent/JPS58195318A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58222777A (en) * | 1982-06-16 | 1983-12-24 | Internatl Rectifier Corp Japan Ltd | Gate drive circuit for gate turn-off thyristor |
JPH0479229B2 (en) * | 1982-06-16 | 1992-12-15 | Nippon Inter Electronics Corp | |
JPS5914357A (en) * | 1982-07-15 | 1984-01-25 | Hitachi Ltd | Controller for thyristor converter |
JPH02116218A (en) * | 1988-10-26 | 1990-04-27 | Nichicon Corp | Transistor trouble detecting circuit |
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