JPS58194415A - Variable gain amplifier - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] Technical field to which the invention relates This invention relates to a variable gain amplifier.

BACKGROUND OF THE INVENTION Various instruments used for measuring and recording data expressed as %, EE, current, etc. have multiple inputs, including devices such as chart recorders, digital voltmeters, etc. Input means for selecting one of the ranges are usually provided. The most common means is a series of manually switched voltage dividers that can be combined with an input amplifier, the gain of which is set by switching. Switching can also be done automatically with an automatic range switching circuit that selects a gain that maintains the displayed readout within the confines of the display or, in the case of digital displays, shifts the decimal point appropriately. 6 To maintain accuracy from range to range, each range requires a split branch to establish the voltage or gain ratio appropriate for the particular range. When a multi-range instrument has a large number of ranges, it is difficult to achieve various ratio values using ordinary, inexpensive resistors available on the market, and it is not desirable when the number of special and expensive resistors increases. .

The number of special resistors required is the same as standard resistors (each of which is 2
This can be reduced by designing an economical switched resistor network (in the circuit for more than one selected range). However, for some switching modes, the approximate ratio so obtained is unlikely to match the desired ratio value and will deviate considerably. This situation is exacerbated by inexpensive resistors with large tolerances.

OBJECTS OF THE INVENTION Firstly, it is to improve the correction values by microprocessor control applied to each of the above approximate ratios in such an economical switching circuit in order to obtain the desired exact ratio. .

Second, the switching required for each range is controlled by the same microprocessor, with full use of solid state components to avoid problems associated with moving contacts, relays, etc.

Third, other measures of acceptability using this invention 11
The use of the same microprocessor for correction and switching functions, responsible for calculation functions and control functions.

Fourth, it provides an internal means by which the necessary coefficients can be made available to the microprocessor for routine use for ratio correction.

DISCLOSURE OF THE INVENTION The foregoing and other objects and functional relationships of the variable gain amplifier herein disclosed as a preferred embodiment of the invention may be illustrated by considering the amplifier as an input amplifier for a multi-range chart recorder. be done. Various functions of the recorder are controlled by a microprocessor. The input amplifier of the present invention includes an operational amplifier arranged in non-inverting feedback mode. The multipath resistor network in the feedback and output branches of this amplifier is connected to the peripheral inno-interface adapter (
PIA) can be switched into multiple configurations using semiconductor switches controlled by bit values set by the microprocessor during latching. Output branch 1 of this resistor network is a divider, the upper element of which is shorted to change the output by a factor of 5. The output passes from the split path to an analog/digital (A/D) converter, which converts this output to a digital output and stores it in the renostar for subsequent software correction.

Due to the limited number of resistors and switches used in this gain control network, the exact ratio desired for the gain ratio of 10 in this example is only an approximation. Correction factor for each range (indicated as FUDGE during the software routine)
We devised a routine to multiply the approximation or raw output from the A/D converter by this correction factor to ensure a corrected digital output value in this range. This corrected value is used later in the recorder. The central microprocessor that controls other functions of the recorder directs its attention to this routine at predetermined intervals. The corrected output values are stored by the microprocessor for use in the recorder's servo routines.

The objects mentioned above and other objects, advantages and features of the invention will be explained in detail with reference to the drawings.

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an analog amplifier circuit according to the invention, namely a variable gain amplifier, in which the analog signal to be measured is applied to the input terminal of a simple filter 1. FIG. The filter 1 minimizes noise spikes, etc. and includes a conventional offset balancing resistor 2. One side of the input, the low pressure side, is usually
Grounded to the instrument chassis. The other side of the input is grounded to the positive or non-inverting input terminal 3 of a conventional operational amplifier 5 (commonly referred to as an "op amp"). The operational amplifier 5 is manufactured by Analog Devices, Inc.
) or manufactured by other manufacturers and known as Type 07, although other similar types may be satisfactorily used in this invention.

The output terminal 4 of the operational amplifier 5 is connected to a high-voltage side conductor 10 of a switchable feedback network 6 . A first voltage dividing path consisting of a resistor 11 and a resistor 13 or 15 is connected between the high-voltage conductor 10 and the ground, depending on the state of two mutually exclusive operating switches Sw4 and SW5. These switches SW4 and SW5, shown functionally here, are part of a semiconductor switch 17 which may be half a digital gate device manufactured by Siliconix or other manufacturers and known as DG390. be. A first shut resistor 19 that can be switched to the parallel resistor 11 by a switch SWI of the digital gate element 21 is also connected to the high voltage side conductor 10 . Similarly, the second shunt resistor 23 is also connected to the high-side conductor lO and is connected to the parallel resistor 11 by the switch S'w2 of the digital gate element 25.
can be switched to. These digital gate devices are each 1/4 of the digital gate device DG201 manufactured by the same manufacturer. Resistance 11.19,23
．． The ratio of the voltage appearing at the midpoint 8 of the voltage divider path 13 and 15 to the voltage appearing at the output terminal 4 can be of several values depending on the state of the switches SWI, SW2, Sw4 and SW5. One value of ′
Take.

The midpoint 8 is connected to the operational amplifier 5 in the usual manner via a conventional offset balancing resistor 14 and an oscillation suppression capacitor 12.
Connected to the inverting input terminal of

The voltage gain of this type of feedback amplifier circuit is inversely proportional to the ratio of the voltage at midpoint 8 to the voltage at output terminal 4 and is therefore determined by the state of the switch.

A voltage divider consisting of resistors 27 and 29 is also connected between high-voltage conductor 10 and ground. Digital gate element 34, consisting of one quarter of element DG201 and acting as switch SW3, can short circuit resistor 27 and thus change the voltage division ratio by a factor of about 5. Midpoint 1 of this voltage division path
2 is connected to the input side of an analog/digital (A/D) converter which digitizes the output voltage at midpoint 12.

The switching functions performed by the digital gate elements are determined by a microprocessor 35, which addresses a peripheral interface adapter (PIA) 33 and
The output port of is used as a launch to set the digital gate element to the open or closed position as determined by the bit code set up in the microprocessor depending on the selected range.

Table 1 below shows the switch positions and their corresponding analog gains in an example.

The analog gain value due to switching approaches the desired corrected gain value, but the A/D converter output value digitized by the microprocessor ("raw" A/D converter output)
It was found that it is possible to improve the accuracy of the gain with software corrections made to. In the simplest conversion of this software correction, 1FUDG in the software routine
Correction code coefficients, denoted E, are predetermined for each gain range and stored in memory.

The microprocessor obtains this code from memory and applies it to the digitized A/D converter output value using the equation below.

Corrected A/D converter output - Raw A/D converter output +
1/N (Raw A/D Converter Output) FIG. 2 shows a simplified flow chart diagram of the software routine, and Table 2 below shows typical purpose codes for the software routine.
The j1 coefficient 1/N is determined by the shift routine and addition routine shown in the flowchart of FIG.
UDGER'' service routine is retrieved and applied by a subroutine from FUDGE using the purpose code P. Thus, this software routine in combination with the switched hardware resistor network provides the desired corrected A/D conversion. equipment output is ensured.

To illustrate the extraction and use of the FUDGE code, a
Let us consider the range in which we calculate that the analog gain to be increased is 3690. At this time, the analog output voltage is 1845
mV. To simplify this example, the A/D converter reference voltage is also the ``raw'' A/D converter output.
Let us assume a value such that mv. 200 equivalent to 2000 counts for full scale on the recorder
Assuming that we want a corrected A/D converter output of 0 mV, using the above equation, we get: 2000=1845+(1845/N). From now on, 1g45/N = 2000-1845 = 155° If you solve this, N = 11.903 and t/N20.0840
It is 1. In binary, this is 00010101. By inverting this value of 17N and shifting it to the left by one number, we therefore create a novel, trivial and non-trivial method for making software correction routines by reserving "coats for FUDGE" to be used in software routines. It turns out that it can be simplified. By performing this operation on the value consisting of FUDGE, the binary number 101010000 is formed. This can be placed in a byte as 01010000 by removing the most significant bit, The routine generates a 1989 approximation corrected A/D converter output.
) can be extended to ζite.

In that case, change the I/N to 12 to 16 bits.
1゛(calculate, invert it and shift left to 1101
A FUDGE code of 010000 (which routine generates a corrected A/D converter output of 1999.95) can be provided. As will be obvious to those familiar with binary numbers, it is sometimes convenient to arbitrarily change the FUDGE in testing and code it to a closer result while still remaining within one node. be. An example of such a case would be to add 11010000 to FUDGE which yields 2003.6 for the corrected A/D converter output.
is to use. Modifying the FUDGE to keep it in one byte may be generally effective with if the software gain correction is increased arbitrarily to higher values in the same ratio for all ranges. . This also removes negative 1/N values. FUD
Maintaining the GE during 1.zeta.times may be very useful or even necessary if memory space is limited, and the shortness of this new software routine also helps with short memory. A higher software correction may be selected to eliminate the need for correction for a range of regions. If higher software corrections are used, changes in the A/D converter reference voltage will change the final output to the desired value over the entire range, e.g. 2000 in this example.
Return to mV.

This novel combination of software and hardware gain control enables additional advantages.

In the simple example given above, assume that precision resistors are used such that the variation in gain from one meter to another due to variations in resistor tolerance is negligible. However, an additional feature of this invention is that the range of FU
The raw gain error due to resistance variations can be well corrected by software routines by DGE code selection or numerical adjustment. Determining the desired FUDGE code value is accomplished by applying a known voltage to the input terminals of the operational amplifier and producing the desired corresponding digital output value.
This can be done by determining the DGE code and correcting the overall gain accordingly. This FUDGE code is FUDGE
It is then stored in non-volatile memory for use in the R subroutine.

Another extension of the scope of this invention is to include an automatic gain correction routine by the microprocessor each time a range is selected. A known voltage is provided to the analog input terminal. This voltage is supplied by the AD584 Pin Progra Sol Precision Reference Reference System, manufactured by Analog Systems Inc. and having an accuracy of better than 0.1%.
rrmable Presicion Voltage
Reference).

The microprocessor reads the raw A/D converter output as described above and uses the necessary FU to correct this output.
Determine the DGE code and FU thus determined
Write in DGE CO-1' RAM. This process is repeated each time a range is selected and can be run as many times as necessary to compensate for temporal fluctuations that affect the gain.

Notwithstanding the aforementioned advantages of using solid state switching means in the feedback network, the subject matter of the invention can also be implemented using mechanical switches or manual switching, and in the case of a unity gain range. can be performed without switching.

Although the operation and features of the preferred embodiments have been described in detail, there is no desire to be limited to the particular uses and configurations illustrated. This variable gain amplifier with software gain control can be easily employed in many applications where an amplifier with precisely known gain is desired. Various uses of this gain controlled amplifier will be apparent to those skilled in the art and may be readily made without departing from the spirit and scope of the invention as set forth in the claims.

[Brief explanation of the drawing]

Fig. 1 is a simplified wiring diagram of one embodiment of the present invention;
The figure is a simplified flow chart diagram of a software routine. 5... operational amplifier, 6... feedback circuit network,] 7,
2], +125.34...Digital gate element, SWI to SW5...Switch, 35...Microprocessor, 33...PIA latch 1, <1 plane G'jY'+'? (No change in content)
f super J IG 2 Procedural amendment (method) June 15, 1980 Mr. Commissioner of the Japan Patent Office 1. Indication of case 1988 Patent Application No. 33934 2. Name of invention variable gain amplifier 3. Related Patent Applicant Name Pu No ξ - Kin Elmer Corporation 4, Agent Drawings subject to amendment 6

Claims (1)

[Scope of Claims] 1. an operational amplifier, a feedback network connected to the operational amplifier, and an analog/digital converter associated with the feedback network; A variable gain amplifier comprising, in combination, calculation means for calculating a correction value for the digitized output taken by the converter; 2. The variable gain amplifier of claim 1, wherein the feedback network comprises a plurality of voltage dividers, and the voltage dividers include switches for selecting a plurality of predetermined voltage ratios. 3. A variable gain amplifier according to claim 2, wherein the switch is a solid state digital switch means. 4. A variable gain amplifier as claimed in claim 3, wherein the switch means is operated by a bit of a PIA latch controlled by a microprocessor. 5. The correction coefficient is determined by applying a known input terminal to the operational amplifier, and determining the value of the correction coefficient is predetermined from the characteristics of the feedback network. The variable gain amplifier according to any of the above. 6. By applying a known input terminal to an operational amplifier and determining the value of a correction coefficient for correcting the entire gain and writing it in a memory containing this correction coefficient, Mi iT (the coefficient is determined A variable gain amplifier equipped with either the first term or the first term.