JPS58188312A - Muting circuit of tape recorder - Google Patents

Muting circuit of tape recorder

Info

Publication number
JPS58188312A
JPS58188312A JP7029082A JP7029082A JPS58188312A JP S58188312 A JPS58188312 A JP S58188312A JP 7029082 A JP7029082 A JP 7029082A JP 7029082 A JP7029082 A JP 7029082A JP S58188312 A JPS58188312 A JP S58188312A
Authority
JP
Japan
Prior art keywords
recording
muting
switch
circuit
playback
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7029082A
Other languages
Japanese (ja)
Inventor
Toshihiko Hatanaka
俊彦 畑中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP7029082A priority Critical patent/JPS58188312A/en
Publication of JPS58188312A publication Critical patent/JPS58188312A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/02Analogue recording or reproducing

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Abstract

PURPOSE:To simplify the mechanism of the circuit and to obtain a tape recorder, by using the functions of the muting of recording and of reproduction in common with an AGC recording circuit. CONSTITUTION:A muting switch S3 is a reproducing muting switch at the reproduction, and when a voltage is applied to a transistor(TR) 2 via the switch S3 from a voltage applied terminal (d), the TR2 is set on, the input of an amplifier 1 is suppressed and operated as the muting of reproduction. On the other hand, at the recording, the switch S3 is a recording muting, the voltage is applied to the TR2 via the switch S3, and activated as the recording muting. Thus, the recording AGC is used in common for the recording muting and the reproduction muting, allowing to simplify the circuit constitution.

Description

【発明の詳細な説明】 本発明はテープレコーダーに関し、AGC録音回路と録
音ミューティングや再生ミューティングを同一トランジ
スタで行なうことにより回路の簡略化を図ったものであ
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a tape recorder, and the circuit is simplified by performing an AGC recording circuit, recording muting, and reproduction muting using the same transistor.

第1図は従来のテープレコーダーを示すものであり、a
は録音再生磁気ヘッド、bは入力端子、Cは出力端子、
dは電圧印加端子、81181は互いに連動して切換わ
る録音再生切換スイッチである。S3は再生ミュートス
イッチ、S4は録音ミュートスイッチ、2,5.6はト
ランジスタ、3.8.9はコンデンサ、4はダイオード
、7゜11は抵抗、lは録音再生アンプである。上記構
成において、録音時は8.、S2のスイッチが第1図に
示す側に切換えられる。このため入力端子すよりスイッ
チS1、アンf11スイ、チS2を介してヘッドaに信
号が印加され録音される。このときアンプ1の出力が一
定量を越えるとダイオード4、コンデンサ3を介してト
ランジスタがONされ録音レベルをコントロールする。
Figure 1 shows a conventional tape recorder, a
is the recording/playback magnetic head, b is the input terminal, C is the output terminal,
d is a voltage application terminal, and 81181 is a recording/playback changeover switch that is switched in conjunction with each other. S3 is a playback mute switch, S4 is a recording mute switch, 2, 5.6 are transistors, 3, 8, 9 are capacitors, 4 is a diode, 7°11 is a resistor, and l is a recording/playback amplifier. In the above configuration, when recording 8. , S2 are switched to the side shown in FIG. For this reason, a signal is applied to the head a via the input terminal switch S1, the switch F11, and the switch S2, and is recorded. At this time, when the output of amplifier 1 exceeds a certain level, a transistor is turned on via diode 4 and capacitor 3 to control the recording level.

この回路では録「ミュートをかけるだめにスイッチS4
を介してトランジスタ6に電圧を印加している。
In this circuit, the switch S4 must be muted.
A voltage is applied to the transistor 6 via the transistor 6.

一方再生時はS1+S!が第1図とは逆の方向に切換え
られる。このためへ、ドaの再生信号は、スイッチS1
1アンノ11抵抗7を介して出力端f aに印加される
。このときS3の再生ミュートスイッチを入れると、電
圧がトランジスタ5のベースに印加され出力が抑えられ
る。この第1図のミューティング回路は、録音AGCの
リカ・マータイムが焉かくてよい場合の回路であり、そ
して録音及び再生ミューティングをONからOFFにし
た場合、出力が05〜3秒の時間で復帰するようにコン
デンサ8,9を設けた構成にしている。これに7・jシ
第2図に示した従来例は、録音AGCのIj pパータ
イムを長くとっており、録音及び再生ミューティングを
ONからOFF した場合に、録音AGCのリカバータ
イムに影響されずに、出力がすぐに復帰するように構成
されている。なお回路の動作は第1図に示したものと同
様で、第1図と同一符号は同一内容を表しており、10
はトランシ入り、13は抵抗である。
On the other hand, when playing, S1+S! is switched in the opposite direction to that in FIG. For this reason, the playback signal of door a is switched to switch S1.
1 is applied to the output end f a via an anode 11 and a resistor 7. At this time, when the reproduction mute switch S3 is turned on, a voltage is applied to the base of the transistor 5 and the output is suppressed. The muting circuit shown in Fig. 1 is a circuit for the case where the recording AGC's timer time does not need to be shortened, and when the recording and playback muting is turned from ON to OFF, the output is output for a period of 0.5 to 3 seconds. The structure is such that capacitors 8 and 9 are provided to restore the state. On the other hand, in the conventional example shown in Figure 2 of 7.j, the recording AGC Ijp per time is set long, so that when recording and playback muting is turned from ON to OFF, it is not affected by the recording AGC recovery time. The output is configured to return immediately. The operation of the circuit is the same as that shown in Figure 1, and the same symbols as in Figure 1 represent the same contents.
is a transistor, and 13 is a resistor.

ところがこのような従来の構成では、録音のミューティ
ングと再生のミューティングにそれぞれのトランジスタ
が必要になる。
However, in this conventional configuration, separate transistors are required for recording muting and playback muting.

本発明はこのような問題を解決するために、AGC録庁
回路で録音ミー−ティングと再生ミー−ティングの機能
を兼用させ、回路構成を簡略化したテープレコーダーを
提供するものである。
In order to solve these problems, the present invention provides a tape recorder with a simplified circuit configuration in which the AGC recorder circuit serves both the recording meeting and playback meeting functions.

以下、本発明の実施例について第3図、第4図とともに
説明する。
Embodiments of the present invention will be described below with reference to FIGS. 3 and 4.

第3図、第4図において、それぞれ第1図、第2図と同
一機能の部分には同一符号を付して説明を省略する。そ
してS3は再生時には再生ミュートスイッチとなり、電
圧印加端子dよシミュートスイ、チS3を介してトラン
ジスタ2に電圧全印加すると、トランジスタ2がON状
態になり、アンプ1の人力を抑えて再生ミーートとして
動作し、一方録音時にはS3は録音ミュートスイッチと
なり、電圧を83を介してトランジスタ2に印加し、録
音ミュートとして動作する。
In FIGS. 3 and 4, parts having the same functions as those in FIGS. 1 and 2, respectively, are denoted by the same reference numerals, and explanations thereof will be omitted. S3 becomes a playback mute switch during playback, and when the full voltage is applied to transistor 2 via voltage application terminal d, simulator switch, and chi S3, transistor 2 is turned on, suppressing the human power of amplifier 1 and operating as a playback mute switch. On the other hand, during recording, S3 becomes a recording mute switch, applies voltage to transistor 2 via 83, and operates as a recording mute.

以上のように、本発明は録音AGC回路と録音ミー−テ
ィングや再生ミー−ティングと兼用し、回路構成の簡略
化を図ることができる。
As described above, the present invention allows the recording AGC circuit to be used for recording meetings and playback meetings, thereby simplifying the circuit configuration.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図は従来例を示す回路図、第3図。 第4図は本発明の回路図である。 a・・・録音再生磁気ヘッド、b・・・入力端子、C・
・・出力端子、d・・・電圧印加端子、SI+82・・
・録音再生切換スイッチ、S3 、S4・・・ミー−テ
ィング0 スイッチ、■・・・録音再生アンプ、2 、5 、6.
・・・トランジスタ、3,8,9.12・・・コンデン
サ、4ダイオード、7.11.13・・・抵抗。
1 and 2 are circuit diagrams showing a conventional example, and FIG. 3 is a circuit diagram showing a conventional example. FIG. 4 is a circuit diagram of the present invention. a... Recording/playback magnetic head, b... Input terminal, C...
...Output terminal, d...Voltage application terminal, SI+82...
・Recording/playback selector switch, S3, S4... Meeting 0 switch, ■... Recording/playback amplifier, 2, 5, 6.
...transistor, 3,8,9.12...capacitor, 4 diodes, 7.11.13...resistance.

Claims (1)

【特許請求の範囲】[Claims] AGC録音回路を備え、その回路により無録音部分を作
る−・だめの録音ミューティング、再生時に音量を下げ
る再生ミューティング機能を兼用させることを特徴とす
るテープレコーダーのミューティング回路。
This muting circuit for a tape recorder is equipped with an AGC recording circuit, and is characterized in that the circuit serves as a recording muting function to create unrecorded portions, and a playback muting function to lower the volume during playback.
JP7029082A 1982-04-28 1982-04-28 Muting circuit of tape recorder Pending JPS58188312A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7029082A JPS58188312A (en) 1982-04-28 1982-04-28 Muting circuit of tape recorder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7029082A JPS58188312A (en) 1982-04-28 1982-04-28 Muting circuit of tape recorder

Publications (1)

Publication Number Publication Date
JPS58188312A true JPS58188312A (en) 1983-11-02

Family

ID=13427196

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7029082A Pending JPS58188312A (en) 1982-04-28 1982-04-28 Muting circuit of tape recorder

Country Status (1)

Country Link
JP (1) JPS58188312A (en)

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