JPS58182760A - 連続型シミユレ−シヨン言語における初期値設定方式 - Google Patents
連続型シミユレ−シヨン言語における初期値設定方式Info
- Publication number
- JPS58182760A JPS58182760A JP57066001A JP6600182A JPS58182760A JP S58182760 A JPS58182760 A JP S58182760A JP 57066001 A JP57066001 A JP 57066001A JP 6600182 A JP6600182 A JP 6600182A JP S58182760 A JPS58182760 A JP S58182760A
- Authority
- JP
- Japan
- Prior art keywords
- name
- initial value
- unique
- variable
- integrator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45504—Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
- G06F9/45516—Runtime code conversion or optimisation
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/20—Design optimisation, verification or simulation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- Complex Calculations (AREA)
- Management, Administration, Business Operations System, And Electronic Commerce (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57066001A JPS58182760A (ja) | 1982-04-20 | 1982-04-20 | 連続型シミユレ−シヨン言語における初期値設定方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57066001A JPS58182760A (ja) | 1982-04-20 | 1982-04-20 | 連続型シミユレ−シヨン言語における初期値設定方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58182760A true JPS58182760A (ja) | 1983-10-25 |
| JPH027095B2 JPH027095B2 (cg-RX-API-DMAC7.html) | 1990-02-15 |
Family
ID=13303270
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57066001A Granted JPS58182760A (ja) | 1982-04-20 | 1982-04-20 | 連続型シミユレ−シヨン言語における初期値設定方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58182760A (cg-RX-API-DMAC7.html) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6785761B2 (en) | 1992-03-31 | 2004-08-31 | Seiko Epson Corporation | Selective power-down for high performance CPU/system |
| US7882380B2 (en) | 2006-04-20 | 2011-02-01 | Nvidia Corporation | Work based clock management for display sub-system |
| US7937606B1 (en) | 2006-05-18 | 2011-05-03 | Nvidia Corporation | Shadow unit for shadowing circuit status |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0532287U (ja) * | 1991-10-08 | 1993-04-27 | 株式会社新来島どつく | コイル式冷凍船の貨物艙口縁材構造 |
-
1982
- 1982-04-20 JP JP57066001A patent/JPS58182760A/ja active Granted
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6785761B2 (en) | 1992-03-31 | 2004-08-31 | Seiko Epson Corporation | Selective power-down for high performance CPU/system |
| US7082543B2 (en) | 1992-03-31 | 2006-07-25 | Seiko Epson Corporation | Selective power-down for high performance CPU/system |
| US7506185B2 (en) | 1992-03-31 | 2009-03-17 | Seiko Epson Corporation | Selective power-down for high performance CPU/system |
| US8117468B2 (en) | 1992-03-31 | 2012-02-14 | Chong Ming Lin | Selective power-down for high performance CPU/system |
| US7882380B2 (en) | 2006-04-20 | 2011-02-01 | Nvidia Corporation | Work based clock management for display sub-system |
| US7937606B1 (en) | 2006-05-18 | 2011-05-03 | Nvidia Corporation | Shadow unit for shadowing circuit status |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH027095B2 (cg-RX-API-DMAC7.html) | 1990-02-15 |
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