JPS58169437A - Three-dimensional data treating system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention Technical Field of the Invention The present invention provides a three-dimensional data processing system, particularly a three-dimensional memory for storing a group of cross-sectional data of a living body obtained by, for example, computer tomography technology. The present invention relates to a three-dimensional data processing system that extracts and displays cross-sectional data corresponding to an intersecting plane in a direction intersecting the aforementioned cross-section based on the content.

(B) Technical Background and Problems Although the present invention is not limited thereto, it will be described below in connection with processing cross-sectional data of a living body.

Recently, computer tomography technology has made it possible to non-destructively observe the cross-sectional state of a living body, for example, from cross-sectional data corresponding to a single cross-sectional view of a living body cut along a plane.

For example, it is not always easy to comprehensively diagnose the condition of an affected area, which is spatially widespread. Furthermore, even when obtaining cross-sectional data about a human head, for example, it is extremely difficult to obtain cross-sectional data from the top of the head toward the neck.

(C) Object and Structure of the Invention Based on the above points, the present invention provides cross-sectional data l-0, 2-1, ... Extract the song 2-n and store it on the 3D memory 3.

The purpose of this invention is to extract and display cross-sectional data on an arbitrary intersecting plane 4.

To achieve this, the three-dimensional data processing system of the present invention includes a three-dimensional memory in which cross-sectional data groups on a plurality of cross-sections cut at positions shifted by Δ are stored,
# In a three-dimensional data processing system that reads the contents of a three-dimensional memory and extracts and displays data corresponding to an intersecting plane that intersects the plurality of cross sections, the coordinate position information on the display screen that performs the above display and the intersecting plane an address conversion processing unit that generates an access address for the three-dimensional memory based on information about the three-dimensional memory, and a result converted by the address conversion processing unit in response to updating of the coordinate position information on the display screen. The cross-sectional data on the access address is read out from the three-dimensional memory and displayed on the display screen. This will be explained below with reference to the drawings.

(C) Example of carrying out the invention Fig. 2 is an explanatory diagram explaining the relationship between coordinates on the 3D memory, addresses in the 3D memory, and coordinates on the display screen, and Fig. 3 shows information regarding the intersecting plane referred to in the present invention. An explanatory diagram to explain,
4 is an overall configuration diagram of an embodiment of the present invention, FIG. 5 is a configuration diagram of an embodiment of the address converter shown in FIG. 4, and FIG. 6 is a time diagram for explaining the operation of the configuration shown in FIG. 5. FIG. 7 is an explanatory diagram illustrating one of the above-mentioned intersecting planes; FIG. 9 is an explanatory diagram related to FIG. 8; 10 is a configuration diagram of still another embodiment of the present invention corresponding to FIG. 5, FIG. 11 is an overall configuration diagram of another embodiment of the present invention corresponding to FIG. 4, and FIG.
A timetable for explaining the operation of the configuration shown in the figure.
Showing a chart.

FIG. 2(A) shows the coordinates corresponding to the three-dimensional memory.

FIG. 2(B) shows the coordinates corresponding to the display screen. Symbols 3 and 4 in the figure correspond to those in FIG. 1, 5 is a display screen,
(0, 0, 0) is the address origin in the 3D memory 3, x, y, z is the center point of the 3D memory 3 as the origin O
coordinate axis, P is a point corresponding to one piece of information specifying the intersection plane 4, χ1. )', J is Z on the intersection plane 4, 2
The coordinate axes on the intersecting plane, NS are the size values for length, width and height in the 3D memory 3, (0,0
) is the coordinate origin on the display screen.

(Sx, Sy) is the coordinate value T (
Sx'ISy') is the coordinate value of point S corresponding to coordinate axis Z+7 with AP located at the center of the display screen as the coordinate origin, (Am.

A, , A, ) is the coordinate value T (A
z' rA, / , A, / > is the coordinate value on the coordinate axes x, y, z corresponding to the point S on the display screen, and SS is the value of the vertical and horizontal size of the display screen 5. It represents.

In order to define the above-mentioned intersecting plane 4 for the three-dimensional memory 3, it is assumed that it is determined as follows. That is, the coordinate values x, y,
Let the coordinate value of one point P on z be (Pz'.

Py', PJ'), the intersection plane is 4 digits, the origin is 0
It is defined as a plane that is perpendicular to the straight line connecting and point P and passes through point P, and the coordinate axes χ, y, and i are such that the J axis is on the straight line OP. Then, the point P is displayed as being at the center point on the display screen 5.

By determining in this manner, unit vectors 173, Ir2, and lT1 are considered corresponding to the coordinate axis χ, 2.7 on the intersecting plane 4, as shown in FIG. In this way, the point that has the coordinate value (S +r l-r ++r2・Sy'++ra・Sx'
It is given by □-(1). Note that the above unit vector is expressed in polar coordinates.

is given by

From the above, the point s on the intersection plane 4 shown in Figure 3 is x
, y, z on w axis -rmw value<p:,p,;,h;>-
Suppose there is c.

It can be displayed in

The above values sx' and Sy' are at point P in Fig. 2 ω)
It is the value on the coordinate axes χ, y originating from , and is expressed as (
0,0) as the origin, that is, when converted into a coordinate value on the display screen 5.

is given by The above coordinate values Aχ/ , A; ,
A,1 is the address Aπ,A, , in the three-dimensional memory 3
l Converted to Ag.

is given by Therefore, equation (3), equation (4),
Using equation (5).

becomes.

That is, by giving information An to A33 regarding the intersection plane 4 and the coordinate values (Sx, Sy) on the 9 display screen 5, the cross-sectional data corresponding to the coordinate values (Sx r Sy) can be stored at an address on the three-dimensional memory 3. (Eighth, A.

It becomes possible to read from the position of At).

FIG. 4 shows an overall configuration diagram of an embodiment of the present invention. In the figure, numeral 3 is a stereoscopic memory, 6 is a computer tomography device, 7 is a host data processing device, and 8 is a stereoscopic memory address register.

9 is a data register, loFi display device, 11 is an address converter, and 12 is a cross-sectional position indicating section, which is connected to the above-mentioned point P.
13 is sjn
-cos calculation unit, 14-digit r register, 15 is clock
Timing generator, 16-digit synchronization signal generator.

17 represents an Sx counter, and 18 represents a Sy counter.

When horizontal and vertical synchronization signals are generated for display on display device 10, registers 17 and 18
SX+Sy is generated and supplied to the address converter 11. On the other hand, the address converter 11 has τ, ψ, θ
An to A3a obtained based on the above are generated, and the addresses (Ax, A
y, At) is set in register 8. As the coordinates (Sx, Sy) are updated, the corresponding cross-sectional data is read out from the three-dimensional memory 3, set in the register 9, and displayed on the display device [10]. Regarding the time delay until reading the contents of the 3D memory 3, the coordinates (Sx・Sy) are stored in registers 17.18.
It is sufficient to generate it earlier.

FIG. 5 shows an embodiment of the address converter shown in FIG. 4. Code 3.8.14.1.7゜-1 in the figure
to 20-3 are value An to A13 registers.

21.22 are multipliers, 23-1 to 23-3 are selectors, and 24-1 to 24-3 are multipliers 27.
X to 27Z are registers for addresses x, y, z, T
1. T2. T31T4 represent timing signals.

FIG. 6 shows the timing at which addresses for three-dimensional memory access are generated in response to the timing signals shown in FIG. To briefly note, those selected by the selectors 23-1 to 23-3 in response to the timing signal T1.

is extracted and set in register 27X. It can be considered that the same applies below.

In the address converter shown in FIG. 5, three 9-multipliers are provided. However, as shown in FIG. 7, serial processing can also be performed using only one multiplier.

In FIG. 7, each reference numeral corresponds to that in FIG. 5, and the explanation will be omitted except to point out that the one selected by the selector 23, 23' is calculated serially.

In the above description, it is assumed that the intersecting plane 4 can be any plane. However, if we limit the plane to a plane perpendicular to the Y-axis or a plane perpendicular to the Y-axis, for example, as shown in FIG. .

The intersection plane 4 shown in FIG. 8 has the coordinates of point P (r+ψ).

θ) corresponds to (r, 0.π/2). Therefore, the above equation (2) is equal to the address A, which corresponds to the equation (6).
+Ag is given by. And suppose N5=SS=2” −−−−□−−−−− (9)
If so.

becomes. Then, NS = 2″□□-, (11), MS-8Y=SY (where ■ is two's complement -)---(12
! 1, and if it is 1.

becomes.

From this, the intersection plane 4 is perpendicular to the Y axis in the (g) direction and ←) direction, ......, perpendicular to the Y axis and in the (g) direction.
If one is selected as the direction and (→direction), the result will be as shown in FIG. It is assumed that

FIG. 10 shows an example configuration of an address converter in a case corresponding to FIG. 9. Numbers 8 and 14 in the figure
, 17, 18, 25.27 correspond to Fig. 5, 2
8 represents an adder, 29X and 29Y a complement generator, and 30 a selector. According to the manner in which the illustrated data selector 30 is shown in FIG.

Data Sx, Sx, Sy, Sy, R are selected and addresses (Ax, Ay, As) are extracted.

In the case of the configuration shown in FIG. 4, it is necessary to output the three-dimensional memory 3 one after another at the same speed as the display operation for the two display devices 10. However, the capacity of the three-dimensional memory 3 is proportional to the cube of the number of pixels on one side of nine screens, and the three-dimensional memory 3 essentially has a large capacity. Attempting to access such a large capacity memory at the same speed as the display operation for the display device 10 as described above would be extremely expensive. On the other hand, if the read cycle for the three-dimensional memory 3 is lengthened to a certain extent or more, flickering occurs on the 9-display screen. The time of one frame of the display device is f (mouth c), 1
Assuming that the image in a frame is n (pixels) x lines, it is necessary to supply dot information one after another to nine display devices within a period of time.

FIG. 11 shows an overall configuration diagram of another embodiment corresponding to FIG. 4 in which the above-mentioned problems are solved.

'1 Code 3.7.8.10.11.12.13.14 in the figure
．． 15゜16.17.18 corresponds to Figure 4, υ, 3
1 is frame buffer memory IJ, 32 is Haatres.
The multiplexer 33 is a clock generator that generates a high-speed clock, and 34 is a refresh counter that generates an address for reading the frame buffer memory 3 to refresh the display screen. ing.

In the case shown in the figure, if information for one frame is read out from the three-dimensional memory 3 and exists in the frame buffer memory 31, the contents of the refresh counter 34 are incremented by a high-speed clock. (Rx * R
y), the contents of the frame buffer memory 31 are sequentially read out and supplied to the display device 10. That is, the display screen is refreshed at a high speed. On the other hand, the clock timing generator 1 generates a relatively low-speed clock.
5 determines the access timing to the three-dimensional memory 3. While the refresh operation is being performed using the contents of the frame buffer memory 31 as described above, the data read from the three-dimensional memory 3 is read out to the frame buffer memory 3 at a relatively slow cycle.
1 will be written to. FIG. 12 shows a time chart representing the operation during this period.

■ As described in detail, according to the present invention, data corresponding to positions on the intersecting plane can be extracted from a three-dimensional mesori and displayed.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram illustrating the concept of processing according to the present invention,
FIG. 2 is an explanatory diagram illustrating the relationship between coordinates on the 3D memory, addresses in the 3D memory, and coordinates on the display screen; FIG. 3 is an explanatory diagram illustrating information regarding the intersecting plane according to the present invention;
FIG. 4 is an overall configuration diagram of an embodiment of the present invention, FIG. 5 is a configuration diagram of an embodiment of the address converter shown in FIG. 4, and FIG. 6 is a time diagram for explaining the operation of the configuration shown in FIG. FIG. 7 is an explanatory diagram illustrating one of the above-mentioned intersecting planes; FIG. 9 is an explanatory diagram related to FIG. 8; 10 is a configuration diagram of still another embodiment of the present invention corresponding to FIG. 5, FIG. 11 is an overall configuration diagram of another embodiment of the present invention corresponding to FIG. 4, and FIG. 12 is an illustration of the configuration shown in FIG. 11. 2 shows a time chart for explaining the operation of the configuration. In the figure, 3 is a three-dimensional memory, 4 is an intersecting plane, 5 is a display screen,
10 is a display device, and 11 is an address converter. 31 represents a frame buffer memory. Patent applicant: Hiroshi Mori, Patent Attorney, Fujitsu Ltd.

Claims (3)

[Claims] (1) A three-dimensional memory is provided in which cross-sectional data groups on a plurality of cross-sections cut at positions shifted by Δ are stored, and the contents of the three-dimensional memory are read out and an intersection intersecting the plurality of cross-sections is read out. In a three-dimensional data processing system that extracts and displays data corresponding to a plane, an address conversion that generates an access address for the three-dimensional memory based on coordinate position information on the display screen that performs the display and information regarding the intersecting plane. A processing unit is provided, and the address conversion processing unit changes &! in response to updating of the coordinate position information on the display screen. A three-dimensional data processing system, characterized in that the cross-sectional data on the access address resulting from the image processing is read from the three-dimensional memory and output to the display screen. (2) The three-dimensional memory is configured to read the cross-sectional data in synchronization with a relatively slow clock, and the display screen data to be output to the display screen is outputted to the display screen output section by a clock faster than the relatively slow clock. The three-dimensional data processing system according to claim (1), wherein the three-dimensional data processing system is repeatedly supplied to the three-dimensional data processing system. (3) The address conversion unit is configured to correspond to a state in which the intersecting plane is limited to be a left plane parallel to one coordinate axis on the three-dimensional memory. ) The three-dimensional data processing system according to item (2).