JPS58168922A - Photodetecting circuit - Google Patents

Abstract

PURPOSE:To reduce power consumption by putting a switching FET in operation only when access to the output of a photodiode should be done and supplying electric power to an FET buffer, and supplying the electric power to only necessary element. CONSTITUTION:Through the on-off operation of the switching FET3, the photodiode D is charged up to a power supply voltage and then its discharge is started by photoelectrons. The potential of the S1 during light integration is power- amplified by a buffer T4 through a switching FETT1 in an on state and then led out of a voltage amplifier A used in common to other photodetecting elements through a signal line L. A capacitor C holds light integration signals at a time by turning off the FETT1 together with the other photodetecting elements and a specific photodetecting element signal is selected by a shift register SL. At this time, the buffer T4 is operated only for necessary photodetecting elements and the remaining buffers are powered off to reduce the whole power consumption.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit in a relatively small-scale light receiving element array such as a goldfish detection device for a camera. Conventionally, a circuit configuration called an image sensor KMOg type consisting of an array of a large number of light-receiving elements is often used, and a positive voltage is supplied from a power supply terminal (2) via FITT. First, the terminal SW
When a voltage is applied to turn T into the ON state 11, a current flows through photodiode D, but since the voltage is opposite to the polarity of photodiode D, photodiode DK has its associated capacitance O.
Accordingly, nine charges Qo are stored, and the potential of the positive electrode of the photodiode D reaches the same potential as the power supply potential, and the flow of current stops. Next, when the potential of SW is lowered and T is turned off to cut off the connection between the photodiode D and the power source, the charge in the photodiode immediately starts to be discharged by photoelectrons generated by the light incident on the photodiode DK. That is, the time integration of the incident light intensity (2) is started. When time 1 elapses after the start of integration, voltage is applied to SW again and T is turned on. By this time, the charge Q stored in the photodiode has been reduced from Qo by the charge kIt proportional to It, so the initial charge is restored again. A current flows into the power supply until it reaches Qo, and at this time a change in potential appears at the lower end 8 of the load in proportion to the current. In other words, the amount of t change in the potential of 8 at this time is the incident light intensity I
It represents the amount obtained by integrating υ over time t. This signal is taken out through voltage amplifier A. The above principle of operation has been commonly used in cases where a large number of light receiving elements are required because the circuit configuration of each light receiving element is simple, but it has certain drawbacks.

In other words, when a large number of light-receiving elements are used, a long signal line is required from S to an old amplifier At that is shared with many other light-receiving elements (not shown in the figure). The capacitance that exists is much larger than the capacitance of one conventional photodiode D. Therefore, the optical integral signal detected by amplifier A appears to be of a much smaller amount. Also, since the capacitance associated with this signal line is also supplied with a power supply current, a considerably larger current than the current supplying charge to the photodiode D flows through the load R, and therefore there is a large redundancy in the required signal line. A signal is generated at 8. Normally, to deal with this problem, an extra compensation circuit similar to the first photodiode and without light discharge is provided for each photodiode, and this circuit is also driven at the same time, and the difference between the signals generated in both is converted into an optical integral signal. It is often taken out as a Furthermore, since the necessary signal is included in the transient current for charging the photodiode D to the power supply voltage, it is susceptible to the effects of induction from peripheral circuits that occur during switching for charging. An even bigger problem is that when the optically integrated signal is read out as described above, the state of the photodiode D returns to the state at the beginning of the optically integrated signal.

In other words, in the configuration shown in Figure 1, the state of optical integration is not destroyed.
It cannot be read out in real time due to π. This is important for flexibly determining the light integration time in response to changes in illuminance over a wide range, such as in a camera focus detection device.
What a difficult thing.

The present invention provides a circuit for extracting an optical integral signal without difficulty and with low power consumption. FIG. 2 is a diagram illustrating its basic configuration and operation. Switching FIT as in the case of No. 111i
Depending on the on-off of T, the photodiode Da power supply voltage K
P discharge is started by the photoelectrons charged at t. The potential at 81 during optical integration is the switching F that is on.
After passing through BTT1 to the power layer in buffer T4, the signal is read out through a voltage amplifier shared with other light receiving elements through signal IIL. According to the zero-wire circuit shown in the figure, the circuit of Company C is used to simultaneously hold the optical integral signal by turning off T together with other light receiving elements when a proper time has elapsed after the start of optical integration. During optical integration, T1 of all the light receiving elements is turned on, and the signal of a specific light receiving element is selected by the shift register 8L, or the signal of the social part or a part of the light receiving elements is sequentially transferred to the shift register. The optical integration state in the photodetector can be observed non-destructively depending on the selection. When the observed signal reaches a certain appropriate level, all T's are turned off at the same time, and the signal at that moment is held in the signal holding capacitor 0 of each light receiving element. By operating 8L, the signal of the required light receiving element can be read out. In this way, it is easy to flexibly control the optical integration time according to the light intensity and always read out the signal at an appropriate level. Furthermore, in the case of this circuit, the signal of the can light receiving element always appears in a static form at 82 (t-) (during optical integration, it changes slowly according to the progress of optical integration), so the shift register 8L
If the switching period is set sufficiently long, it is possible to read the signal while avoiding the effects of extra induction accompanying switching.

Therefore, the extra compensation circuit IIK in the case of FIG. 1 is not required. In addition, since the capacitance connected in parallel to photodiode D is only that of the hold capacitor 0 and the capacitance associated from photodiode D to the gate of buffer T4, the capacitance connected in parallel with photodiode D is attached to the long signal IsL in voltage amplifier trench A. It is not affected by the large et capacitance and therefore already has a sufficiently large signal level on the input side of each amplifier. Therefore, the degree of increase in width for each person is also smaller than in the case of FIG. 1, and can be replaced with a good amount of 4.

However, one major problem with the configuration of FIG. 2, which has the various advantages described above, is the power consumption in the buffer T4. The current consumption here is about 100 .mu.A at a power supply voltage of 5.degree. in a typical IO design example. Therefore, if the number of photodiodes is 100, the current required for 100 buffers 4 reaches 10 mA.

This poses a serious problem in the horizontal winding of cameras, which have large restrictions on current value and power consumption.

Therefore, for each buffer T4, p
m'r'r! In this case, the buffer T4 works only for the light-receiving element required for signal readout, and most of the other buffers T4K do not supply power.This makes it easy to greatly reduce the overall power consumption. Note that the switching FETT does not necessarily have to be implemented for each photodetector.
! As shown in Figure 3, the entire light receiving element is divided into several groups of light receiving elements, and a single switching FET T4 is installed for each group.
It's good to have -.

[Brief explanation of the drawing]

FIG. 1 is a diagram explaining the basic operation of the conventional MO811 image sensor, FIG. 2 is a diagram explaining the basic operation of the circuit of the present invention, and FIG. 3 is a diagram showing another example of the present invention. . ■...Power supply terminal, R...Load, T...Switching FET, D...Photodiode, SW...Switching PET gate terminal, A...Voltage amplifier, L...
...Signal line, S...Point indicating the potential of the lower end of load R, TI
, T2 rT@-switching FIT, 8W1.
8W,, sws...Switching FIT gate terminal, C...°7 de7 circuit for signal hold, T4°°° power amplification FIT (. BACK7A L SL...Shift register, 81 ...
A point indicating the potential of the positive side electrode of the photodiode, Sl... A point indicating the output of buffer T4, 0... Output terminal. Patent applicant Takeomi Suzuki

Claims (1)

[Claims] A photodiode to which a voltage is applied in the opposite direction and a signal extracted from one pole of the diode via the first switching FET! 1. The above signal line is connected to the gate terminal as an input signal line through the connection of a signal hold capacitor and a mosquito capacitor connected in parallel to the above photodiode. In order to amplify the power of the signal from the above signal line. F'BT buffer and a second switching FBT provided between the line for supplying power from the #FBTFET buffer. Normally, the above FIT depends on the action of the second switching FET. The power supply to the buffer is cut off, and the second switching FIT is operated for a limited time only when it is necessary to access the signal from the photodiode.
A photodetection circuit characterized in that power consumption is reduced by supplying power to an ET buffer and extracting a signal from the buffer.