JPS58166878A - Picture monitor device - Google Patents

Picture monitor device

Info

Publication number
JPS58166878A
JPS58166878A JP4814782A JP4814782A JPS58166878A JP S58166878 A JPS58166878 A JP S58166878A JP 4814782 A JP4814782 A JP 4814782A JP 4814782 A JP4814782 A JP 4814782A JP S58166878 A JPS58166878 A JP S58166878A
Authority
JP
Japan
Prior art keywords
address
memory
data
control circuit
reading
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4814782A
Other languages
Japanese (ja)
Inventor
Yasuo Matsui
松井 康夫
Masahiko Ikeda
雅彦 池田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4814782A priority Critical patent/JPS58166878A/en
Publication of JPS58166878A publication Critical patent/JPS58166878A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/01Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Systems (AREA)

Abstract

PURPOSE:To display with no distortion the data given from a detector which has an arc-shaped scanning, by generating an address corresponding to the arc- shaped scanning in the form of an access address of a feed memory. CONSTITUTION:An access is given to a memory M2 in an arc-shaped scanning mode, and an address that is an output of the M2 is given in the form of a writing or reading address. A writing address control circuit G reads the address sent from a switch S in a reading mode of a feed memory M3 and transmits it to a reading control circuit C1 as an address. Receiving this reading address, the circuit C1 gives an access to the M3 and delivers the data corresponding to the address to a D/A converter D in the form of a reading data (f). The converter D gives a D/A conversion to the data (f) and delivers it as an analog video signal. This video signal is sent to a CRT (not shown in the figure) via a CRT control circuit (not shown in the figure) to display a requied picture.

Description

【発明の詳細な説明】 本発明は、画像モニタ装置に関する。[Detailed description of the invention] The present invention relates to an image monitoring device.

地球観測衛星などから送られてくる画像は1画面分で約
20〜30秒かかり普通の60フレ一ム/秒のテレビ画
面に表示するには、データを蓄えるフィールドメモリが
必要である。ところが、第1図(a)に示すように、円
弧状にスキャンを行うタイプの検出器の場合、曲線状に
スキャンされた形でフィールドメモリ内にデータが格納
される。このフィールドメモリ内のデータをモニタ画面
上で直線状に表示すると、第1図(b)の如き表示とな
9、画像に大きな歪みを生ずる。図で、A、BXCXD
が互いに対応した位置を示している。かかる歪みの発生
は、衛星から送られてくる画像の再現性が悪くなること
を意味し、好ましくない。
It takes about 20 to 30 seconds for one screen of images sent from earth observation satellites, etc., and field memory is required to store the data in order to display them on an ordinary television screen at 60 frames per second. However, as shown in FIG. 1(a), in the case of a type of detector that scans in an arc shape, data is stored in the field memory in the form of a curve scan. If the data in the field memory is displayed in a straight line on a monitor screen, the image will be displayed as shown in FIG. In the figure, A, BXCXD
indicate positions that correspond to each other. The occurrence of such distortion means that the reproducibility of images sent from the satellite deteriorates, which is not desirable.

本発明の目的は、上述した従来技術の欠点をなくし、円
弧状のスキャンを行う検出器からのデータを歪みなく表
示できる画像モニタ装置を提供するものである。
An object of the present invention is to eliminate the drawbacks of the prior art described above and to provide an image monitor device that can display data from a detector that performs arcuate scanning without distortion.

本発明の要旨は、画像データをフィールドメモリに書込
む際にメモリの書込み番地を円弧状に指定するコントロ
ール回路を設けることにより従来通りフィールドメモリ
を走査線方向に読出しても画面に歪みが生じないように
したことにある。以下、本発明を図面により詳述する。
The gist of the present invention is that, by providing a control circuit that specifies the writing address of the memory in an arc shape when writing image data to the field memory, distortion does not occur on the screen even when the field memory is read in the scanning line direction as before. That's what I did. Hereinafter, the present invention will be explained in detail with reference to the drawings.

第2図は本発明の画像モニタ装置の実施例を示す図であ
る。本実施例の画像モニタ装置は、フィールドメモリM
3、通線スキャン時に使用される舊込みアドレス用RO
MであるメモリM1.円弧スダヤン時に使用される書込
みアドレス用ROMであるメモリM2、続出し制御回路
CI、ROMアドレスを提供するアドレスカウンタC2
,4込みアドレス制御回路G 、 DA変換器りより成
る。
FIG. 2 is a diagram showing an embodiment of the image monitoring device of the present invention. The image monitor device of this embodiment has a field memory M
3. RO for inset address used during line scanning
M memory M1. Memory M2 which is a write address ROM used during arc sudayan, a continuous output control circuit CI, and an address counter C2 which provides a ROM address.
, a 4-inclusive address control circuit G, and a DA converter.

ディジクル画像データ(mピット)aはフィールドメモ
リM3内に格納されるデータであ抄、その時の書込み先
のアドレスは、制御回路Gから与えられるメモリM1.
M2のいずれかの出力アドレスでめる。メモリM1とメ
モリM2とのいずno選択はスイッチSによって行われ
る。メモリM1は、円弧状スキャンではなく直線スギャ
ン、即ちラスクスキャン時のアドレスを格納する。メモ
リM2はラスクスキャンではなく円弧状スキャン時のア
ドレスを格納する。アドレスカウンタC2は、スキャン
スタート信号によってセットされ、ワードクロック信号
Cを計数する。ワードクロック信号Cの各計数時毎にア
ドレスカウンタC2は、そのクロック入力毎の計数値を
メモリM1、又はM2のアドレスとして送出し、対応す
るデータ、即ち、メモリM5のアドレスを続出す。スキ
ャンスタート信号すとワードクロック信号Cとは、書込
みデータであるディジタル画像デークa−こ同期してい
る。特に、スキャンスタート信号すは画像のスキャンス
タートに同期し、ワードクロック信号Cは、ディジタル
i[データaと略同一時刻に生起する同期関係になって
いる。スイッチSは、通常スキャン時に5tllllに
オンし、円弧スキャン時にS、側にオンする。
The digital image data (m-pit) a is data stored in the field memory M3, and the write destination address at that time is given from the control circuit G to the memory M1.
Enter any output address of M2. The switch S selects between the memory M1 and the memory M2. The memory M1 stores addresses for linear scanning, ie, rask scanning, rather than arcuate scanning. The memory M2 stores addresses for arc scan rather than rask scan. The address counter C2 is set by the scan start signal and counts the word clock signal C. Each time the word clock signal C is counted, the address counter C2 sends out the count value for each clock input as an address of the memory M1 or M2, and successively outputs the corresponding data, that is, the address of the memory M5. The scan start signal and the word clock signal C are synchronized with the digital image data a-co, which is write data. In particular, the scan start signal C is synchronized with the scan start of the image, and the word clock signal C is in a synchronous relationship that occurs at substantially the same time as the digital i [data a]. The switch S is turned on to 5tllll during normal scanning, and is turned on to the S side during arc scanning.

このスイッチSO8,lS、のオンの選択は、通常スキ
ャンか円弧スキャンかを指令する手段(図示せず)によ
って行う。
Selection of turning on the switches SO8, 1S is performed by means (not shown) for instructing normal scan or arc scan.

書込みアドレス制御回路Gは書込みモード時゛スイッチ
Sを介して送出さnてくるアドレスを取込み、メモリM
3會書込みアクセスする点を主たる機能としている。他
の機能は、続出しモード時スイッチSから送出してくる
アドレスを読出しアドレスとして提供する機能である。
In the write mode, the write address control circuit G takes in the address sent out via the switch S, and stores it in the memory M.
Its main function is to provide write access. Another function is to provide the address sent from the switch S in the continuous output mode as a read address.

書込みアドレス制御回路Gは、メモリM3の読出しモー
ド時にスイッチSから送出してくるアドレスを読出し制
御回路C1に続出しアドレスとして送彎す′る。続出し
m111回路C1はこの続出しアドレスを受はメモリM
3をアクセスし、該アドレスに対応するデータを続出し
データfとしてDA変換器りに出力する。DA変換器り
はデータf t DA変換しアナログ映gI(11号と
して出力する。このアナログ信号はCRT制御回路(図
示せず)1経てCRT(図示せず月こ送られ必要々画傷
表示となる。伺、貌出し制御回路C1ti同期信号eを
分離し、外部出力を行っている。
The write address control circuit G sends the address sent from the switch S during the read mode of the memory M3 to the read control circuit C1 as a continuous address. The continuation m111 circuit C1 receives this continuation address in the memory M.
3, and the data corresponding to the address is successively outputted to the DA converter as data f. The DA converter converts the data ft to DA and outputs it as an analog video gI (No. 11).This analog signal is sent to the CRT (not shown) through the CRT control circuit (not shown) and is displayed as necessary to display image scratches. The synchronizing signal e of the protruding control circuit C1ti is separated and output to the outside.

以上の動作説明で明らかなように、通常時スキャン、即
ちラスクスキャン時には、メモリMlアクセスされ、該
メモリM1の出力であるアドレスが薔込み用又は続出し
用アドレスとして提供される。
As is clear from the above description of the operation, during normal scan, ie, last scan, memory M1 is accessed, and the address that is the output of memory M1 is provided as the initial or subsequent address.

この結果、通常時のスキャンに従った書込み、続出しが
なされる。一方、円弧状スキャン時には、メモリM2が
アクセスされ、該メモリM2の出力であるアドレスが書
込み用又は読出し用アドレスとして提供される。この結
果、円弧時のスキャンに従った誉込み続出しがなされる
。更に、メモリM3の格納内容が直線スキャンか円弧状
スキャンかということと、メモリM1.M2のどちらを
アクセスするかということとは同く無関係に扱うことが
できるため(スイッチSの選択の仕方は任意にできると
いう意味)、格納データとそのアクセスアドレスとは4
通りの選択を可能とする。
As a result, writing and continuous output are performed according to the normal scan. On the other hand, during arcuate scanning, the memory M2 is accessed, and the address that is the output of the memory M2 is provided as a write or read address. As a result, a series of compliments are made in accordance with the scan during the arc. Furthermore, it is important to know whether the contents stored in the memory M3 are linear scans or circular arc scans, and whether the contents stored in the memory M1. Since it can be handled independently of which of M2 is accessed (meaning that the selection of switch S can be done arbitrarily), the stored data and its access address are 4.
Allows for street selection.

同、フィールドメモリを1個の事例としたが複数個設け
ておき、直線スキャン専用、円弧状スキャン4用といっ
た使用の仕方もある。また、続出し制御41(ロ)路C
1と1込みアドレス制御(ロ)路C2とを(ロ)路的に
一体構成とし、続出し書込み制御回路として形成させて
もよい。ま九、メモ!JM1.M2をROM構成とした
が、RAM構成によって行い、その結果、アドレスを任
意に設定できる利点もめる。
In the same example, one field memory is used, but it is also possible to provide a plurality of field memories and use them for exclusive use for straight line scans and for circular arc scans. In addition, continuous output control 41 (b) path C
1 and the 1-write address control circuit (b) C2 may be integrated in terms of (b) circuit to form a successive write control circuit. Maku, memo! JM1. Although M2 has a ROM configuration, it has a RAM configuration, and as a result, there is an advantage that the address can be set arbitrarily.

以上の本発明によれば、画像の忠実な再現が可能になっ
た。
According to the present invention described above, it has become possible to faithfully reproduce images.

【図面の簡単な説明】[Brief explanation of the drawing]

g1図(a)、(b)は従来例の説明図、第2図は本発
明の実施例図である。 Ml、M2・・・書込みアドレス用メモリ、M3・・・
フィールドメモリ、C2・・アドレス制御回路、G・・
・書込みアドレス制御回路、C1・・・続出し制御回路
。 代理人 弁理士 秋 本 正 実 第1図
g1 Figures (a) and (b) are explanatory diagrams of a conventional example, and Figure 2 is an embodiment diagram of the present invention. Ml, M2...Memory for write address, M3...
Field memory, C2...address control circuit, G...
-Write address control circuit, C1... Continuation control circuit. Agent Patent Attorney Tadashi Akimoto Figure 1

Claims (1)

【特許請求の範囲】 フィールドメモリと、該フィールドメモリのアクセス用
アドレスを発生するアドレス発生手段と、該発生手段か
らの発生アドレスを誉込みモード。 続出しモードに従って書込み用アドレス、続出し用アド
レスとして上記フィールドメモリをアクセスし、その時
の画像データを書込み、又は読出すメモリ制御手段と、
該フィールドメモリからの続出しデータを表示してなる
表示手段とを備えると共に、上記アドレス発生手段は、
上記画像データが円弧状スキャンによって得られたデー
タである時に、該円弧状スキャンに対応したアドレスを
上記フィールドメモリのアクセス用アドレスとして発生
させる構成とする画像モニタ装置。
[Scope of Claims] A field memory, an address generation means for generating an address for accessing the field memory, and a mode in which the generated address from the generation means is read. a memory control means for accessing the field memory as a write address and a succession address according to a succession mode, and writing or reading image data at that time;
and display means for displaying successive data from the field memory, and the address generation means:
An image monitoring device configured to generate an address corresponding to the arcuate scan as an access address of the field memory when the image data is data obtained by an arcuate scan.
JP4814782A 1982-03-27 1982-03-27 Picture monitor device Pending JPS58166878A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4814782A JPS58166878A (en) 1982-03-27 1982-03-27 Picture monitor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4814782A JPS58166878A (en) 1982-03-27 1982-03-27 Picture monitor device

Publications (1)

Publication Number Publication Date
JPS58166878A true JPS58166878A (en) 1983-10-03

Family

ID=12795246

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4814782A Pending JPS58166878A (en) 1982-03-27 1982-03-27 Picture monitor device

Country Status (1)

Country Link
JP (1) JPS58166878A (en)

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