JPS58166124U - surface acoustic wave delay line - Google Patents
surface acoustic wave delay lineInfo
- Publication number
- JPS58166124U JPS58166124U JP6310282U JP6310282U JPS58166124U JP S58166124 U JPS58166124 U JP S58166124U JP 6310282 U JP6310282 U JP 6310282U JP 6310282 U JP6310282 U JP 6310282U JP S58166124 U JPS58166124 U JP S58166124U
- Authority
- JP
- Japan
- Prior art keywords
- acoustic wave
- surface acoustic
- delay line
- wave delay
- transducer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の縦続配置型タップ付弾性表面波遅延線、
第２図は従来の並列配置型タップ付弾性表面波遅延線、
第３図、第４図、第５図は本考案の実施例である。
なお図において、１．．２． ３〜２０・・・・・・タ
ップ出力用変換器、１００，１０１，１０２・・・・・
・入力用変換器、４０１，４０２〜４１８・・・・・・
磁気シールド用電極、３００・・・・・・圧電基板、で
ある。Figure 1 shows a conventional cascaded tapped surface acoustic wave delay line.
Figure 2 shows a conventional tapped surface acoustic wave delay line arranged in parallel.
3, 4, and 5 show embodiments of the present invention. In the figure, 1. ．． 2. 3 to 20... Tap output converter, 100, 101, 102...
・Input converter, 401, 402 to 418...
Magnetic shielding electrode, 300...Piezoelectric substrate.
Claims (1)
設置きれた構造の弾性表面波遅延線において、入力用変
換器に直接対面した出力用変換器以外の出力用変換器が
所望タップ遅延時間の２以上の整数倍の間隔で配置され
たことを特徴とする弾性表面波遅延線。In a surface acoustic wave delay line with a structure in which an input transducer and two or more output transducers are installed on a piezoelectric substrate, an output transducer other than the output transducer directly facing the input transducer is desired. A surface acoustic wave delay line arranged at intervals of an integral multiple of 2 or more of the tap delay time.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6310282U JPS58166124U (en) | 1982-04-28 | 1982-04-28 | surface acoustic wave delay line |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6310282U JPS58166124U (en) | 1982-04-28 | 1982-04-28 | surface acoustic wave delay line |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58166124U true JPS58166124U (en) | 1983-11-05 |
Family
ID=30073220
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6310282U Pending JPS58166124U (en) | 1982-04-28 | 1982-04-28 | surface acoustic wave delay line |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58166124U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5512768A (en) * | 1978-07-13 | 1980-01-29 | Mitsubishi Electric Corp | Manufactureing method of double-layer multi-crystal silicon structure mos type integrated circuit |
-
1982
- 1982-04-28 JP JP6310282U patent/JPS58166124U/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5512768A (en) * | 1978-07-13 | 1980-01-29 | Mitsubishi Electric Corp | Manufactureing method of double-layer multi-crystal silicon structure mos type integrated circuit |
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