JPS58163130A - Plasma display panel - Google Patents
Plasma display panelInfo
- Publication number
- JPS58163130A JPS58163130A JP57045864A JP4586482A JPS58163130A JP S58163130 A JPS58163130 A JP S58163130A JP 57045864 A JP57045864 A JP 57045864A JP 4586482 A JP4586482 A JP 4586482A JP S58163130 A JPS58163130 A JP S58163130A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- display
- cell
- transition
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Plasma & Fusion (AREA)
- Gas-Filled Discharge Tubes (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
Description
【発明の詳細な説明】
本発明はプラズマディスプレイパネル(以下FDPと略
す)に関し、とくに大容量のFDPに関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a plasma display panel (hereinafter abbreviated as FDP), and particularly to a large-capacity FDP.
FDPとして知られているガス放電を利用した表示パネ
ルは大面積の平面形表示装置として実用に供されており
、奇抜、端末機器の一端を担うものとしてますますその
大面積、大容量化に期待を持たれている。Display panels that utilize gas discharge, known as FDPs, have been put into practical use as large-area flat display devices, and are expected to become even larger in area and capacity as they play a role in novel terminal equipment. is held.
一方かかる大容量FDPを実現する為には、大容量化に
伴う輝度の低下、及び不均一性を回避すること、装備の
コンパクト化のためにファインピ、チで画素を構成でき
ること、そして極力駆動回路数を削減することによシ駆
動回路を含めた表示装置の低コスト化をはかることが大
きな技術的問題となっている。On the other hand, in order to realize such a large-capacity FDP, it is necessary to avoid the reduction in brightness and non-uniformity that accompanies the increase in capacity, to be able to configure pixels with fine pixels to make the equipment more compact, and to make the driving circuit as possible as possible. It has become a major technical problem to reduce the cost of the display device including the drive circuit by reducing the number of display devices.
一般にACリフレッシュタイプPDPはファインピッチ
で画素を構成できること、動作が安定で長寿命であるこ
と、そして、駆動回路が容易であること等々の優れた特
徴を有している。しかしながら、駆動が全画素を時間分
割して電圧を選択的に印加して所望の画素を発光させる
方法であることから、画素数の増加に伴い、駆動回路数
の増加及び輝度の減少という欠点を有しでいる。そして
、この欠点が表示の犬各量化を困難ならしめている。In general, AC refresh type PDPs have excellent features such as being able to configure pixels with a fine pitch, stable operation and long life, and simple driving circuitry. However, since driving is a method of time-dividing all pixels and selectively applying voltage to make the desired pixels emit light, as the number of pixels increases, there are drawbacks such as an increase in the number of drive circuits and a decrease in brightness. I have it. This drawback makes it difficult to quantify each dog in the display.
一方、ACメモリタイプFDP及びセルフシ7トタイシ
FDPは表示輝度が画素数に依存しないという特徴を有
しており、大表示容1PDPを提供し得る可能性がある
。ところがACメモリータイプPDPのメモリー機能は
、ガス放電に依って生ずる電荷普を各画素毎に制御して
初めて得られる。従ってACメモリータイプFDPは、
被雑な駆動回路が画素数に対応した数だけ必要であるた
め各々の画素への表示信号の書き込み、及び消去動作が
不安定にならざるを得ない。On the other hand, AC memory type FDPs and self-selected FDPs have a feature that display brightness does not depend on the number of pixels, and there is a possibility that a large display capacity 1 PDP can be provided. However, the memory function of an AC memory type PDP can only be obtained by controlling the electric charge generated by gas discharge for each pixel. Therefore, AC memory type FDP is
Since the number of complicated drive circuits corresponding to the number of pixels is required, the writing and erasing operations of display signals to each pixel inevitably become unstable.
ところが一方、セルフシフトタイプPDPは表示信号を
外部回路から過剰イオンあるいは過剰電子として注入し
、多相接続されたシフ)1極に依シ、画素での放電を順
次シフトさせて書き込む方法を採っているため動作が安
定でかっ、他のPDPに比較して駆動回路数を大幅に減
少させることが可能である。しかし々から、表示に際し
ての、放電を前記シフト電極数本で構成された画素内で
往りさせて保持するという要鯖から、画素サイズがピッ
チに比して小さくなり、表示パターンが見難いという欠
点を有している。On the other hand, self-shift type PDPs use a method in which display signals are injected as excess ions or electrons from an external circuit, and are written by sequentially shifting the discharge in the pixels, relying on a single pole connected in multiple phases. Because of this, the operation is stable and the number of driving circuits can be significantly reduced compared to other PDPs. However, during display, the pixel size becomes smaller compared to the pitch, making it difficult to see the display pattern due to the fact that the discharge is kept flowing within the pixel, which is made up of several shift electrodes. It has its drawbacks.
本発明は、以上述べた様な過剰イオンあるいは過剰電子
を注入して遷移電極で電荷を遷移させる電荷遷移タイプ
FDPが電荷のシフトスピード約2000文字/秒を有
するため、周辺装置からのアドレス時間を短くできるこ
と、ACタイプPDPが電極全面で高輝度の発光を程す
ることの特徴を組み合せて利用し大容量FDPを実現す
ることを目的としたものである。The present invention is advantageous in that the charge transition type FDP in which excess ions or electrons are injected to transfer charges at the transition electrode as described above has a charge shift speed of about 2000 characters/second, so that the address time from peripheral devices is reduced. The purpose of this is to realize a large-capacity FDP by combining the characteristics of being short and emitting high-intensity light over the entire surface of the electrodes of an AC type PDP.
本発明によればプラズマディスプレイパネルがアドレス
用セルとアドレス用電極、及び表示用セルと誘電体で被
覆された表示用電極から成υ、アドレス用セルを放電さ
せかつプラス電荷あるいは電子をアドレス用セル内に充
てんかつ保持し、プラス霜、荷あるいは、電子を表示用
セルへ移動させ交流電圧を印加した一対の表示用電極に
より、表示セルに放電を誘起させ、かつその放電を持続
させたことを特徴とするプラズマディスプレイパネルに
おいて、表示用セル内に配設される誘電体膜で被接され
た第1及び第2の電極と、アドレス用セル内に誘電体膜
で被覆された相互にオフセットあるいは同一平面上に形
成される遷移電極と、プラス電荷あるいは電子を遷移電
極に注入するだめの入力電極と、注入電荷あるいは電子
を遷移電極から排するだめの消去電極と、放電による電
荷。According to the present invention, a plasma display panel is composed of an address cell, an address electrode, a display cell and a display electrode covered with a dielectric, and the address cell is discharged and positive charges or electrons are transferred to the address cell. A pair of display electrodes is charged and held in the display cell, and positive frost, charges, or electrons are transferred to the display cell, and an alternating current voltage is applied to induce a discharge in the display cell, and the discharge is sustained. In the plasma display panel characterized by the above, first and second electrodes are disposed in a display cell and are covered with a dielectric film, and the first and second electrodes are arranged in a display cell and covered with a dielectric film and are offset from each other or are covered with a dielectric film in an address cell. A transition electrode formed on the same plane, an input electrode for injecting positive charge or electrons into the transition electrode, an erase electrode for expelling the injected charge or electrons from the transition electrode, and charge due to discharge.
電子及び光でアドレス用セルを予備励起するだめのキー
プアライブ電極と、表示用セル各々とアドレス用セルと
を空間的に結合する開口を有した絶縁板とを備え、かつ
上記開口が、第一の電極と遷 5−
移電極とが表示用セル及びアドレス用セルとを隔てて相
対向する位置に設けられたことを特徴とするプラズマデ
ィスプレイパネルが得られる。It comprises a keep-alive electrode for pre-exciting the addressing cells with electrons and light, and an insulating plate having an opening for spatially coupling each display cell and the addressing cell, and the opening There is obtained a plasma display panel characterized in that the electrodes and the transition electrodes are provided at opposing positions with a display cell and an address cell separated from each other.
次に本発明の動作原理を電極接続の模式図(第1図)、
印加電圧波形のタイミング図(第2図)を用いて簡単に
記す。Next, the operating principle of the present invention is explained by a schematic diagram of electrode connection (Fig. 1),
This will be briefly described using the timing diagram (Fig. 2) of the applied voltage waveform.
まず入力電極りから表示信号のうち偶数番目の表示用セ
ル(あるいは奇数番目の表示用セル、尚本説明にあたり
便宜上表示用セルの数を20とした。)に対応するプラ
ス電荷を遷移電極A、に遷移する。First, a positive charge corresponding to an even-numbered display cell (or an odd-numbered display cell; for convenience, the number of display cells is assumed to be 20 in this explanation) of the display signal from the input electrode is transferred to the transition electrode A. Transition to.
この彼、他の4相遷移電極A、〜A、n、 B、〜B!
n。This guy, the other four phase transition electrodes A, ~A, n, B, ~B!
n.
CI”’−C!n 、DI”D2nを用いて上記プラス
電、荷を順次移行させる。この入力及び遷移の動作を第
2図に示したタイミングで順次実行し遷移電極D1〜D
!nに表示用セルの偶数番目の情報を遷移し、続いて表
示用セルに省き込みパルスWEを印加して、同時にアド
レス用セル内の遷移電極上D1〜D、n上のプラス電荷
を表示用セルに移行させる。この時、交流電圧パルスS
を印加されている表示用セルは遷移霜、極り、〜D1n
からプラス電荷を得たセルのみが−6=
放電発光を程し、それ以外のセルは発光しない。Using CI"'-C!n and DI"D2n, the positive charge and the charge are sequentially transferred. This input and transition operation is performed sequentially at the timing shown in FIG. 2, and the transition electrodes D1 to D
! Transition the even-numbered information of the display cell to n, then apply the omission pulse WE to the display cell, and at the same time change the positive charge on transition electrodes D1 to D and n in the address cell to display. Transfer to cell. At this time, AC voltage pulse S
The display cell to which is applied is transition frost, extreme, ~D1n
Only the cells that have received a positive charge from -6= emit discharge light, and the other cells do not emit light.
かつ、−担発光した表示セルは交流〜圧Sにより放電発
光を保持し続けることができる。In addition, the display cell carrying light can continue to maintain discharge light emission by alternating current to pressure S.
次いで、上記方法に依って奇数番目の表示用セルの情報
を遷移電極B1〜B、nに入力し、曹き込みパルスW。Next, the information of the odd-numbered display cells is input to the transition electrodes B1 to B, n according to the above method, and a filling pulse W is generated.
により表示用セルに書き込むことに依り表示用セル全て
に表示情報を書き込み発光させることができる。By writing the display information into the display cells, it is possible to write display information into all the display cells and cause them to emit light.
第3図は上記動作原理に基づく本発明の一実施例を示し
だものである。以下本実施例について具体的に説明する
。絶縁基板1上に誘電体被覆膜2有するストライプ状の
遷移電極3、及びキープアライブ電極4と電極表面を露
出した入力電極5を真空蒸着法等々の薄膜技術あるいは
シルクスクリン印刷等々に依る厚膜技術を用いて形成し
た。又、ホトエツチング等々に依り開口6を配設した絶
縁板70片面に誘電体被覆膜8を有する遷移電極9、キ
ープアライブ電極10と電極表面を線用した消去型5極
11、また一方の面に誘電体被覆膜12を有する第2の
表示用電極13を上述と同様の方法で形成した。−実表
示面側の第1の表示用電極14は絶縁体基板15上にS
nO,、Sbを蒸着した透明電極を用いかつ誘電体被覆
膜16で被覆した。FIG. 3 shows an embodiment of the present invention based on the above operating principle. This example will be explained in detail below. A striped transition electrode 3 having a dielectric coating film 2 on an insulating substrate 1, a keep-alive electrode 4, and an input electrode 5 with an exposed electrode surface are formed using a thin film technique such as a vacuum evaporation method or a thick film using a silk screen printing method or the like. Formed using technology. In addition, an insulating plate 70 with openings 6 formed by photo-etching or the like, a transition electrode 9 having a dielectric coating film 8 on one side, a keep-alive electrode 10 and an erasing type 5-electrode 11 with a wire on the electrode surface, and one side thereof. A second display electrode 13 having a dielectric coating film 12 was formed in the same manner as described above. - The first display electrode 14 on the actual display surface side is placed on the insulator substrate 15.
A transparent electrode on which nO, Sb was vapor-deposited was used and covered with a dielectric coating film 16.
以上の如く作製した3mの絶縁体基板をスペーサ17を
介して第3図の如く対向させ、不活性ガスを封入し、外
周囲をシーリングガラス18で密封し、表示用セル19
及びアドレス用セル2oを得た。The 3 m long insulating substrates produced as described above are placed facing each other with a spacer 17 in between as shown in FIG.
And an address cell 2o was obtained.
この様にして得られた本発明に依る表示パネルは絶縁体
基板1に配設された全ての遷移電極3上に表示用セル1
9とアドレス用セル2oとを空間的に結合するための開
口6が設けられた絶縁板7で表示用セル19とアドレス
用セル20が分離されかつ表示用セル19とアドレス用
セル20が立体的に積層された形状を有している。この
ため、表示には高輝度で信頼性の優れている外部電極形
セルを用いることができ、かつアドレス用セルの遷移動
作の安定化、入力電極の劣化の防止をはかることができ
、表示パネルとして信頼性及び表示品位が高く、かつフ
ァインピッチの大容量パネルを実現することができた。The display panel according to the present invention thus obtained has display cells 1 on all the transition electrodes 3 disposed on the insulating substrate 1.
The display cell 19 and the address cell 20 are separated by an insulating plate 7 provided with an opening 6 for spatially connecting the display cell 19 and the address cell 2o, and the display cell 19 and the address cell 20 are arranged three-dimensionally. It has a laminated shape. Therefore, external electrode type cells with high brightness and excellent reliability can be used for display, and the transition operation of address cells can be stabilized and input electrodes can be prevented from deteriorating. As a result, we were able to realize a fine-pitch, large-capacity panel with high reliability and display quality.
また、第4図に示す他の実施例、遷移!極を同一平面に
て形成したものも上述と同様の動作原理を持ち、同様の
効果を有することは言うまでもない。尚、符番は第3図
に統一しである。原理の説明、実施例において、制御す
る電荷としてプラス電荷のみについて説明したが電子を
制御する場合も同一の効果が期待されることは言うまで
も無い。In addition, another embodiment shown in FIG. 4, Transition! It goes without saying that a device in which the poles are formed on the same plane also has the same operating principle as described above and has the same effect. The numbers are the same as in Figure 3. In the explanation of the principle and the examples, only positive charges were explained as the charges to be controlled, but it goes without saying that the same effect is expected when controlling electrons.
第1図は本発明の電極接続の模式図、第2図は本発明の
印加電圧波形のタイミング図、第3図は本発明の表示パ
ネルの断面図、第4図は本発明の他の一つの実施例の表
示パネルの断面図である。
尚、図において、1,15・・・・・・絶縁体基板、3
゜9・・・・・・遷移電極、4,10・・・・・・キー
プアライブ電極、5・・・・・・入力電極、6・・・・
・・本特許による開口、7・・・・・・絶縁板、2,8
,12.16・・団・誘電体被覆膜、11・・・・・・
消去!極、13・・・・・・第2の表示用電極、14・
・・・・・第1の表示用電極、17・・・・・・スペ
9−
−サ、18・・・・・・シーリングガラス、19・・印
・表示用セル、20・旧・・アドレス用セルでアル。
10−FIG. 1 is a schematic diagram of electrode connection according to the present invention, FIG. 2 is a timing diagram of applied voltage waveforms according to the present invention, FIG. 3 is a cross-sectional view of a display panel according to the present invention, and FIG. 4 is a diagram showing another example of the present invention. FIG. 3 is a cross-sectional view of a display panel according to one embodiment. In the figure, 1, 15... insulator substrate, 3
゜9...Transition electrode, 4,10...Keep alive electrode, 5...Input electrode, 6...
...Opening according to this patent, 7...Insulating plate, 2,8
, 12.16... group/dielectric coating film, 11...
erase! Pole, 13...Second display electrode, 14.
...First display electrode, 17... Space
9- -S, 18...Ceiling glass, 19...Mark/display cell, 20...Old address cell. 10-
Claims (1)
ス用電極、及び表示用セルと誘電体で被接された表示用
電極とを有し、前記アドレス用セルを放1i1させかつ
プラス電荷または電子を前記アドレス用セル内に充てん
かつ保持し、前記プラス電荷または電子を前記表示用セ
ルへ移動させ交流電圧を印加した前記一対の表示用電極
によシ、表示セルに放電を誘起させ、かつ該放1.を持
続させるプラズマディスプレイパネルにおいて前記表示
用セル内に配設される誘電体膜で被榎された第1及び第
2の電極と、前記アドレス用セル内に誘電体膜で被榎さ
れた相互にオフセットまたは同一平面上に形成される遷
移電極と、前記表示用セル各々と前記アドレス用セルと
る空間的に結合する開口を有した絶縁板とを備え、かつ
前記開口が、前記第一の電極と前記遷移電極とが前記表
示用セル及び前記アドレス用セルとを隔てて、相対向す
る位置に、設けられたことを特徴とするプラズマディス
プレイパネル。A plasma display panel includes an address cell and an address electrode, and a display cell and a display electrode that are in contact with a dielectric material, and discharges the address cell and directs positive charges or electrons to the address cell. 1. The positive charge or electrons are filled and held in the display cell, and the positive charges or electrons are moved to the display cell, and an alternating current voltage is applied to the display electrodes to induce discharge in the display cell. In a plasma display panel which maintains a transition electrode formed offset or coplanar; and an insulating plate having an aperture spatially coupling each of the display cells and the address cell, and the aperture is connected to the first electrode. A plasma display panel characterized in that the transition electrode is provided at a position facing each other with a separation between the display cell and the address cell.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57045864A JPS58163130A (en) | 1982-03-23 | 1982-03-23 | Plasma display panel |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57045864A JPS58163130A (en) | 1982-03-23 | 1982-03-23 | Plasma display panel |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58163130A true JPS58163130A (en) | 1983-09-27 |
Family
ID=12731073
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57045864A Pending JPS58163130A (en) | 1982-03-23 | 1982-03-23 | Plasma display panel |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58163130A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100416089B1 (en) * | 1999-12-10 | 2004-01-31 | 삼성에스디아이 주식회사 | Plasma display panel |
-
1982
- 1982-03-23 JP JP57045864A patent/JPS58163130A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100416089B1 (en) * | 1999-12-10 | 2004-01-31 | 삼성에스디아이 주식회사 | Plasma display panel |
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