JPS58153416A - Voltage control type oscillator - Google Patents

Abstract

PURPOSE:To use a small capacity element, by using a switched capacitor as a capacity element to determine oscillation frequency. CONSTITUTION:If the output voltage V01 of an integrator 6 is started from an initial value ''0'' volt, the voltage V01 is raised by staircase waves. The integrator 6 is composed of a capacitor 6b, a switched capacitor 7a and a switch 7b. The raised voltage of the voltage V01 is deternined by the capacity ratio between the switched capacitor 7a and the capacitor 6b. If the voltage V01 exceeds the input voltage Vin of a comparator 8, the output V02 of the comparator 8 is inverted. Consequently, the output of an flip-flop 9 is also inverted and a switching element 10 is closed. As the result, the capacitor 6b is discharged, the integrator 6 is reset and the voltage V01 is returned to ''0'' volt again. Thus the oscillation frequency can be determined by the voltage applied to the input voltage Vin.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a voltage-controlled oscillator that oscillates at a frequency corresponding to a control voltage, and is particularly intended to provide an integrated circuit that can be easily transferred.

<Prior Art> Figure 1 shows a conventional voltage controlled oscillator. In FIG. 1, when the output Q of the set-reset type flip-flop l is at a high level, the high level is inputted to the level converter 2, the transistor Trx becomes conductive, and its collector output also makes the transistor Trg conductive. Due to the collector output, the transistor Tri becomes conductive, and the voltage E1 is applied from the power supply terminal T1 through this transistor Ifra.
However, as the output VL of the level converter 2, the operational amplifier 3m
, an input integrating resistor 3b, and an integrating capacitor 3C. The output Vs of the integrator 3 falls at a constant slope. When this output becomes less than the ground voltage, the output of the lower limit comparator 4 is inverted and becomes a low level, and the shift flip-flop 1 is reset by this output.

Therefore, the output Q of the flip-flop l is at a low level, the transistors Tr*, Trg, and Tys are not connected, and the transistor 'fla is connected, and the output VL of the level converter 2 is output from the power supply terminal T1. E is output. Therefore, the output of the integrator 3 changes from falling to rising. When the output Vs of the integrator 3 rises at a constant slope and becomes equal to or higher than the input voltage Min of the input terminal T1, the output of the upper limit comparator 5 is inverted and becomes a low level, and this low level output causes the p free lag frog. 1 is set, and its output Q becomes high level.

Therefore, the integrator 30 input passes through the level converter 2,
Since it becomes +E again, the output of the integrator 1 falls again, and the operation from the beginning is repeated.

Figure 2 shows the waveforms of each part. Signals S and R are inputs to the set and reset terminals of the flip-flop 1. Here, the resistance of the integrating resistor 3b is R1, and the capacitance of the integrating capacitor 3C is C, and the oscillation period T is given by T=凰・V in. Therefore, the circuit shown in FIG. 1 constitutes a voltage-controlled keepsake oscillator whose oscillation period T is proportional to the input voltage VinK.

However, such conventional voltage-controlled keepsakes are
In the case of integration, it is difficult to accurately manufacture the time constant CR of the integrator 30 due to rounding of manufacturing variations, and when trying to make a device with a large time constant CR, the resistance R or capacitance tC must be increased. There was a drawback that the exclusive area would be large because the

<Summary of the Invention> An object of the present invention is to provide a voltage-controlled projector that is suitable for integration and occupies a small area.

According to this invention, a constant charge is supplied to an integrator every cyclic period by a switched capacitor circuit and integrated, and the output of the integrator and the input control voltage are compared by a voltage comparator, and when a single stroke occurs, When this is detected, the integrator is reset using the detected output, and integration is started again. In this way, the capacitance ratio between the integrating capacitor and the capacitive element of the switched capacitor circuit, the input control voltage, and the oscillation period are determined, making it possible to use a small capacitive element, and therefore it is possible to use a small capacitive element. If the area can be reduced and both valley cover elements are simultaneously formed on the same substrate as an integrated circuit, the variation in capacitance value, especially the variation in capacitance ratio, can be made very small. An accurate oscillation burst number can be obtained.

<Example> An example of the present invention will be described with reference to FIG. The integrator 6 is composed of an operational amplifier 166m and an integrating capacitor 6b. -TI#A of the switched capacitor 7a is grounded, the other end is connected to the common point of the switching element 7b,
The integrating capacitor of the switching element 7bti terminal Te constitutes an integrator.

Reference numeral 7 is controlled by the voltage clock Ct, and when the clock Ct is at a high level, it closes to the terminal Tr to which the reference voltage Vr is applied, and when it is at a low level, it closes to the input side of the integrator 60. A switched capacitor circuit 7 is composed of a switched capacitor 7a and a switch element 7b.

The output side of the integrator 6 is connected to the non-inverting input side of the voltage comparator 8, and also to the inverting input ll1lK control voltage input terminal Ti of the comparator 8. The output side of the comparator 8 is connected to the data terminal DKIII of the D-type 7-lip 70 tube 9, the clock terminal C of the flip-flop 9 is connected to the terminal TcK, and the output terminal Q is the control input of the switching element 10 that short-circuits the integrating capacitor 6b. is connected to the oscillation output terminal T.
connected to.

Assuming that the output voltage V.1 of the integrator 6 starts at time t1 with an initial value of 0 volts, the output v@1 of the integrator 6 rises with N[waves I as shown in V.l in FIG. Then i〈. At this time, the rising voltage of #stage wave is CI-・Vr/C
Given in YCLE. C1 is switched capacitor 7
The capacitance of a is the capacitance of the CIFi integrating capacitor 6b.

Next, when the output V*1 of the integrator 6 exceeds the input voltage Vin, the output V*1 of the voltage comparator 8 is inverted from a low level to a high level at that time t1. D type flip flop 9
reads the output vo of the voltage comparator 8 with a delay of 1/2 clock, the output Q of the flip-flop 9 is inverted from the low level to the high level at the time tsK, and the switch element 10 is closed. Thereby, the charge on the integrating capacitor V''6b is discharged, and the integrator 6 is reset and its output becomes V·IFiO volts. At the same time, the output Vs mB of the voltage comparator 8 is inverted from high level to low level. 9 is 1
After clock delay, read that low level v@m and output Q
Flips from high level to low level. At the same time, the switch element 10 is opened and returned to the initial state, and the operation from the beginning is repeated. Here, the oscillation period T is, where t is the clock period and [N] is the maximum integer not exceeding N.

becomes. Therefore, the circuit shown in Fig. 3 has an oscillation frequency of vi
Construct a voltage-controlled keepsake controlled by n.

As explained above, in this invention, the integration for the integrator 6 is performed using a switched capacitor.
If this circuit is implemented using an integrated circuit, the absolute accuracy of capacitance CI and CI will vary due to manufacturing variations, but since the thickness of the dielectric material is uniform within one chip, a highly accurate capacitance ratio CI/Ct can be obtained. It will be done. Furthermore, since the oscillation period T depends on the capacitance ratio CM/C1K as shown in equation (1), this circuit can obtain a highly accurate oscillation frequency. Furthermore, if the capacitance CI is made smaller than K, a device with a longer oscillation period can be realized with a smaller occupied area.

[Brief explanation of the drawing]

Figure 1 is an electrical diagram showing a conventional voltage-controlled vibrator, Figure 2 is a diagram showing waveforms of each part in Figure 1, and Figure 3 is an electrical diagram showing an example of a voltage-controlled vibrator according to the present invention. Wiring diagram, 4th
It is a figure which shows the waveform of each part of Zusha figure 3. 6: Integrator, 7: Switched capacitor circuit, 8: Voltage comparator, 9: D type flip 70 tube, T1: Control voltage input terminal, T.: Oscillation output terminal, Tr: Reference voltage terminal. Patent Applicant NEC Corporation Agent Takuo Kusano 2 Figure 3 Figure 4

Claims (1)

[Claims] (1) The non-inverting input side of the operational amplifier is grounded, and a first capacitive element is connected between the output side and the inverting input side, and the pressure integrator and the terminal to which the reference voltage is applied are connected to the inverting input side of the operational amplifier. A switched capacitor circuit consisting of a first switching element which is switched in synchronization with the switch and a second capacitor whose one end is grounded and whose other end is connected to the common point of the first switch, and an input terminal. a voltage comparator to which the control voltage of and the output of the -divider are supplied; a D-type 7 flip-flop whose data input is the output of the voltage comparator; and a D-type 7 flip-flop whose clock input is the clock; and an output of the D-type flip-flop. and a second switch element that shorts both ends of the 1gl capacitive element.