JPS58151653A - 逐次命令群処理方式 - Google Patents

逐次命令群処理方式

Info

Publication number
JPS58151653A
JPS58151653A JP3335582A JP3335582A JPS58151653A JP S58151653 A JPS58151653 A JP S58151653A JP 3335582 A JP3335582 A JP 3335582A JP 3335582 A JP3335582 A JP 3335582A JP S58151653 A JPS58151653 A JP S58151653A
Authority
JP
Japan
Prior art keywords
instruction
instructions
processing
wait
post
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3335582A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0152779B2 (enExample
Inventor
Hideo Wada
和田　英穂
Hideo Takashima
高嶋　秀夫
Toshihiro Hirabayashi
平林　俊弘
Fumio Isobe
磯辺　文雄
Koichiro Hotta
耕一郎 堀田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3335582A priority Critical patent/JPS58151653A/ja
Publication of JPS58151653A publication Critical patent/JPS58151653A/ja
Publication of JPH0152779B2 publication Critical patent/JPH0152779B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
  • Devices For Executing Special Programs (AREA)
JP3335582A 1982-03-03 1982-03-03 逐次命令群処理方式 Granted JPS58151653A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3335582A JPS58151653A (ja) 1982-03-03 1982-03-03 逐次命令群処理方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3335582A JPS58151653A (ja) 1982-03-03 1982-03-03 逐次命令群処理方式

Publications (2)

Publication Number Publication Date
JPS58151653A true JPS58151653A (ja) 1983-09-08
JPH0152779B2 JPH0152779B2 (enExample) 1989-11-10

Family

ID=12384268

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3335582A Granted JPS58151653A (ja) 1982-03-03 1982-03-03 逐次命令群処理方式

Country Status (1)

Country Link
JP (1) JPS58151653A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61100862A (ja) * 1984-10-12 1986-05-19 Fujitsu Ltd 命令の逐次化方式

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61100862A (ja) * 1984-10-12 1986-05-19 Fujitsu Ltd 命令の逐次化方式

Also Published As

Publication number Publication date
JPH0152779B2 (enExample) 1989-11-10

Similar Documents

Publication Publication Date Title
JP3311462B2 (ja) コンパイル処理装置
US4251861A (en) Cellular network of processors
Aiken et al. Perfect pipelining: A new loop parallelization technique
US5303357A (en) Loop optimization system
Gurd et al. The Manchester prototype dataflow computer
Ramamoorthy et al. A survey of techniques for recognizing parallel processable streams in computer programs
US5088034A (en) Compiling method for determining programs to be executed parallelly by respective processors in a parallel computer which transfer data with a data identifier to other processors
US5761514A (en) Register allocation method and apparatus for truncating runaway lifetimes of program variables in a computer system
EP0454985B1 (en) Scalable compound instruction set machine architecture
EP0454984B1 (en) General purpose compounding technique for instruction-level processors
US5386562A (en) Circular scheduling method and apparatus for executing computer programs by moving independent instructions out of a loop
US5339429A (en) Parallel processing system and compiling method used therefor
Granston et al. Detecting redundant accesses to array data
Chang et al. The importance of prepass code scheduling for superscalar and superpipelined processors
JPH05143332A (ja) 命令スケジユーラを備えたコンピユータ・システム及び入力命令シーケンスを再スケジユールする方法
JPH04330527A (ja) プログラムの最適化方法及びコンパイラ・システム
Nicolau Loop quantization: A generalized loop unwinding technique
US20020112148A1 (en) System and method for executing predicated code out of order
JPS58151653A (ja) 逐次命令群処理方式
Dhamdhere et al. Characterization of program loops in code optimization
Bowen Implementation of Data Structures on a Data Flow Computer
JPS58149567A (ja) ベクトル・レングス制御範囲融合処理方式
Chang Compiler support for multiple-instruction-issue architectures
JPS59165147A (ja) コンパイラにおける条件文のベクトル命令化方式
JP2629474B2 (ja) 並列パイプライン命令処理装置の命令実行処理方式