JPS5814680A - Solid state image pickup element - Google Patents

Solid state image pickup element

Info

Publication number
JPS5814680A
JPS5814680A JP56112155A JP11215581A JPS5814680A JP S5814680 A JPS5814680 A JP S5814680A JP 56112155 A JP56112155 A JP 56112155A JP 11215581 A JP11215581 A JP 11215581A JP S5814680 A JPS5814680 A JP S5814680A
Authority
JP
Japan
Prior art keywords
vertical
shift register
register
image pickup
state image
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56112155A
Other languages
Japanese (ja)
Inventor
Yoshinori Niwada
庭田 義則
Toshiki Suzuki
鈴木 敏樹
Michio Yamamura
道男 山村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56112155A priority Critical patent/JPS5814680A/en
Publication of JPS5814680A publication Critical patent/JPS5814680A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60Noise processing, e.g. detecting, correcting, reducing or removing noise
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PURPOSE:To avoid the generation of linear flaws on an image pickup screen, by connecting a spare vertical shift register having a function to deliver the signals to the same line of a vertical gate line with the same timing to the other end of the vertical gate line of each picture element. CONSTITUTION:A vertical shift register 10' is connected to the other end of each of vertical gate lines 6a, 6b and 6c which are connected to a vertical shift register 10. The register 10' has an exactly equal function to the register 10 and is driven with the same timing. In such constitution, the left and right registers 10 and 10' are driven simultaneously and with the same timing when a solid state image pickup element 1 works. Thus the pulses are applied simultaneously and with the same timing to the lines 6a, 6b and 6c from both registers 10 and 10'. Accordingly if the line 6b has a disconnection, all signals at and after a picture element 4' connected to the gate line 6b' can be read owing to the pulse applied from the register 10'. Thus no linear flaw is observed on the image pickup screen.

Description

【発明の詳細な説明】 本発明は固体撮像素子、%に撮像画面上に映し出される
1傷の発生を防止した固体撮像素子に関するものである
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state image sensing device, which prevents the occurrence of one scratch on an image sensing screen.

第1図は従来よ〕提案されているMO8形固体撮倫素子
の一例を説明するための要部拡大回路構成図でらる。同
図において、固体撮像素子IFi、光を電気信号に変換
するホトダイオード2と、とのホトダイオード2の信号
電荷を移動させる垂直スイッチM(Xi ) jレジス
タ3とによって構成される画素4が行および列方向に各
々多数個配列され、そして、これらの各画素4は喬厘信
号1jlK”*5ba5@および垂直ゲートIj8m、
6に+、lIgKII続され、垂直信号l[5m、5に
、5at!信号電荷読み出し用水平スイッチMO8)ラ
ンジスタTを介して水平信号銀8に信号電荷に対応する
出力を読み出すパルスを順次発生させる水平シフ)L/
ジスタHC接Rされ、−万、垂直ゲート線11m58b
、le#i、各フォトダイオード2から信号電荷を読み
出す各垂直スイッチMO8) ?レジスタ3にパルスを
順次発生させる[II[シフトレジスタ10KII続さ
れて構成されている。
FIG. 1 is an enlarged circuit diagram of the main parts for explaining an example of the conventionally proposed MO8 type solid-state sensor. In the figure, a pixel 4 constituted by a solid-state image sensor IFi, a photodiode 2 that converts light into an electrical signal, and a vertical switch M(Xi)j register 3 that transfers the signal charge of the photodiode 2 is arranged in rows and columns. A large number of pixels 4 are arranged in each direction, and each of these pixels 4 receives a signal 1jlK"*5ba5@ and a vertical gate Ij8m,
6 +, lIgKII, and the vertical signal l[5m, 5, 5at! Horizontal switch for reading out signal charges MO8) Horizontal shift) L/ which sequentially generates pulses to read out outputs corresponding to signal charges in horizontal signal silver 8 via transistor T
Register HC connected R, -10,000, vertical gate line 11m58b
, le#i, each vertical switch MO8) that reads signal charges from each photodiode 2)? Pulses are sequentially generated in the register 3.

このように構成された固体撮像素子は、水平シフトレジ
スターおよび垂直シフトレジスタto#Cよって順次選
択された画素tKビデオバイアス11から負荷抵抗12
.水平スイッチMo1l )ランジスタTO水平信号[
8を通して充電電流が流れ、負荷抵抗12による電圧降
下分を元信号として検出し、コンデンサ13を介してプ
リアンプ14で増幅され、出力端子15から信号電流が
出力される。
The solid-state image sensor configured in this manner has pixels tK sequentially selected by the horizontal shift register and the vertical shift register to#C from the video bias 11 to the load resistor 12.
.. Horizontal switch Mo1l) Transistor TO horizontal signal [
A charging current flows through the capacitor 8, and a voltage drop caused by the load resistor 12 is detected as an original signal, which is amplified by a preamplifier 14 via a capacitor 13, and a signal current is output from an output terminal 15.

しかしながら、上記構成(よる固体撮像素子は、図示し
ない基黴上忙上述した#J禦4.水平スイッチMO1l
 l−ランジスタフ、水平シフトレジスタ8゜垂直シフ
トレジスタ10岬のトランジスタおよびその信号用配S
が数十五個11f集積して形成されるため、これらのプ
ロセス加工上、このプロセスに起因する欠陥を皆無とす
ることは技術的に極めて困難であった。そして、これら
の欠陥のうち特に信号用配線の断線発生率が最も多く、
例えば、同図で示したように*aゲート#6bの一部に
断線箇所(A部)が発生すると、断線箇所(A部)の右
側の垂直ゲート線@b’には[l[シフトレジスタ10
のパルスが印加されず、したがって断線した垂直グー口
線s blK接続され雀画票7から右側方向の行からは
信号電流が得られず、したがって第2図に要部平面図で
示したように撮像画面16上の右側横方向に線傷ITと
して観測され、画偉品質を低下させることになり、固体
撮像素子の歩留り低下の原因の一つとなっていた。
However, the solid-state imaging device according to the above configuration (not shown) is
l-rangestaff, horizontal shift register 8° vertical shift register 10 cape transistor and its signal distribution S
Since several tens of 11f are integrated and formed, it is technically extremely difficult to completely eliminate defects caused by this process. Among these defects, the occurrence rate of disconnection in signal wiring is the highest,
For example, as shown in the same figure, if a disconnection point (A section) occurs in a part of *a gate #6b, the vertical gate line @b' on the right side of the disconnection point (A section) will have [l[shift register 10
No pulse is applied, and therefore no signal current can be obtained from the row to the right of the disconnected vertical goose wire sblK connected to the sparrow chart 7. Therefore, as shown in the plan view of the main part in FIG. It is observed as a line scratch IT in the right lateral direction on the imaging screen 16, which deteriorates the image quality and is one of the causes of a decrease in the yield of solid-state imaging devices.

し九がって本発明は、同一機能を有するシフトレジスタ
を同一信号線に並列接続して設けることによって、信号
線の不良欠陥を救済し、固体撮像素子の歩留りを向上さ
せた固体撮像素子を提供することを目的としている。
Therefore, the present invention provides a solid-state image sensor that improves the yield of solid-state image sensors by relieving defective signal lines by providing shift registers having the same function connected in parallel to the same signal line. is intended to provide.

以下図面を用いて本発明の実施例を詳細に説明する。Embodiments of the present invention will be described in detail below with reference to the drawings.

第3図は本発明による固体撮像素子の一例を示す第1図
に相当する要部拡大回路構成図であり、前述の図と同記
号は同一要素となるのでその説明は省略する。第3図に
おいて、垂直シフトレジスタIOK各々接続された垂直
ゲー)糾8a、ltb。
FIG. 3 is an enlarged circuit configuration diagram of a main part corresponding to FIG. 1 showing an example of a solid-state image pickup device according to the present invention. Since the same symbols as those in the previous figure represent the same elements, a description thereof will be omitted. In FIG. 3, vertical shift registers IOK (vertical gates) 8a and ltb are respectively connected.

6@の他端側I/cは、垂直シフトレジスタ10と全く
同一機能を有しかつ同一タイミングで駆動する垂直シフ
トレジスタ10′が接続されて設けられている。
A vertical shift register 10' having exactly the same function as the vertical shift register 10 and driven at the same timing is connected to the other end side I/c of 6@.

このような構成忙よれば、固体撮像素子1の動作時に左
右のfl[シフトレジスタ1o 、 t rft同時に
かつ相互に同一タイミングで駆動させることによって、
垂直ゲートa 6 ’ * 6 b * 6 b t 
6 @K ハj’i匈の垂直シフトレジスタtO*10
’から同時にかつ同一タイミングのパルスが印加される
仁とになる。したがって、垂直ゲートIii!!6bに
断線箇所(ム部)が発生した場合、従来では、断線箇所
(A部)から右側の画素4′以後の信号を読み出すこと
が不可能であったが、右側の垂直シフトレジスタ10’
からパルスが印加されるので、垂直ゲート線8b /忙
接続されている画素4′以後の信号が全て読み出すこと
が可能となり、第2図に示した撮像画面16には線傷1
Tが観測されなくなジ、線傷170.J全くない画儂が
得られることになる。
According to such a configuration, when the solid-state image sensor 1 is operated, by driving the left and right shift registers 1o and trft simultaneously and at the same timing,
Vertical gate a 6' * 6 b * 6 b t
6 @K Vertical shift register tO*10
From ' to ', pulses are applied at the same time and at the same timing. Therefore, the vertical gate Iiii! ! When a disconnection point (part A) occurs in 6b, in the past, it was impossible to read out the signal from the right pixel 4' from the disconnection point (part A).
Since a pulse is applied from the vertical gate line 8b/pixel 4' connected to the vertical gate line 8b, it is possible to read all the signals after the connected pixel 4', and there is no line scratch 1 on the imaging screen 16 shown in FIG.
T is no longer observed, line scratches 170. JYou will be able to obtain a painting that does not exist at all.

なお、上記実施例忙おいては、[I亘シフ)l/レジス
タ0に接続されたfi[ゲート@ 6 a t 6 b
 、6 eの他端側に、同一機能を有しかつ同一タイミ
ングで駆動する他の垂直シフトレジスタ10を設けた場
合について説明したが、本発1j11はこれに限定され
るものではなく、垂直信号95 m 、 5 b * 
5 Cの他端側に、水平シフトレジスタ9と同一機能を
有しかつ同一タイミングで駆動する他の水平シフトレジ
スタを水平スイッチMO8トランジスタを介して生に対
して縦方向の一線傷を防止することができ、前述と同様
の効果が得られる。
In addition, in the above embodiment, [I Wataru Schiff) l/fi [gate @ 6 a t 6 b] connected to register 0
, 6 e has been described with respect to the case where another vertical shift register 10 having the same function and driving at the same timing is provided, but the present invention 1j11 is not limited to this; 95 m, 5 b*
5 At the other end of C, another horizontal shift register that has the same function as the horizontal shift register 9 and is driven at the same timing is connected via a horizontal switch MO8 transistor to prevent line damage in the vertical direction. , and the same effect as above can be obtained.

以上説明したように本発明によれば、撮(#iii面上
に線傷の発生の全くない高品質、高信頼性の固体撮像素
子が生産性良く得られるという極めて優れた効果を有す
る。
As explained above, according to the present invention, a high quality and highly reliable solid-state imaging device without any line scratches on the imaging (#iii) surface can be obtained with high productivity, which is an extremely excellent effect.

【図面の簡単な説明】 第1図は従来の固体撮像素子の一例を示す要部拡大回路
構成図、第2図は撮像画面上に観測される線傷の一例を
示す画會画面乎rM図、第3図は本発明による固体撮像
素子の一例を示すl!部拡大回路構成図である。 1・・・一固体撮像素子、2・・・・ホトダイオ−)”
、3@・−・垂直スイッチMOB トランジスタ、  
4 、4’@ 11 @ 11画素、5 a、5b、5
t1 m * * m垂置信号綴、sa*5btsb’
、se・・・・垂直ゲー)線、r・・116水平スイッ
チMO8) jレジスタ、8・・・・水平信号線、9・
・・・水平シフトレジスタ、10.10’・・・・垂直
シフトレジスタ、11@・・・ビデオバイアス、12・
・1111負荷抵抗、13・・・・コンデンサ、14・
・・・プリアンプ、15・・・・出方端子。
[Brief Description of the Drawings] Fig. 1 is an enlarged circuit diagram of main parts showing an example of a conventional solid-state image sensor, and Fig. 2 is a picture screen diagram showing an example of line scratches observed on an imaging screen. , FIG. 3 shows an example of a solid-state image sensor according to the present invention. FIG. 2 is an enlarged partial circuit configuration diagram. 1... one solid-state image sensor, 2... photodiode)"
, 3@--vertical switch MOB transistor,
4, 4'@11 @11 pixels, 5 a, 5b, 5
t1 m * * m vertical signal spelling, sa*5btsb'
, se...Vertical game) line, r...116 horizontal switch MO8) j register, 8...Horizontal signal line, 9...
...Horizontal shift register, 10.10'...Vertical shift register, 11@...Video bias, 12.
・1111 load resistance, 13...capacitor, 14.
...Preamplifier, 15...output terminal.

Claims (1)

【特許請求の範囲】[Claims] 光信号を蓄積するホトダイオードと前記ホトダイオード
の信号電荷を移動さぜる―直XイアfMOB )ランジ
スタとで構成された多数の画素を行および列方向に配列
し、前記各画素の11mゲート線の一端に垂直シフトレ
ジスタに接続して前記画素の行方向を選択させる固体撮
像素子において、前記垂直ゲート龜0他端に1前記ゲー
ト線の同一行に同一タイミングで信号を出力する機能を
備えた予備の垂直シフトレジスタをII続したとと鵞特
黴とする固体撮像素子。
A large number of pixels are arranged in the row and column directions, each consisting of a photodiode that accumulates an optical signal and a transistor that moves the signal charge of the photodiode, and one end of the 11m gate line of each pixel is In a solid-state imaging device that is connected to a vertical shift register to select the row direction of the pixels, there is a standby standby having a function of outputting a signal at the same timing to the same row of the gate line at the other end of the vertical gate. A solid-state image sensor that is a series of vertical shift registers.
JP56112155A 1981-07-20 1981-07-20 Solid state image pickup element Pending JPS5814680A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56112155A JPS5814680A (en) 1981-07-20 1981-07-20 Solid state image pickup element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56112155A JPS5814680A (en) 1981-07-20 1981-07-20 Solid state image pickup element

Publications (1)

Publication Number Publication Date
JPS5814680A true JPS5814680A (en) 1983-01-27

Family

ID=14579603

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56112155A Pending JPS5814680A (en) 1981-07-20 1981-07-20 Solid state image pickup element

Country Status (1)

Country Link
JP (1) JPS5814680A (en)

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