JPS58146166A - Signal tone detecting circuit - Google Patents

Abstract

PURPOSE:To simplify the device constitution, by detecting a digitized test signal tone with digital processing directly. CONSTITUTION:A signal tone transmitted from an analog exchange 2 generated at a test signal generating circuit 1 is converted into a digital signal at an analog-to-digital conversion circuit in a trunk 3. This signal is received at a digital signal reception circuit 51 in a signal tone detection circuit 5, and only the amplitude data is applied to an operation circuit 53. In the circuit 53, the amplitude data is compared or added with a preset comparison reference value or sum in a reference value designation circuit 52. The output pulse thus obtained is counted at a count circuit 54, the continuity of the output of a count circuit 54 at a prescribed time synchronized with a reset pulse 56 is discriminated at a continuity discrimination circuit 55, and the presence/absence of signal tone is discriminated.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a signal tone detection circuit, and more particularly to a signal tone detection circuit that determines and detects a digitalized signal tone.

(2) Background of the technology Generally, in order to test exchange functions, trunk line status, etc. between opposing stations via a trunk line, signal tones are sent and received between test calling and receiving equipment connected at both ends. will be held. In this case, if either of the opposing stations is a digital exchange, the test signal tone is converted from analog to digital at an intermediate point between the two stations. When a digital exchange receives a signal converted from analog to digital in this way, if the signal that has been converted from analog to digital is converted back to analog in the test equipment, the test signal tone will be converted into an analog signal. It is clear that it can be processed in the same way as in the opposing analog switch side test equipment or by conventional analog technology, thereby achieving the purpose of the test scissors. However, conducting tests using analog circuits in digital exchanges is not desirable in view of problems with the parts used and maintenance problems.

(3) Purpose of the Invention The purpose of the present invention is to directly transmit digitized test signal tones in a test equipment between an analog exchange and a digital exchange, which are connected via analog-to-digital conversion in the middle of a trunk line. An object of the present invention is to provide a signal sound detection circuit capable of detecting a signal sound through digital processing.

(4) Structure of the Invention In the present invention, a means for receiving a digital signal obtained by sampling an analog signal at a constant period or a substantially constant period, and converting the digital signal into a digital signal, a means for converting into a specific code format according to the format of the digital code, Means for specifying a reference value that defines the detection level, means for calculating the digitized received signal and the reference value, means for counting the calculation results at regular intervals, and determining whether the received signal is continuous from the counting results.
A signal quality detection circuit is provided, which includes means for determining, thereby determining and detecting a digitized signal tone.

(5) Embodiment of the Invention A signal tone detection circuit as an embodiment of the present invention will be explained below with reference to FIGS. 1, 2, and 3. FIG. 1 shows a digital exchange opposite to an analog exchange, in which the signal tone detection circuit described above is used. FIG. 2 shows the configuration of the signal tone detection circuit of FIG. 1. FIG. 3 shows signal waveforms for explaining the operation of the circuit shown in FIG. #g2.

In FIG. 1, an analog type exchange &2 to which an analog type test signal generation circuit 1 is connected faces a digital type exchange 4 via a trunk line 6 having a trunk 3 in the middle. A signal tone detection circuit 5 according to the present invention is connected to the digital exchange 4.

The signal tone generated by the test signal generation circuit 1 and sent from the analog exchange 2 is converted into a digital signal in an analog-to-digital conversion circuit (CODEC) in the trunk 3 according to the signal size (voltage value). be done. This digital signal (PCM) is, for example, CCITT.
It is represented by an 8-bit code as specified in the recommendation. In this PCM signal, gx out of 8 bits
The bit (bl) is a sign bit indicating positive or negative, and the remaining 7 bits represent amplitude. Also, assume that the maximum value of the conversion amplitude range is represented by all bits (1), and the minimum value, that is, zero, is represented by all bits 101. That is, blbt bs B4 bs be by
b・i small(i(0) 0/i 0 0 0
0 0 0 0 maximum value 0/i 1
1 1 1 1 1 1 The signal tone detection circuit 5 includes a digital signal receiving circuit 51 as shown in FIG.
．． Reference value designation circuit 52, arithmetic circuit 53. It is composed of a counting circuit 54 and a continuity determining circuit 55. The digital signal receiving circuit 51 receives the PCM8 signal and supplies only the amplitude data to the arithmetic circuit 53. In the arithmetic circuit 53, this amplitude value data is compared with or added to a comparison reference value or an addition value set in advance in the reference value designation circuit 52.

FIG. 3(a) shows the situation until the analogue test signal is compared with the reference value. In other words, Fig. 3 (
The analog signal shown in (1) of a) is sampled by the sampling slit at a constant period shown in (2) in trunk 3, and each sampling value shown in (3) is as shown in (4). The signal is converted into a PCM signal and received by the digital signal receiving circuit 51.

The absolute value of the amplitude of each sample value received by the receiving circuit 51 is compared with the reference value LR as shown in (5), and only when it exceeds the reference value, the output pulse is calculated as shown in (6). The signal is supplied from the circuit 53 to the counting circuit 54 .

As a determination method in the arithmetic circuit 53, when the PCM signal corresponding to the detection level to be set is B1,
Complement of B1 B2 (Bl +B2= 1000000
0) is set in the reference value designation circuit 52, and the judgment is made based on the presence or absence of a carry to the first bit b when the input signal and B2 are added, or B1 is directly set in the reference value designation circuit 52. A method such as setting the input signal and comparing the magnitude with the input signal can be used.

The output pulses obtained as described above are counted from the arithmetic circuit 53 in the counting circuit 54. The counting situation in the counting circuit 54 is shown in FIG. 3(6). Figure 3(b)
The output pulses of the arithmetic circuit 53 as shown in (1) are counted as shown in (λ), and when the counted value reaches a predetermined value path, the output as shown in (3) is generated. The signal is supplied from the counting circuit 54 to the continuity determining circuit 55. A reset pulse 56 is inputted to the counting circuit 54 at fixed time intervals, thereby resetting the counted value. Therefore, if the counted value does not reach a fixed number of passes within a fixed time, the counting circuit 54 is reset. No output is generated from circuit 54.

The continuity determination circuit 55 determines the continuity of the output of the counting circuit 54 at fixed time intervals synchronized with the beam seratono (ruus 56), and thereby determines the presence or absence of a signal sound. 54 is provided with two sets of counters, one counter counts the case where there is an output from the counting circuit 54, and the other counter counts the case where there is no output from the counting circuit 54. (C) shows the counting situation when there is an output. Also, Figure 3 (d)
) shows the counting status when there is no output. Figure 3 (c
), if a signal of a certain level or higher continues during each period of the reset pulse (1), nt x t (t is the period of the reset pulse), a signal tone arrives at the color. It is determined that there is, and the output is generated.

After that, as shown in FIG. 3(d), the output (λ) of the counting circuit 54 corresponding to the reset pulse +1 stops.
When the no-output count value (3) reaches a predetermined value, that is, when the no-signal state continues for yi and xt, it is assumed that the signal tone has disappeared, and a signal (2) is output. In this way, it is determined that the signal tone has arrived during the period from the output display ■ in FIG. 3(C) to the output display ■ in FIG. 3(d). Note that these counters can also be realized by combining each with means for generating a pulse of a fixed time.

As described above, the signal tone detection circuit shown in FIG. 2 can detect a continuous signal by identifying multiple timings.

(6) Effects of the Invention According to the present invention, in a digital exchange facing an analog exchange, a signal tone detection circuit can be provided that can detect a test signal from the analog exchange by directly manipulating the digitized signal. .

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a switching center system to which a signal tone detection circuit according to the present invention is applied; FIG. 2 is a circuit diagram of a signal tone detection circuit as an embodiment of the present invention; FIG. 3(a) , (b), (c), and (d) are diagrams showing signal waveforms for explaining the operation of the circuit of FIG. 2. (Explanation of symbols) 1: Signal tone generation circuit, 2: Analog exchange, 3: Tonk, 4: Digital exchange, 5: Signal tone detection circuit, 6: Trunk line, 51: Digital signal reception circuit, 52: Standard Value designation circuit, 53: Arithmetic circuit, 54: Counting circuit, 55: Continuity judgment circuit, 56: Reset pulse. 6) -m-” Figure 3 (b) Figure 3) ■ Figure 3 (d)

Claims (1)

[Claims] A means for receiving a digital signal obtained by sampling an analog signal at a constant or almost constant cycle, a means for converting into a specific code format according to the digital code format, and a means for specifying a reference value that defines a detection level. , means for calculating the digitized received signal and a reference value, means for counting the calculation results at fixed time intervals, and means for determining the continuity of the received signal from the counting results. A signal sound detection circuit configured to judge and detect a converted signal sound.