JPS58146163A - Modulator - Google Patents

Modulator

Info

Publication number
JPS58146163A
JPS58146163A JP57028328A JP2832882A JPS58146163A JP S58146163 A JPS58146163 A JP S58146163A JP 57028328 A JP57028328 A JP 57028328A JP 2832882 A JP2832882 A JP 2832882A JP S58146163 A JPS58146163 A JP S58146163A
Authority
JP
Japan
Prior art keywords
amplifier
modulator
output
input terminal
reference voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57028328A
Other languages
Japanese (ja)
Inventor
Masato Hasegawa
正人 長谷川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57028328A priority Critical patent/JPS58146163A/en
Publication of JPS58146163A publication Critical patent/JPS58146163A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/18Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/20Modulator circuits; Transmitter circuits
    • H04L27/2032Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner
    • H04L27/2035Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner using a single or unspecified number of carriers

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To reduce the amplitude error of a modulator with a simple constitution, by making the temperature characteristic of a data signal amplifier equal to that of a reference voltage generating circuit, and inputting a data signal through the amplifier and an output of a reference voltage generating circuit to each modulation input terminal of the modulator. CONSTITUTION:A binary data signal inputted to an input terminal 1 is amplified at an amplifier 2, passes through a low pass filter 3 and a buffer circuit 4 and this output is applied to an input terminal 10 of a biphase modulator 8. Further, a reference voltage generating circuit 5 has the same temperature characteristic as that of the amplifier 2, and the output is attenuated at an attenuator 2, passes through a buffer circuit 4' and is applied to an input terminal 9 of the modulator 8. Even if the output of the amplifier 2 and the buffer circuit 4 is fluctuated due to temperature change, since the output of the circuits 5 and 4' is changed equally, a voltage between input terminals 9 and 10 of the modulator is unchanged, and the temperature characteristics of the modulator 8 are improved.

Description

【発明の詳細な説明】 本発明はディジタル多値多相変調方式に用いられる変調
装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a modulation device used in a digital multilevel multiphase modulation system.

現在、多相P8に@:調r用いた搬送波ディジタル伝送
方式はすでに実用化されているが、最近、周波数の有効
利用のため位相面のみならず振幅面においても同時に変
11に−かける、いわゆる多値多相変調方式が検討され
ており、この方式として116QAM(Quadrat
ure AmplitudeModulation) 
 方式が知られている。この16QAM方式では情報量
は増すが、その反面回路に求められる性能は厳しくなり
、16QAM方式【構成する変調装置に対しても厳しい
性能が要求され、とくに温度変動に対する特性は重装で
ある。
At present, a carrier wave digital transmission system using @: harmonic in polyphase P8 has already been put into practical use, but recently, in order to make effective use of frequency, not only the phase plane but also the amplitude plane has been changed at the same time. A multilevel polyphase modulation method is being considered, and 116QAM (Quadrat
ure Amplitude Modulation)
The method is known. This 16QAM system increases the amount of information, but on the other hand, the performance required of the circuit becomes stricter, and the 16QAM system also requires stricter performance from the modulation device that constitutes it, especially its characteristics against temperature fluctuations.

従来、2相変11装置として、第1図のブロック図に示
すものがある。図で、1はテータ偏号の入力端子、2は
増幅器、3は低域ろ波器、4はバッファ回路、7は搬送
波信号入力端子、8は直線形〇−π変調器9,10は変
調器8のデータ入力端子11は変調波出力端子r示す。
Conventionally, as a two-phase change 11 device, there is one shown in the block diagram of FIG. In the figure, 1 is the theta polarization input terminal, 2 is the amplifier, 3 is the low-pass filter, 4 is the buffer circuit, 7 is the carrier signal input terminal, 8 is the linear 〇-π modulator 9 and 10 are the modulation A data input terminal 11 of the device 8 indicates a modulated wave output terminal r.

ここで用いられる直線形0−π変調器8は、第2図の特
性図に示されるように、ドライブレベル対出力レベル特
性として直線Aのような線形特性音もち、ドライブレベ
ル対出力位相特性として曲線Bのように基準レベル■T
t中心にして互に極性の反転した位相反転特性【もつも
のとする。入力端子1に入力された2filFデ一タ信
号は増幅器2で増幅され、その信号が低域ろ波器3で帯
域制限され、バッファ回路4により、第2図に示す如く
、ドライブレベルao r  ”o (この時a01”
0のドライブレベル差?■とする)が変v8i8に加わ
るとすると、変調波出力端子11は出力レベルa1.−
a1 kとる2相変調信号となる。ここで温度変動など
により増幅器2及びバッファ回路4においてDCドリフ
トΔV7生じると、ドライブレベル差Vは、”  (a
2 + ’−32)となる、このとき出力レベルa3+
−33となり出力レベル誤差Δ■′會生 じる。このた
めドライブレベルaQ+−”Oの平均レベル■T【中心
に出力レベル±a、wもつ2相fvI4信号はs ■T
があたかもΔ■だけ動いたようになり、2相変調信号に
振幅誤差【生じる。このDCドリフトΔ■は多値変調に
なるほど影響が大きくなり、例えば16QAMf調装置
では次のようづ影響される。
As shown in the characteristic diagram of FIG. 2, the linear 0-π modulator 8 used here has a linear characteristic sound as shown by straight line A as a drive level vs. output level characteristic, and a linear characteristic sound as a drive level vs. output phase characteristic. Standard level ■T like curve B
It shall have a phase reversal characteristic in which the polarity is mutually reversed with respect to the center t. The 2filF data signal input to the input terminal 1 is amplified by the amplifier 2, the signal is band-limited by the low-pass filter 3, and the buffer circuit 4 converts the signal to a drive level aor'' as shown in FIG. o (at this time a01”
0 drive level difference? ) is added to the variable v8i8, the modulated wave output terminal 11 has an output level a1. −
It becomes a two-phase modulated signal with a1k. If a DC drift ΔV7 occurs in the amplifier 2 and buffer circuit 4 due to temperature fluctuations, the drive level difference V is
2 + '-32), at this time the output level a3+
-33, resulting in an output level error Δ■'. Therefore, the average level of the drive level aQ+-"O is T
appears to have moved by Δ■, and an amplitude error [occurs] in the two-phase modulated signal. The influence of this DC drift Δ■ becomes greater as the modulation becomes more multi-valued. For example, in a 16QAMf modulator, it is influenced in the following way.

第3図は従来の16QAMf調fjltのブロック図で
ある。図中、1.1’ はデータ信号の入力端子、8,
12は直線形〇−π変調器、13はπ/2移相器、14
は合成器?示す。データ信号が、CH1側データ信号入
力端子1とCH2側データ信号入力端子1′ とにそれ
ぞれ供給され、各増幅器2によって増幅され、各低域ろ
波器3により帯域制限され、各バッファ回路4荀通って
直線形0−πfv4器8,12にそれぞれ7]0わる。
FIG. 3 is a block diagram of a conventional 16QAM f-key fjlt. In the figure, 1.1' is a data signal input terminal, 8,
12 is a linear 〇-π modulator, 13 is a π/2 phase shifter, 14
Is it a synthesizer? show. A data signal is supplied to the data signal input terminal 1 on the CH1 side and the data signal input terminal 1' on the CH2 side, amplified by each amplifier 2, band-limited by each low-pass filter 3, and passed through each buffer circuit 4. 7]0 to the linear 0-πfv4 units 8 and 12, respectively.

−万、搬送波入力端子7に入力された搬送波信号は、直
線形0−π変調器8によt)P信号に変調され、また載
移相器13に介した直線形0−πf調器12によすP信
号と直交したQ信号に変調されて合成器14に供給され
、これら各P、Q信号合成語14で直交合成される。
- 10,000, the carrier wave signal input to the carrier wave input terminal 7 is modulated into a P signal by a linear 0-π modulator 8, and is also modulated by a linear 0-πf modulator 12 via an on-board phase shifter 13. The signal is modulated into a Q signal that is orthogonal to the P signal, and is supplied to the combiner 14, and orthogonally combined with the P and Q signal combination word 14.

ここでCHI、CH2の入力データ信号として41に与
え、第2図中の±a及び±bの4値信号rドライブレベ
ルとすると、合成器14の出力信号として、84図(黒
点]のデータ配置図の如き16匝QAM変調信号が得ら
れる。しかし、温度変動などの影響で増幅器2及びバッ
ファ回路4などにおいてDCドリフトΔV7生じると、
第2図のドライブレベル±a(1(レベル差■)がPC
H側でDCドリフトΔVだけずれることにより、ドライ
ブレベルv′となる。すると第4図の黒点から白点にず
れるように、出力レベル±83となり出力レベル誤差Δ
■′を生じ、このため位相誤差Δθ、振幅誤差ΔA2生
じる。たとえば、±31【±100mVとすると、Δθ
=2° lΔA=0、2 dB以内に抑えるためにΔ■
′は±5mV以内に抑えなければならない。また、PC
H,QCHともにドライブレベルがΔ■だけずれると、
最悪約2.5 m V以内に抑圧する必要がある。
Here, if the input data signals of CHI and CH2 are given to 41 and the four-value signal r drive level of ±a and ±b in FIG. 2 is used, then the data arrangement as shown in FIG. A 16-square QAM modulated signal as shown in the figure is obtained.However, if a DC drift ΔV7 occurs in the amplifier 2, buffer circuit 4, etc. due to temperature fluctuations, etc.
The drive level ±a (1 (level difference ■) in Figure 2 is PC
By shifting by the DC drift ΔV on the H side, the drive level becomes v'. Then, as the black point shifts to the white point in Figure 4, the output level becomes ±83 and the output level error Δ
(2), and therefore a phase error Δθ and an amplitude error ΔA2 occur. For example, if ±31 [±100 mV, Δθ
= 2° lΔA = 0, Δ■ to suppress within 2 dB
' must be kept within ±5mV. Also, PC
If the drive level of both H and QCH shifts by Δ■,
In the worst case, it is necessary to suppress the voltage to within about 2.5 mV.

このように多値多相変調方式になるほど、ドライブレベ
ルのDCドリフ)7抑圧しなければならない。これら増
幅器2やバッファ回路4で発生したDCドリフト【抑圧
するのは非常に難しいが、これt克服し温度特性も良好
にした変調装置がある。第5図はこのようなものの2相
変調湊質のブロック図で、図中2′は極性の異る2出カ
ケとり出す差動増幅器?示す。入力端子1に入力した2
値デ一タ信号は、差動増幅器2′により互いに逆相の信
号とに作られる。この時差勧増@W2’はDCドリフト
ΔV7生じさせないように、互いに逆相にしてバランス
させて信号VtW幅している。
As described above, the more the multi-level, multi-phase modulation method is used, the more DC drift in the drive level must be suppressed. Although it is very difficult to suppress the DC drift generated in the amplifier 2 and the buffer circuit 4, there is a modulation device that overcomes this and has good temperature characteristics. Figure 5 is a block diagram of a two-phase modulation system like this, and 2' in the figure is a differential amplifier that takes out two output chips with different polarities. show. 2 input to input terminal 1
The value data signals are made into mutually opposite phase signals by the differential amplifier 2'. This time difference increase @W2' is balanced by having opposite phases to each other so that the signal VtW width is adjusted so as not to cause DC drift ΔV7.

この互いに逆相となったデータ信号は、低域ろ波器3で
帯域制限されバッファ回@4を介してデータ信号入力端
子9,10からfv4器8に供給される。端子7から搬
送波信号が加わると、変調波出力端子11には2相変調
信号が出力される。
These data signals having mutually opposite phases are band-limited by the low-pass filter 3 and supplied to the fv4 unit 8 from the data signal input terminals 9 and 10 via the buffer circuit @4. When a carrier signal is applied from terminal 7, a two-phase modulated signal is output to modulated wave output terminal 11.

この様にバランスさせた入力信号により変−48を駆動
しているため、差動増幅器2及びバッファ回路4で生じ
るDCドリフトは振幅誤差及び位相誤差r生じない。つ
1り、f調器8の一万のデータ信号入力端子9に、ドラ
イブレベルa。が加わった時、逆相の関係から他方のデ
ータ信号入力端子10にドライブレベル−a。が加わっ
ている。
Since the converter 48 is driven by input signals balanced in this manner, DC drift occurring in the differential amplifier 2 and the buffer circuit 4 does not cause an amplitude error or a phase error r. Then, the drive level A is applied to the data signal input terminal 9 of the f adjuster 8. is applied, the drive level -a is applied to the other data signal input terminal 10 due to the reverse phase relationship. has been added.

このためDCドリフトΔ■がそれぞれの入力に印加され
ても、端子9のドライブレベルはa0+Δ■となり、端
子10のドライブレベルは−a。−ΔVとなるので、ド
ライブレベルaO*  a o  の平均レベル7丁は
変動しない。このようにDCオフセットΔ■が発生しド
ライブレベル±aoから±(ao+ΔV)  と変動し
ても振幅誤差を生じないので温度特性が良好な変調装置
會実現できる。
Therefore, even if the DC drift Δ■ is applied to each input, the drive level of the terminal 9 is a0+Δ■, and the drive level of the terminal 10 is -a. -ΔV, so the average level 7 of the drive level aO* ao does not change. In this way, even if the DC offset Δ■ occurs and the drive level varies from ±ao to ±(ao+ΔV), no amplitude error occurs, so a modulation device with good temperature characteristics can be realized.

しかし、このような変v4装置において、低域ろ波器が
2相V調裟置では2個、16QAM変調装置では4個と
、第1図、第3図の場合に比べて2倍の低域ろ波器?必
要とすることにカる。この低域ろ波器は、近年ディジタ
ルマイクロクステムにおける使用周波数帯域の有効利用
の観点から、変調波スペクトラムの収束性を良くするた
めに、急峻な選択特性の厳しいものt必要とし、その構
成もかなり複雑なものになり回W&規模も大きくなって
いる。そのためこの低域ろ波曝會2倍使用することはコ
ストが高くなり回路規模が大きくなる欠点がおる。
However, in such a V4 modulation device, the number of low-pass filters is two in a 2-phase V modulation system and four in a 16QAM modulation system, which is twice as low as in the cases of Figures 1 and 3. Area filter? It depends on what you need. In order to improve the convergence of the modulated wave spectrum, this low-pass filter needs to have a strict selection characteristic in order to improve the convergence of the modulated wave spectrum, in view of the effective use of the frequency band used in digital microsystems in recent years. It has become quite complex, and the number of times and scale has also increased. Therefore, using twice the low-pass filter exposure has the disadvantage of increasing cost and increasing the circuit scale.

本発明の目的は、上記の欠点を除去し、温度特性が良好
で、かつ回路が簡琲で回路規模r小さく実現した変調装
置を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a modulation device that eliminates the above-mentioned drawbacks, has good temperature characteristics, has a simple circuit, and has a small circuit scale.

本発明の変調装置け、二つの入力端子間に供給される電
圧に比例するように所定搬送波の出力レベル會制御しか
つ所定基準電圧ケ中心にその搬送波の位相?互に反転出
力する変調器と、入力データ信号ケ増幅する増幅器と、
この111幅器の出力信号ケ帯域制限して前記変調器の
一方の入力端子に供給する低域P波器と、印I紀増幅器
と同等の温度特性r有し@配本準電圧と実質的に同じ電
圧r出力する基準電圧回路と、この基準電圧回路の出力
電圧に前記低域戸波器と実質的に同じ減衰を与え前記変
調器の他方の入力端子に供給する減衰器とt含み構成さ
れる。
The modulator of the present invention controls the output level of a predetermined carrier wave so that it is proportional to the voltage supplied between two input terminals, and adjusts the phase of the carrier wave around a predetermined reference voltage. A modulator that inverts each other's output, an amplifier that amplifies the input data signal,
The output signal of this 111 width amplifier is band-limited and supplied to one input terminal of the modulator, and the low-frequency P-wave generator has the same temperature characteristics as that of the Indo-I amplifier. A reference voltage circuit that outputs the same voltage R, and an attenuator that gives substantially the same attenuation to the output voltage of the reference voltage circuit as that of the low frequency door filter and supplies it to the other input terminal of the modulator. .

以下図1i1ik用いて本発明の詳細な説明する。The present invention will be described in detail below with reference to FIG.

第6図は本発明の一実施例のブロック図である。FIG. 6 is a block diagram of one embodiment of the present invention.

図中、第1図〜第5図と同一番号は同−構成敷素を示し
、5は増幅′g9!2と等価の温度特性r有する基準電
圧発生回路、6は低域ろ波器3と直流分の減衰量が同じ
減衰器である。入力端子1に入力した2値デ一タ信号が
増幅器2で増幅され、そのデータ信号は低域ろ波器3を
通ってバッファ回@4に加わり、このバッファ回964
の出力が変調器80入力端子10に加わる。−万、増幅
器2と等価な温度特性を有する基準電圧発生回路5で作
られた直流電圧は、減衰器6により減衰されたのち、バ
ッファ回路4を通り変調器8の入力端子9に加、  わ
るこの時、ドライブレベルa0.−a、 (この時ドラ
イブレベル差7Vとする)なる2[信号が端子10に加
わり、端子9にドライブレベルa。。
In the figure, the same numbers as in FIGS. 1 to 5 indicate the same configuration elements, 5 is a reference voltage generation circuit having a temperature characteristic r equivalent to that of the amplification 'g9!2, and 6 is a low-pass filter 3. These attenuators have the same amount of attenuation for the DC component. The binary data signal input to the input terminal 1 is amplified by the amplifier 2, and the data signal passes through the low-pass filter 3 and is applied to the buffer circuit @4.
is applied to the modulator 80 input terminal 10. - 10,000, the DC voltage generated by the reference voltage generation circuit 5, which has temperature characteristics equivalent to that of the amplifier 2, is attenuated by the attenuator 6, and then passes through the buffer circuit 4 and is applied to the input terminal 9 of the modulator 8. At this time, drive level a0. -a, (at this time, the drive level difference is 7V) becomes 2 [signal is applied to terminal 10, and drive level a is applied to terminal 9. .

−aoの平均レベル7丁が加わって、端子7に搬送波信
号が入力すると変vj4器(ミキサー)8が駆動され、
端子11には出力レベルa1.−31 kとる2相変調
信号が得られる。ここで温度変動などによジ増幅器2及
びバッファ回路4により、端子10に加わるドライブレ
ベル”Oe”OがΔ■だけ変動しても、基準電圧発生口
W115、減衰器6及びバッファ回路4により端子9に
加わる電圧V丁もΔVだけ変動するので、2相変調信号
に振幅誤差を生じることがない。この基準電圧発生口%
5としては、増幅器2と同−回路忙用いて出力電圧が■
アとなるようにしたものケ用いることができる。
When the carrier wave signal is input to the terminal 7 with the addition of the 7 average levels of -ao, the VJ 4 converter (mixer) 8 is driven,
The terminal 11 has an output level a1. A two-phase modulated signal with −31 k is obtained. Here, even if the drive level "Oe" applied to the terminal 10 varies by Δ■ due to temperature fluctuations etc., the reference voltage generation port W115, the attenuator 6 and the buffer circuit 4 Since the voltage Vd applied to the output terminal 9 also varies by ΔV, no amplitude error occurs in the two-phase modulation signal. This reference voltage generation port%
5, the same circuit as amplifier 2 is used, and the output voltage is
A can be used.

第7図は本発明’k16QAM&調装置に適用した実施
列のブロック図である。CH1gglデータ信号入力端
子1.CH291]デ一タ信号入力端子1′から供給さ
れたデータ信号は、増@器2で増幅され、低域ろ波器3
及びバッファ回路4勿介して直線形O−π位相位相器調
器12に加えられる。−万、増幅器2と等価な温度特性
rもつ基準電圧発生回路5で作られた直流電圧は減衰器
6で減衰され、バッファ回路4r通V直線形O−π位相
変調器8,12に0口えられる。また、搬送波入力端子
7に人力された搬送波信号は、−万が直線形0−πf調
器8に、他方がπh移相器13r介して直線形0−π変
調器12に供給されてP、Q信号となって合成器14で
直交合成される。
FIG. 7 is a block diagram of an implementation sequence applied to the 'k16QAM & adjustment device of the present invention. CH1ggl data signal input terminal 1. CH291] The data signal supplied from the data signal input terminal 1' is amplified by the amplifier 2, and then passed through the low-pass filter 3.
and a linear O-π phase adjuster 12 via a buffer circuit 4. - 10,000, the DC voltage generated by the reference voltage generation circuit 5, which has a temperature characteristic r equivalent to that of the amplifier 2, is attenuated by the attenuator 6, and is passed through the buffer circuit 4r to the V linear O-π phase modulators 8, 12. available. The carrier wave signal inputted to the carrier wave input terminal 7 is supplied to a linear 0-πf modulator 8 and a linear 0-π modulator 12 via a πh phase shifter 13r. The Q signal is orthogonally combined by the combiner 14.

これら直線形O−π−π器8.12に、第2図の特性t
もつものt用いて、CHl及びCH2の入力データ信号
として±a及び±bの4[信号のドライブレベル【与え
ると、合成器14の出力信号として、第4図のデータ配
置図の如き、16QAM変調信号が得られる。ここで温
度変動などにより、増幅器2やバッファ回路4でDCド
リフトΔV−2生じても、基準電圧発生回路5、減衰器
6及びバッファ回路4によp1同じDCドリフトΔVi
生じさせている。っまジ%   b#  ”ILbの4
皿のドライブレベルが入力し、そのドライブレベルがD
CドリフトΔ■だけ変動しても、基準電圧発生回路5、
減衰器6、バッファ回路4で発生させる。−b、−a、
a、bの4[の平均レベル■TtΔ■だけ動かすことに
よ!’%16QAM変調信号のデータ配置が変動するこ
とはない。
These linear O-π-π devices 8.12 have the characteristic t shown in FIG.
Using the input data signals of CH1 and CH2, the output signal of the synthesizer 14 is 16QAM modulated as shown in the data arrangement diagram of FIG. I get a signal. Here, even if a DC drift ΔV-2 occurs in the amplifier 2 and the buffer circuit 4 due to temperature fluctuations, the reference voltage generation circuit 5, attenuator 6, and buffer circuit 4 will have the same DC drift ΔVi as p1.
is causing it. Really% b# “ILb4
The drive level of the plate is input, and the drive level is D.
Even if the C drift Δ■ changes, the reference voltage generation circuit 5,
It is generated by an attenuator 6 and a buffer circuit 4. -b, -a,
By moving the average level of 4[■TtΔ■ of a and b! '%The data arrangement of the 16QAM modulated signal does not change.

ここではCHI、CH2側に別々の基準電圧発生口@r
設けたが、一つの回路で発生した電圧を変11器8.1
2に共通に加えても同様な効果がある。
Here, there are separate reference voltage generation ports on CHI and CH2 sides @r
However, the voltage generated in one circuit is changed by 11 transformers8.1
A similar effect can be obtained even if it is added in common to 2.

このように本発明による変調装置は、従来の変調装置に
比べて、低域ろ波−が中介ですむため、良好な温i特性
も有しながら回路が簡単で回路規模も小さく構成できる
As described above, the modulation device according to the present invention requires only intermediate low-pass filtering compared to the conventional modulation device, so that the circuit can be configured to be simple and small in scale while also having good temperature i characteristics.

なお、本発明の実施例とに2相変iti装置、16値直
交振幅変調装置について説明したが、他の多値多相変調
装置にも適用できる。
Although the embodiments of the present invention have been described with respect to a two-phase variable iti device and a 16-value quadrature amplitude modulation device, the present invention can also be applied to other multilevel polyphase modulation devices.

【図面の簡単な説明】[Brief explanation of drawings]

@1図は従来の2相変調装置のブロック図、第2図は1
に@形〇−π位相変14器の特性図、第3図は従来の1
6[直交振幅変調装置のブロック図、@4図は16値直
交振@f14波のデータ配置図、第5図は改良された従
来の2相変調装置のブロック図、第6図は本発明の実施
列の2相変調装置のブロック図、第7図は本発明の実施
列の16籠直交振幅変調装置のブロック図である。図に
おいて、1.1′・・・・・・データ信号入力端子、2
・・・・・・増幅器、2′・・・・・・差動増幅器、3
・・・・・・低域ろ波器、4・・・・・・バッファ回路
、5・・・・・・基準電圧発生回路、6・・・・・・減
衰器、7・・・・・・搬送波信号入力端子、8.12・
・・・・・直線形〇−π位相変調器、9.10・・・・
・・変調器のデータ信号入力端子、11・・・・・・変
調波出力端子、13・・・・・・移相器、14・・・・
・・合成器である。 W・11剋 ト′う4フトヘル 狛Z艶 卒ダ図
@Figure 1 is a block diagram of a conventional two-phase modulator, and Figure 2 is 1.
Figure 3 shows the characteristic diagram of @type 〇-π phase shifter 14.
6 [Block diagram of quadrature amplitude modulation device, Figure 4 is a data arrangement diagram of 16-value quadrature amplitude @f14 wave, Figure 5 is a block diagram of an improved conventional two-phase modulation device, and Figure 6 is a diagram of the improved conventional two-phase modulation device. FIG. 7 is a block diagram of a 16-cage quadrature amplitude modulation device of an embodiment according to the present invention. In the figure, 1.1'...data signal input terminal, 2
......Amplifier, 2'...Differential amplifier, 3
...Low-pass filter, 4...Buffer circuit, 5...Reference voltage generation circuit, 6...Attenuator, 7...・Carrier signal input terminal, 8.12・
...Linear type 〇-π phase modulator, 9.10...
...Modulator data signal input terminal, 11...Modulated wave output terminal, 13...Phase shifter, 14...
...It is a synthesizer. W.11 Raid

Claims (1)

【特許請求の範囲】[Claims] 二つの入力端子間に供給される電圧に比例するように所
定搬送波の出力レペルkfl!II御しかつ所定基準電
圧r中心にその搬送波の位相を互に反転出力する変調器
と、入力データ信号?増幅する増幅器と、この増幅器の
出力信号ケ帯域制限して前記fg器の一方の入力端子に
供給する低域ν波器と、前記増幅器と同等の温度特性ケ
有し前記基準電圧と実質的に同じ電圧を出力する基準電
圧回路と、この基準電圧回路の出力電圧に前記低域p波
器と実質的に同じ減衰を与え前記変調器の他方の入力端
子に供給する減衰器とt含む変調装置。
The output level kfl! of a given carrier is proportional to the voltage supplied between the two input terminals. A modulator that outputs a carrier wave whose phase is inverted with respect to a predetermined reference voltage r, and an input data signal ? an amplifier for amplification, a low-frequency ν wave amplifier that limits the band of the output signal of this amplifier and supplies it to one input terminal of the FG unit, and has a temperature characteristic similar to that of the amplifier and is substantially equal to the reference voltage. A modulation device including a reference voltage circuit that outputs the same voltage, and an attenuator that gives substantially the same attenuation to the output voltage of the reference voltage circuit as that of the low-frequency p-wave generator and supplies it to the other input terminal of the modulator. .
JP57028328A 1982-02-24 1982-02-24 Modulator Pending JPS58146163A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57028328A JPS58146163A (en) 1982-02-24 1982-02-24 Modulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57028328A JPS58146163A (en) 1982-02-24 1982-02-24 Modulator

Publications (1)

Publication Number Publication Date
JPS58146163A true JPS58146163A (en) 1983-08-31

Family

ID=12245537

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57028328A Pending JPS58146163A (en) 1982-02-24 1982-02-24 Modulator

Country Status (1)

Country Link
JP (1) JPS58146163A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60109360A (en) * 1983-11-17 1985-06-14 Fujitsu Ltd Modulator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60109360A (en) * 1983-11-17 1985-06-14 Fujitsu Ltd Modulator

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