JPS58139431A - Semiconductor device and manufacture thereof - Google Patents
Semiconductor device and manufacture thereofInfo
- Publication number
- JPS58139431A JPS58139431A JP57022340A JP2234082A JPS58139431A JP S58139431 A JPS58139431 A JP S58139431A JP 57022340 A JP57022340 A JP 57022340A JP 2234082 A JP2234082 A JP 2234082A JP S58139431 A JPS58139431 A JP S58139431A
- Authority
- JP
- Japan
- Prior art keywords
- film
- oxide
- group
- insulating film
- in2o3
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02241—III-V semiconductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02258—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by anodic treatment, e.g. anodic oxidation
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は半導体装置及びその製造方法に関するものであ
り、特にｉ−ｖ族化合物半導体装置の絶縁膜の組成及び
その製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device and a method of manufacturing the same, and particularly to a composition of an insulating film of a group IV compound semiconductor device and a method of manufacturing the same.
化合物半導体の絶縁膜は、半導体装置を外部雰囲気から
保護するだめの表面保護膜、またはＭＩＳ（Ｍｅｔａｌ
−＋Ｉｎｓｕｌａｔｏｒ−８ｅｍｉｃｏｎｄｕｃｔｏｒ
）型トランジスタの絶縁膜として用いられている。絶
縁膜の形成方法としては熱酸化法、プラズマ熱化法。The compound semiconductor insulating film is a surface protective film that protects the semiconductor device from the external atmosphere, or an MIS (Metal
-+Insulator-8emiconductor
)-type transistors. Thermal oxidation method and plasma thermalization method are used to form the insulating film.
陽極酸化法等を用いた化合物半導体を直接酸化する方法
及びＳｉＯ２，５１３Ｎ４．Ａｌ２Ｏ３等をＣｖＤ（Ｃ
ｈｅｍｉｃａｌ Ｖａｐｏｒ Ｄｅｐｏｓｉｔｉｏｎ
）法を用いて化合物半導体上に堆積する方法等が用い
られている。前記ＣＶＤによる堆積法で形成した５ｉｎ
２゜５１３Ｎ４．Ａ１２ｏ３等は基板との熱膨張係数の
差異による亀裂が生じたり、基板と絶縁膜の界面での表
面準位が多い等の問題が生じる。又化合物半導体を直接
酸化する方法も特にＩｎ、Ｐを含む化合物半導体では絶
縁膜の耐湿性が悪く、又ＭＩＳ型トランジスタでは金属
と絶縁膜の付着強度が弱い等の問題がある。A method of directly oxidizing a compound semiconductor using an anodic oxidation method or the like, and a method of directly oxidizing a compound semiconductor using an anodic oxidation method or the like and SiO2,513N4. CvD (C
chemical vapor deposition
) method is used to deposit it on a compound semiconductor. 5 inches formed by the CVD deposition method described above.
2゜513N4. A12o3 and the like have problems such as cracks occurring due to the difference in thermal expansion coefficient with the substrate and a large number of surface states at the interface between the substrate and the insulating film. Further, the method of directly oxidizing a compound semiconductor also has problems such as poor moisture resistance of the insulating film, especially in the case of compound semiconductors containing In and P, and weak adhesion strength between the metal and the insulating film in MIS type transistors.
本発明は上記従来の欠点を解決する半導体装置及びその
製造方法、すなわち化合物半導体装置における新規な絶
縁膜の組成及びその形成方法を提供するものである。本
発明はＩｎ、Ｐを含む璽−■族化合物半導体を酸化して
形成した酸化膜が耐湿性が悪く、金属と酸化膜との付着
強度が弱いのは、燐（ｐ）の酸化物が原因であることを
見出しだことによる。即ち本発明の半導体装置及び七の
製造方法は耐湿性及び金属との付着強度を向上せしめる
ため、基板上に形成する絶縁膜の組成を同絶縁膜の厚み
方向に沿って適切に変化させるものである。The present invention provides a semiconductor device and a method for manufacturing the same that solves the above-mentioned conventional drawbacks, that is, a novel composition of an insulating film in a compound semiconductor device and a method for forming the same. The present invention shows that the oxide film formed by oxidizing a P-group compound semiconductor containing In and P has poor moisture resistance, and the reason why the adhesion strength between the metal and the oxide film is weak is due to the oxide of phosphorus (P). Because it's a headline. That is, in the semiconductor device and manufacturing method of the present invention, the composition of the insulating film formed on the substrate is appropriately changed along the thickness direction of the insulating film in order to improve moisture resistance and adhesion strength with metal. be.
以下本発明の実施例をＩ−Ｖ化合物半導体としてＩｎＰ
を用いた半導体装置を例にあげて説明する。Examples of the present invention will be described below as InP as an IV compound semiconductor.
This will be explained by taking a semiconductor device using this as an example.
第１図は本発明の実施例における半導体装置及びその製
造方法を説明するための、製造工程の断面図である。第
１図（ａ）゛に示すようにＩ−Ｖ族化合（燐酸）とグロ
ピレングリコールの混合液を電解液（ｐＨ＝２）として
用い、陽極酸化法により酸化膜を形成する。すなわち、
ｎ型１ｎＰ１を陽極とし、白金（ｐｔ）板を陰極とし、
４ ｍ Ａ ／ｄ の電流密度で１０００人の第１の陽
極酸化膜２を形成する。FIG. 1 is a cross-sectional view of a manufacturing process for explaining a semiconductor device and its manufacturing method in an embodiment of the present invention. As shown in FIG. 1(a), an oxide film is formed by an anodic oxidation method using a mixed solution of a group IV compound (phosphoric acid) and glopylene glycol as an electrolytic solution (pH=2). That is,
An n-type 1nP1 is used as an anode, a platinum (PT) plate is used as a cathode,
A first anodic oxide film 2 of 1000 people is formed at a current density of 4 mA/d.
次に上記と同様の陽極酸化法で第１図（Ｃ）に示すよう
にｐ Ｈ＝４の電解液で第２の陽極酸化膜３を６００人
の膜厚に形成する。Next, a second anodic oxide film 3 is formed to a thickness of 600 mm using an electrolytic solution of pH=4 as shown in FIG. 1(C) using the same anodic oxidation method as described above.
ここで第１．第２の陽極酸化膜２，３はＩｎ２ｏ３（酸
化インジウム）とＰ２Ｏ６（６酸化燐）の組成比を異な
らしめており、第１の陽極酸化膜２の組成比はＰ２Ｏ６
／Ｉｎ２ｏ３）１とし、第２の陽極酸化膜３の組成比は
ＰＯ／Ｉｎ２Ｏ３〈１としている。Here's the first one. The second anodic oxide films 2 and 3 have different composition ratios of In2o3 (indium oxide) and P2O6 (phosphorus hexaoxide), and the composition ratio of the first anodic oxide film 2 is P2O6.
/In2O3)1, and the composition ratio of the second anodic oxide film 3 is PO/In2O3<1.
６
第２図はＥ Ｓ ＣＡ （Ｅｌｅｃｔｒｏｎ ５ｐｅｃ
ｔｒｏｓｃｏｐｙｆｏｒ Ｃｈｅｍｉｃａｌ Ａｎａｌ
ｙｓｉｓ）法で分析した陽極酸化膜の組成を示している
。同図の分析結果よりわかるように、ｎ型ＩｎＰ１より
なる基板に近い側に形成された第１の陽極酸化膜２の組
成を見るとＩｎ２Ｏ３がＰ２Ｏ６よりＩｌ、″い。また
、基板に遠い側に形成された第２の陽極酸化膜３の組成
を見るとＰ２Ｏ３がＩｎ２Ｏ３より少くなっていること
がわかる。6 Figure 2 shows E S CA (Electron 5pec
Troscopy for Chemical Anal
The composition of the anodic oxide film analyzed by the ysis) method is shown. As can be seen from the analysis results in the same figure, when looking at the composition of the first anodic oxide film 2 formed on the side closer to the substrate made of n-type InP1, In2O3 is higher than P2O6. Looking at the composition of the second anodic oxide film 3 formed in , it can be seen that P2O3 is less than In2O3.
次に第１図（ｄ）に示すようにｎ型ＩｎＰ １よりな
る基板の裏面に金−ゲルマニウム（Ａｕ−Ｇｏ）の合金
を蒸着、熱処理し、オーミック電極４を形成する。さら
に第２の陽極酸化膜３にアルミニウムＣＡＮ’）を蒸着
し、電極６としＭＩＳダイオードを形成する。Next, as shown in FIG. 1(d), a gold-germanium (Au--Go) alloy is deposited on the back surface of the substrate made of n-type InP 1 and heat-treated to form an ohmic electrode 4. Further, aluminum (CAN') is deposited on the second anodic oxide film 3 to form an electrode 6 and a MIS diode.
前記半導体装置（ＭＩＳダイオード）において陽極酸化
膜の絶縁性を見るため電流−電圧特性を測定すると、印
加電圧１０ｖで電流は１０ ”Ａであった。When the current-voltage characteristics of the semiconductor device (MIS diode) were measured to check the insulation properties of the anodic oxide film, the current was 10''A at an applied voltage of 10V.
なお、ここで第１の陽極酸化膜のみ（但しこの陽極酸化
膜の厚みは１０００人）を形成した従来例の場合は印加
電圧１ｏ■で電流は５Ｘ１０ Ａであり、本発明の
前記実施例の場合より電流値は少ない。また、第２の陽
極酸化膜３のみ（陽極酸化膜は１６００Ａの厚み）を形
成した場合では１ｏｖの大きさの電圧は印加できず、印
加電圧１Ｖで電流は１Ｏ−５Ａ となり絶縁膜として
用いられないことにな□る。Here, in the case of the conventional example in which only the first anodic oxide film was formed (however, the thickness of this anodic oxide film was 1,000 people), the applied voltage was 1 o and the current was 5 x 10 A. The current value is smaller than in the case of In addition, when only the second anodic oxide film 3 (the thickness of the anodic oxide film is 1600 A) is formed, a voltage of 1 ov cannot be applied, and the current is 1 O-5 A at an applied voltage of 1 V, which is used as an insulating film. It turns out that there is nothing.
次に、本発明の実施例により形成したＭＩＳダイオード
の寿命試験を行なった。なお、比較のため、ＰＯ／Ｉｎ
２Ｏ３〉１の組成を有する絶縁膜 ６
のみを形成した従来のＭＩＳダイオードも同様に寿命試
験を行なった。ＭＩＳダイオードを高温放置（１２５°
Ｃ）Ｌ、電圧印加（ｅｓ Ｖ ） 寿命試験を行なうと
、本発明の実施例のＰ２Ｏ６／Ｉｎ２Ｏ３〉１の組成を
有する第１の陽極酸化膜とＰ２Ｏ５／Ｉｎ２Ｏ３〈１の
組成を有する第２の陽極酸化膜とからなるＭＩＳダイオ
ードでは５００時間経ても劣化は見られなかったが、Ｐ
２Ｏ６／Ｉｎ２Ｏ３〉１の組成のみを有する従来のＭＩ
Ｓダイオードでは、電流−電圧特性を測定すると高温放
置後電流が増加し、劣化の激しいものは電流値が４〜７
桁位増大した。、さらに従来のＭＩＳダイオードでは陽
極酸化膜上の電極のはぐり等の不良が発生した。Next, a life test was conducted on the MIS diode formed according to the example of the present invention. For comparison, PO/In
A conventional MIS diode formed with only an insulating film 6 having a composition of 2O3>1 was similarly subjected to a life test. MIS diode left at high temperature (125°
C) L, voltage application (es V ) When the life test was carried out, it was found that the first anodic oxide film having the composition of P2O6/In2O3〉1 and the second anodic oxide film having the composition of P2O5/In2O3〈1 of the embodiment of the present invention. Although no deterioration was observed in the MIS diode composed of an anodic oxide film even after 500 hours, P
Conventional MI with only a composition of 2O6/In2O3〉1
When measuring the current-voltage characteristics of S diodes, the current increases after being left at high temperatures, and those with severe deterioration have a current value of 4 to 7.
It increased by an order of magnitude. Further, in the conventional MIS diode, defects such as peeling off of the electrode on the anodic oxide film occurred.
本実施例のＭＩＳダイオードでは不良が発生しなかつた
が、この原因を考えてみるとＰ２Ｏ６／Ｉｎ２Ｏ３＞１
の組成の第１の陽極酸化膜をＰ２Ｏ６／ Ｉ ｎ ２０
３＜ １の組成の第２の陽極酸化膜で被覆しているため
、第２の陽極酸化膜が保護され、温度。No defects occurred in the MIS diode of this example, but considering the cause of this, P2O6/In2O3>1
The first anodic oxide film with the composition of P2O6/I n 20
Since it is coated with the second anodic oxide film having a composition of 3<1, the second anodic oxide film is protected and the temperature decreases.
湿度等の外部雰囲気に対して安定で、かつ金属との密着
が良好に維持されたためであると考えられる。即ち■族
の元素の酸化物を主成分とする第１の陽極酸化膜は絶縁
物として高抵抗であるが、外部雰囲気に敏感で劣化しや
すい欠点がある。一方、璽族元素の酸化物を主成分とす
る第２の陽極酸化膜は抵抗は絶縁物としては低いが、外
部雰囲気に変化しにくく、金属との密着が良い。これら
の長所のみを利用するとＩ−Ｖ族化合物半導体の絶縁膜
として絶縁抵抗が高く劣化の少ないものが得られる。This is thought to be because it is stable against external atmosphere such as humidity and maintains good adhesion to metal. That is, the first anodic oxide film, which is mainly composed of oxides of group (1) elements, has a high resistance as an insulator, but has the disadvantage that it is sensitive to the external atmosphere and easily deteriorates. On the other hand, the second anodic oxide film mainly composed of an oxide of a group element has a low resistance as an insulator, but is not easily changed by the external atmosphere and has good adhesion to metals. If only these advantages are utilized, an insulating film of an IV group compound semiconductor having high insulation resistance and little deterioration can be obtained.
上記を流側では陽極酸化液のｐＨを変えることで絶縁膜
を構成する酸化物の組成比を変えたが、陽極酸化液を変
えることにより第１と第２の陽極酸化膜の組成比を変え
ても良い、又プラズマ酸化法で基板温度あるいはＶ族元
素からなる雰囲気の分圧を変えて絶縁膜の構成比を変え
ることができる。熱酸化法により絶縁膜を形成する場合
でも同様に酸化温度、Ｖ族元素からなる雰囲気の分圧を
変えることにより絶縁膜の構成比を変えられる。On the flow side, the composition ratio of the oxides constituting the insulating film was changed by changing the pH of the anodic oxide solution, but by changing the anodic oxide solution, the composition ratio of the first and second anodic oxide films was changed. Alternatively, the composition ratio of the insulating film can be changed by changing the substrate temperature or the partial pressure of the atmosphere made of group V elements using a plasma oxidation method. Even when an insulating film is formed by a thermal oxidation method, the composition ratio of the insulating film can be changed by changing the oxidation temperature and the partial pressure of the atmosphere made of group V elements.
実施例ではＩ−Ｖ族化合物半導体としてＩｎＰについて
説明したが、Ｉ ｎ １− ！Ｇ ａ ！Ｐ 。In the embodiment, InP was explained as the IV group compound semiconductor, but InP is the I-V compound semiconductor. Ga! P.
Ｉ ｎ １−ｘ Ｇ ａ ｘ Ｐ ｙ Ａ ｓ 、ｘ等
のＩｎ、Ｐを含む化合物半導体にも適用できる。又Ｇａ
Ａｓ、Ｇａｒｂ等の！ｎ、Ｐを含まないＩ−Ｖ族化合物
半導体にも適用できることは勿論である。It can also be applied to compound semiconductors containing In and P, such as I n 1-x G a x P y As, x. Also Ga
As, Garb, etc! Of course, it can also be applied to IV group compound semiconductors that do not contain n or phosphorus.
さらに実施例ではＭＩＳダイオードで説明したが、本発
明はＭＩＳ型ＦＥＴのゲート絶縁膜の形成に適用でき、
又Ａ Ｐ Ｄ （Ａｖａｌａｎｃｈｅ Ｐｈｏｔ。Furthermore, although the embodiments have been explained using MIS diodes, the present invention can be applied to the formation of a gate insulating film of MIS type FET.
Also A P D (Avalanche Photo.
Ｄｉｏｄｅ）等の表面保護膜に適用できる。It can be applied to a surface protective film such as Diode).
以上説明した様に本発明の半導体装置とその製造方法は
■−Ｖ族化合物半導体に用いる絶縁膜として基板に接す
る絶縁膜の組成を■族元素からなる酸化物の構成が■族
元素からなる酸化物より大になるようにし、一方外気に
触れる絶縁膜の組成は■族元素からなる酸化物に大にな
るようにするものであシ、絶縁抵抗が高く、劣化の少な
い■−Ｖ族化合物半導体の絶縁膜が得られ、その工業的
価値は大きい。As explained above, the semiconductor device and the manufacturing method of the present invention are such that the composition of the insulating film in contact with the substrate as the insulating film used in the -V group compound semiconductor is changed from the composition of the oxide consisting of the group II element to the oxide consisting of the group II element. On the other hand, the composition of the insulating film that is exposed to the outside air should be made of oxides consisting of Group III elements, and it should be a Group V compound semiconductor with high insulation resistance and little deterioration. An insulating film can be obtained, and its industrial value is great.
第１図（ａ）〜（ｄ）は本発明の一実施例における半導
体装置およびその製造方法を説明するための製造工程断
面図、第２図は同半導体装置の絶縁膜の組成をＥＳＣＡ
法で分析した結果を示す図である。
１−−−−・・ＩｎＰ （基板）、２・・・・・・１ｎ
２０３／Ｐ２Ｏ６く１の構成比を有する第１の陽極酸化
膜、３・・・・・・Ｉｎ２Ｏ３／Ｐ２ｏ６）１ の構成
比を有する第２の陽極酸化膜、４，６・・・・・・電極
。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第
１ 図1(a) to (d) are manufacturing process cross-sectional views for explaining a semiconductor device and its manufacturing method in one embodiment of the present invention, and FIG. 2 is an ESCA diagram showing the composition of the insulating film of the semiconductor device.
FIG. 3 is a diagram showing the results of analysis using the method. 1----...InP (substrate), 2...1n
A first anodic oxide film having a composition ratio of 203/P2O6)1, 3...A second anodic oxide film having a composition ratio of In2O3/P2O6)1, 4,6... electrode. Name of agent: Patent attorney Toshio Nakao and 1 other person
1 figure
Claims (1)
物と■族元素の酸化物よりなりかつ厚み方向に沿って組
成の異なる絶縁膜が形成され、前記絶縁膜において前記
半導体基板と接する側はＶ族元素の酸化物の含有量が１
族元素の含有量より大きく、反対側はＮ族元素の酸化物
の含有量がＶ族元素の含有量より大きいことを特徴とす
る半導体装置。 （掲 Ｎ族元素がＩｎであり、Ｖ族元素がＰであること
を特徴とする特許請求の範囲第１項記載の半導体装置。 （３）璽−Ｖ族化合物半導体基板上に陽極酸化法により
酸化膜を形成する過程において陽極酸化液のｐＨ値を変
化させることを特徴とする半導体装置の製造方法。[Scope of Claims] (1) An insulating film made of an oxide of an N group element and an oxide of a group I element and having different compositions along the thickness direction is formed on a group IV compound semiconductor substrate, In the insulating film, the content of oxide of group V element on the side in contact with the semiconductor substrate is 1.
A semiconductor device characterized in that the content of an oxide of a group N element is greater than the content of a group V element on the other side. (The semiconductor device according to claim 1, characterized in that the N group element is In and the V group element is P. A method for manufacturing a semiconductor device, characterized in that the pH value of an anodic oxidation solution is changed in the process of forming an oxide film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57022340A JPS58139431A (en) | 1982-02-15 | 1982-02-15 | Semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57022340A JPS58139431A (en) | 1982-02-15 | 1982-02-15 | Semiconductor device and manufacture thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58139431A true JPS58139431A (en) | 1983-08-18 |
| JPS6366416B2 JPS6366416B2 (en) | 1988-12-20 |
Family
ID=12079959
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57022340A Granted JPS58139431A (en) | 1982-02-15 | 1982-02-15 | Semiconductor device and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58139431A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1990015436A1 (en) * | 1989-05-31 | 1990-12-13 | Nippon Mining Co., Ltd | Method of producing compound semiconductor devices |
| RU2756003C1 (en) * | 2020-11-13 | 2021-09-24 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Чеченский государственный университет" | Method for manufacturing a semiconductor apparatus |
-
1982
- 1982-02-15 JP JP57022340A patent/JPS58139431A/en active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1990015436A1 (en) * | 1989-05-31 | 1990-12-13 | Nippon Mining Co., Ltd | Method of producing compound semiconductor devices |
| US5214003A (en) * | 1989-05-31 | 1993-05-25 | Nippon Mining Co., Ltd. | Process for producing a uniform oxide layer on a compound semiconductor substrate |
| RU2756003C1 (en) * | 2020-11-13 | 2021-09-24 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Чеченский государственный университет" | Method for manufacturing a semiconductor apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6366416B2 (en) | 1988-12-20 |
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