JPS58138664A - Driving device for heat-sensitive recording head - Google Patents

Abstract

PURPOSE:To obtain a medium tone of pictures of a high definition with high speeds by a method in which analog picture signals for one line are supplied to an analog shift register and by the memory marks of each digit, current to heating resistor elements corresponding to each bit is controlled. CONSTITUTION:Analog signal inputs to be put for one bit each into the input terminal 8 of analog shift register 5 are shifted to the right according to external lock input to be put in an input terminal 9. By each bit of the shift register 5, or outputs of digit or stage, current control circuits 6-1-6-n to be connected with each other receive the analog voltage of each bit and control current flowing in heating resistor elements 7-1-7-n. Thus, applied energy to each heating resistor element corresponds with analog voltage representing picture element signals and the recording of medium tone of pictures is made possible. Signals for one line are stored in the shift register and applied at a given timing after being stored, so that high-speed recording is made possible.

Description

[Detailed Description of the Invention] In this room, we will discuss the functions of printers, printers, etc., which are used for printing, printing, etc. In particular, the present invention relates to a thermal recording head driving device.

FIG. 11 is an 11-sided view showing the schematic configuration of a general heat-sensitive Ie sickle head device, in which LD is a thermal recording head, 2 is a recording paper, 3 is a platen roll, and 4 is a drive roll.

As is clear from the figure, a general conventional thermal recording head device has nine heating resistors arranged in an array in the direction perpendicular to the paper surface and having a width t at least equal to the width of the thermal paper 2. The apparatus is equipped with an insulating head 1, a thermal paper 2 driven by a drive roll 4 and running over the head 1, and a platen roll 3 for directly imaging the thermal paper 2 onto the head 1.

In such conventional thermal recording type printers, facsimile machines, etc., intermediate recording is usually performed as follows.

In other words, one recording 1!1 (dot) is divided into areas of the number of values, and when recording thinly, record the area with less power, and when recording 1! A friend using the enviable method of recording.

In this method, if you want to play the original (Ii) iC faithfully, you have to increase the area division value of the original (1') cost element.

However, the lower limit of the size of one element of the Kiryoku head is 69, so it cannot be made smaller. Therefore, sufficient jet
If you try to hit the number 9 threshold l11ill period-, you will get one distribution 11. II! The disadvantage is that the surface area becomes large, making it difficult to record records with a high degree of resolution. .

In addition, as another intermediate distribution method, we focused on the fact that there is a certain horizontal straightness in the threshold flexibility of thermal paper when applying the magnetic pressure of Kiryoku StX, and when performing thin distribution, the voltage application time is There is a way to keep it short and also use this when recording the results.

In this method, one record I! Since each element (dot) corresponds to one dot on the head, there is no problem of reduced resolution.

However, the width of the paper is long, and the line lid head is too long.
When performing soul recording, there is a problem in that pulse width variable circuits for the same number of FC lights are required for all the drivers on the head.

For example, if it has the short side of B4 sales paper (2s7■),
In the case of a head having a density of 8 dots)/SS/), the number of dots is a 257 x 8 = 2056. In other words, this number of pulse width modulation paths is required, which is unconventional.

The object of the present invention is to eliminate the defects of the conventional method described above, and to provide a method for driving a thermal recording head of a small tumor at a low cost because it is performed by blocking and dissolving intermediate notes in thermal recording. It's true.

In order to achieve the above object, in the present invention, one line of analog signals is supplied to the analog shift register, and each digit (stage) of the analog shift register marked with # is
The current value supplied to the heating resistor element corresponding to the valley bit is controlled by the memory value of h.
.

211th! It is a general block diagram of the mourning example of the present invention.
shows. In the figure, 5 is an analog shift register, 6
-1, 6-2, ...-6-n are current control circuits, 7
-1°7-2. ...7-n is a heating resistance element, 8
9 is the clock input terminal, 1O is the enable input terminal, 12 is the resistor driver II
The J housing, which is the II tortoise terminal, vr@f is 6 at a potential (for example, ground potential).

- At the time of operation, the analog comment input input one bit at a time from the outside to the analog 7 foot register 50 input control 8 is input according to the external clock power supplied to the clock input terminal 9 while maintaining the analog voltage of 7. Shift to the right one bit at a time.

Note that such an analog shift register is, for example,
1st child technique” (January 1974 issue, 31st to 39th edition)
Denshi IIk1i1” (November 1974 issue, 1131~
It is well known in detail in 114KIIyr<42) and others. The analog shift register of the present invention includes:
Appropriately use VC such as 1" J * @, so - about the analog shift trender itself.
mat4iiμ is omitted.

The electric current fI is connected to the output of the valley bit (digit, 1 good is the stage) of the m-era analog shift register 5 in a 1:1 ratio.
L11IIlliI-Route 6-1, 6-2, ...
6-n receives the analog voltage of each bit of the shift register, and generates the respective heating resistor elements 7-.1, 7.
-2,...7-n, III
It is controlled according to the analog voltage described in I.

Therefore, the heating resistor elements 7-1, 1-2, . . .
. . . 7-nK The supplied current, that is, the applied energy corresponds to the analog 1 voltage applied to the pixel signal, and an image having an average value of p and an intermediate value is recorded.

Note that the external enable signal supplied to the input terminal IO can be applied to the nine bales at a predetermined timing, with the signal for one line of the image being stored in the analog shift register 5. Thereby, 1/1247 peaks can be performed simultaneously.

In addition, the enable input terminal 1G is omitted, and the resistor element section -
It is clear that similar recording timing control is possible even if the device is controlled on and off by an external enable signal.

ms-Hiro, which shows one example of a more specific embodiment of the present invention. In the figure, the same numerals as in Figure 1112 are the same as in Figure 1112. 9-1
, 9-2 are clock input terminals supplied with mutually inconsistent clocks 11°-2, and 11 is a common output terminal.

In @aWJtlc1, the analog shift register 5 is a well-known serial-parallel alternating Qinfeng BBD (Buck@t flr
igad@Device) element. -, in this analog shift register 5, a 1-bit cell (stage) consists of an N-channel M1:)8FET2m(
The 1st bit is Qst and Ql), and capacitor 4-(
The first bit consists of C1l and Cts).

9) Each pit cell is connected to S, and parallel outputs are output from the 8 pixel cells.

Current control-1III&-1, 6-2,...
It is formed on the same silicon chip as the shift register 5, and has nine N-channel M08 FhaT (QIB r
Ql4 +1. , Ql...) to aX bottle.

Before that, as shown in #4, there is a device.

1i108 FETs Qta * Qst, etc. are connected in series to a resistive element power source (not shown) K, together with their corresponding angular thermal resistances 7-1, 7-2, etc.
It is continued.

The heat generating paper #L elements 7-1, 7-4, . . . can be constructed from decimum resistance elements.

For example, if the recording head is 256 mm wide and the recording dot density is 8 dots/square, then 2048 heating resistors are required.

In addition, in experiments conducted by the inventor, Hiro and analog shift register 5
The current control circuits @-1, 1$-2, etc. are formed on the same silicon chip with 64 bits to form nine circuits, and 32 mg* of these circuits are formed. Place Kl on the ceramic substrate of the recording head.

Below is the 41st! Referring to the time chart of I,
The operation of eccentric positioning in the figure will be explained.

The clocks supplied to the clock input terminals 9-1 and 9-2 are two-phase, and are indicated by +2 and ωl in Figure IIK4. 9, 70 laps #L# & is for example 2MH3
It is. an analog signal input stock supplied to input terminal 8;
As shown by waveform (8), it is a continuous voltage waveform (-image signal).

The analog signal a, FjCTQo, is drained Km-, and when the clock signal ρ1 is at a high level, I
The capacitor C
@, WcI #L Rikomi Furureru. And clock signal -1
At the falling edge of the clock signal 111, the value of the analog 11 force range pressure level is stored in the memory. At the falling edge of the clock signal 111 and at 1 m1, the clock signal #2 rises. Tsumugi Kama, FWT4Jo1 off F
IT Qu becomes OFF/ and then L is connected to capacitor COt.
The magnetic pressure contained in #L9 is transferred to the capacitor Ct1 at the next station.

Similarly, the human voltage supplied to the analog signal input terminal 8 is shifted one by one in the shift register 5 in accordance with the cycle of the clock 111.

On the other hand, parallel output - Suna i Juku, k”ETQtat QC
As gate 1 pressure such as s..., clock signal -1
At the first fall of Seki and Sou at the next fall of , the voltage is charged into each corresponding capacitor and the 9-pressure level is output.

Also, is the output range pressure of the above-mentioned FITQ*at Qas... etc. due to the heating resistance element? -1, 7-2,...
・FIT for current control connected in series with Qta l
It is applied as the gate' magnetic pressure to the electric field, etc.

On the other hand, electric currents 6-1, 6-2
,..., etc., each FICT Qta + Qt
The terminal 12 connected to the drain Kii of a is further connected to the resistor drive voltage II (-not shown).1) However, as can be seen from FIG. 4, the resistor drive power supply voltage VH is While the analog input is taken in through the signal input terminal 8 and shifted and stored as shown in FIG.

Therefore, 1? While the Bain signal is being read into the shift register 5, the electric #1III control FIT Qta +
Qa4... and heating resistor elements 7-1, 7
-2. No voltage is applied to IO, i.e., analog signal or not, all heating resistor system elements? -1, 7-2, etc. are not energized. All the analog signals for 1 it input are input to the shift register 6, and by applying the voltage vkI to the terminal 12, 2048
Dot's all the heating resistors? -1・, 7-2.・
... is energized, the distribution for one line is carried out, and after 4 degrees, the magnitude of the heat flowing through each heating resistor system is as follows. The source magnetic pressure of FICT Qta * 1 Jaa +... applied to the gate of - In other words, the signal voltage fC stored in the stage capacitor of shift register 5 m
be done.

Recording is performed in accordance with the number stored in the IILKl/at register 5.

1&! of s3- of the bottle of the present invention! According to an experiment with 1llll & configuration, the overcharging time is 0.8 m 116c, the time for analog manual transfer Kll (i.e. the time required to smoke 1/1217 signal t shift register vc1) 110, 5 s w X 2G4kl = 1. (1
It took 2401 seconds.

So, the recording time of the 1st line roar at this time was 1.
The paper size was 1124 mm, and 1 - was recorded in about 3 seconds per A4 size paper. Of course, if you use your own input device now, the recording time will be even shorter.

In addition, the voltage level of 411 in the me experiment is
The signal fil, f12 is ot or +l! Iv1 Ana o/
Signal input is 0-13V, current control is 1g1jlI"
ETQls + Qta −...f) 'f V 4
V voltage VDD + ljV, FETQl,,Qt
The drain voltage VH of a... was +15V, and the reference potential Vr@f was Ov.

On the other hand, the heating resistor element 4 r=r 47-2',...
The average resistance value of . The electric power supplied to -1, 7-4-... is approximately 0.6W.

Ojo who performed Kikama under the above conditions, record #ji Nao is 0 ~
Continuously changing with a threshold of 1.2 and an 8-dot screen **
Very clear and good midtones can be obtained without losing any color.

In the above example, there is only one analogue signal person car.
jl, all shift registers of J12 chips are cascaded 111
I did 1. That is, 1217 supplied from input terminal 8
After the data for 1 minute is sequentially fetched and stored in the shift register, power is started to be applied to the heating resistor system.

The signal #1 cost K 1.024 ms+act.

However, for example, as shown in diagram Xll5, the shift register 5
The entire clock is divided into 4 clocks 5-1, 5-2, 5-3 and 5-4 (in this case, 1 block is used, resulting in 512 bits), and each block has an analog clock 8-1. ~8-4 can also be provided.

With such a configuration, if signal manpower is performed for four blocks at once, the time required for signal manpower will be 0.256 m.
sw. l Therefore, in this case, signal input time 1 is 0.266
mse, and the distribution time of the l line, which is equal to 0.8 mm and t for the heating resistive element, is approximately 1 mmwK-1.

In addition, in Fuji stmvC, the same reference numerals as Zen 2- represent the same or equivalent parts t. However, in this case, it is of course possible to send data arbitrarily according to the pseudo tree of the block division number t1 of the shift register 5. If the number of block divisions a is increased, more obscuring recording can be achieved on the actual machine.

Furthermore, as a configuration of the integration (b) path, a shift register 5
Each output and the corresponding 11 are connected to the flow control FETQ1
A latch circuit for temporary memory may be provided for each threshold of 4 + (ha...).

That is, in the example KII of all3-, FIT Q1j+ is supplied with the parallel output of the shift register 5.
Q, 1... and current control FIT Q14 *
A latch circuit (
A temporary recording circuit) can be provided.

With this configuration, when the signal input for one line is completed, it is immediately transferred to the latch path, and the next 1247 minutes of signal input can be performed while energizing the heating resistor element. I can do it.

In this way, the signal input to the shift register and the signal output by the resistor element can be executed in parallel, so that the signal input Wcl! 1 line to 0 without wasting time
I can record at 1m5w and sleep.

First, in the previous explanation, we will discuss the direct method using thermal paper.
l A failure in Australia's thermal recording method! The present invention can also be applied to the 4111-sensing Il & Ki-ha method where 4I#ae-can be produced using an influenium coated with thermal II-based ink.

Furthermore, although nine examples have been described using BBD elements as analog shift registers, CCD (Charg Co
Upl@d D@vic・) etc. also have a shift register configuration, so ◆ is not a blind case.

As mentioned above, this book allows for intermediate IJ4 printing on thermal printers, facsimile machines, etc. to be used at t1^resolution and interception.

[Brief explanation of the drawing]

All- shows the schematic structure of a general thermal recording head. The opposite side 2- shows the recording head failure due to misfire.
! A schematic block diagram of one embodiment of the 1111, Figure 3, is 4
A more specific example of the angle -llAl&! 1ji
2) Example-1114 Figure t[L3-'s-path time chart showing the previous work, s5- is a schematic block of the duck embodiment of the present invention. 1...Kenwaki - Henodo, 2...Kirokukei, 5, 5-
1 to 5-4...Analog shift register, 6-1 to 8
-n...Electronic L Warigo-ro, 7-1~? -n...Heating resistance element, 8...Analog signal input terminal, 9...Clock input terminal, 10...Enable input terminal, 12
...Resistance element drive power supply terminal representative attorney Michihito Hiraki, 1 person, 1 figure, 2 figures, 3 figures

Claims (4)

[Claims] (1) A large number of heat-generating resistive elements are arranged in an array W cm over a field of record width.
#IVc is supplied with an analog signal 1a that continuously converts the voltage into Kffi in response to the current voltage, and shifts this analog signal input one bit at a time to the clock signal Kit. is connected in series with an analog shift register that generates parallel outputs corresponding to each bit and each of the heating resistive elements of the cocoon generator, and is supplied with the corresponding parallel outputs of the analog shift register, A current control circuit that controls the current flowing through the % heat generating IIkwL element, the % heat generating resistor element and the corresponding 1 tIL.
A resistor A that supplies a pressure sensitive voltage of -ntmm to the -ntmm of the division control circuit is equipped with an electrical miscellaneous circuit and an anode, a bond in which a predetermined number of analog signals are stored in the II+Analog shift register, and a heat-generating resistor 6. A heat-sensitive sickle head drive device characterized by leakage in which elements are supplied with nine currents for a predetermined time threshold according to the outputs of respective shift registers. (2) I characterized in that the analog shift register is divided into 41 blocks, and the analog signal input is supplied to each block in parallel.
Thermal recording head drive 1IIl displacement of IJ original permission - car model ■ a11 item -. (3) In a single-acting device of a thermal recording head in which a large number of heat-generating resistive elements are formed in a play shape over the length of the skewer, the voltage varies depending on the negative degree of the generating element.
An analog shift register that is supplied with an analog signal input that changes automatically, shifts this analog signal input bit by bit according to a clock signal, and generates nine parallel outputs corresponding to the command bit, and a % of the analog shift register. The 2y circuit that temporarily stores the parallel output is connected in series with each of the heating resistance elements of the wlj circuit, and is supplied with the corresponding parallel output of the latch circuit, so that each of the four heating resistors First-rate control 1 &
I path, -4 heating resistor main body and corresponding current control I
&! It is equipped with a resistor driver I13 which supplies a predetermined magnetic pressure to the series circuit of the I register, and the bales in which the predetermined number of analog signals are stored in the I analog register, and each parallel output thereof is connected to the latch. Temporarily memorize it in the circuit, and store it in each heat multiplying resistor.
70 It applies a current according to the output of the corresponding latch 1gl1s to cause an overvoltage of the scheduled time (Feeling $1 negative for the head drive -0 (4) The 110g shift register is divided into multiple blocks.
The heat-sensitive distribution of the 3rd Isokori series is characterized by the fact that the analog human power is supplied to each block in parallel. Encouragement -0