JPS58129305A - Optical position detecting device - Google Patents

Optical position detecting device

Info

Publication number
JPS58129305A
JPS58129305A JP1347782A JP1347782A JPS58129305A JP S58129305 A JPS58129305 A JP S58129305A JP 1347782 A JP1347782 A JP 1347782A JP 1347782 A JP1347782 A JP 1347782A JP S58129305 A JPS58129305 A JP S58129305A
Authority
JP
Japan
Prior art keywords
output
amplifier
peak value
circuit
sample hold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1347782A
Other languages
Japanese (ja)
Other versions
JPS6217165B2 (en
Inventor
Kazuhisa Kanda
神田 和久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1347782A priority Critical patent/JPS58129305A/en
Publication of JPS58129305A publication Critical patent/JPS58129305A/en
Publication of JPS6217165B2 publication Critical patent/JPS6217165B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01BMEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B11/00Measuring arrangements characterised by the use of optical techniques
    • G01B11/02Measuring arrangements characterised by the use of optical techniques for measuring length, width or thickness

Abstract

PURPOSE:To make it possible to perform optical position detection, by inputting one of photocurrents from divided parts of a two division light detecting device into the same amplifier as the other amplifier through a delay circuit, sampling and holding the outputs at a delayed time interval, thereby eliminating the effect of the gain errors in the amplifier. CONSTITUTION:When pulse light 17 is inputted into a detector 16, the photocurrents I3 and I4 are generated and passed through preamplifiers 18 and 19. One output is inputted into a delay circuit 20 and delayed by a delay time T. Both outputs are amplified by a logarithmic amplifier 22 through an adder 21, and a peak value is detected by a peak value detecting circuit 23. The peak value is sampled and held in sample hold circuits 24 and 25 by sample hold signals E16 and E17 which are shifted by a delay time T, and a difference is obtained by a subtractor 28. The output E20 is sampled and held by a signal E21, which is synchronized with the sample hold signal E17, and the output is obtaind.

Description

【発明の詳細な説明】 本発明は光位置検出装置の信号処理装置に関する。[Detailed description of the invention] The present invention relates to a signal processing device for an optical position detection device.

2分割検知器1s用した光位置検出装置として従来一般
に使用されている一例の系統図を第1図に、その波形図
を第2図に示す、その動作を以下説明する。検知器1に
バルヌ光2が入ると、光による電流I 1m I tが
それぞれのプリアンプ3,4に入力され(こζでIxm
t+系、 Es側を一系とする)、その出力El* E
mは、それぞれ増幅器へ6で増幅される。さらに、入力
光の強さに対するダイナよツクレンジを得るため対数増
幅回路7.8にこれを加え出力Es*E4を得る1次に
ノくルスのピーク値に比例し九直流電圧を得る九めにま
ず、ピーク検出回路9.10でバルメ幅を広げ(Es 
、E6)、サンルホールド回路11.12によシ直流電
圧E7゜Is を得る。このときのサンプルホールド回
路のゲート信号は各対数増幅回路の出力Es*E4を加
算器13で加算し、単安定マルチパイフv−夕14で波
形成形した出力Eat使う、サンプルホールド回路の出
力E y e E sO差を減算器15で、得る。
FIG. 1 shows a system diagram of an example of an optical position detection device commonly used in the past as an optical position detection device using a two-part detector 1s, and FIG. 2 shows a waveform diagram thereof.The operation thereof will be described below. When Barne light 2 enters the detector 1, the current I 1m It due to the light is input to the respective preamplifiers 3 and 4 (here Ixm
t+ system, Es side is one system), its output El* E
m are each amplified by 6 to an amplifier. Furthermore, in order to obtain a dynamic range for the intensity of the input light, this is added to the logarithmic amplifier circuit 7.8 to obtain the output Es*E4. First, use the peak detection circuit 9.10 to widen the valve width (Es
, E6), a DC voltage E7°Is is obtained by the sample hold circuit 11.12. At this time, the gate signal of the sample and hold circuit is obtained by adding the output Es*E4 of each logarithmic amplifier circuit in an adder 13, and using the output Eat which is waveform-shaped in a monostable multipipe filter 14.The output of the sample and hold circuit E y e A subtractor 15 obtains the E sO difference.

その出力E1oはEto =K (E7−Ea )とな
J)Etaが、光の位置でKは光の位置に対する利得定
数で、減算器の利得で決まる。ここで増幅器3,4.対
数増幅回路7.8とピークレベル検出回路9.10tそ
れぞれの系の信号増幅部という。
The output E1o is Eto = K (E7-Ea).J) Eta is the position of the light, and K is a gain constant for the position of the light, which is determined by the gain of the subtractor. Here, amplifiers 3, 4 . These are called signal amplification sections for the logarithmic amplifier circuit 7.8 and the peak level detection circuit 9.10t.

この信号処理装置において光が検知器の中心にあり光の
強さPのみが変化したとして第2図と第3図OA、B、
Cの3点について考えると、A点での入力レベルでは子
糸の利得G1と、−系の利得G2とが一致しているので
角度出力EIOは0である。一方%B点ではGl>02
であるため角度出力Eoは誤差出力Elを生ずる。同様
に0点ではGl<G2 であるため誤差出力ECを生ず
る。
In this signal processing device, assuming that the light is at the center of the detector and only the intensity P of the light changes, Figures 2 and 3 OA, B,
Considering the three points C, at the input level at point A, the gain G1 of the child thread and the gain G2 of the - system match, so the angular output EIO is 0. On the other hand, at point %B, Gl>02
Therefore, the angular output Eo produces an error output El. Similarly, at point 0, since Gl<G2, an error output EC is generated.

このように従来鉄量では2系統の信号増幅部の利得が全
ての入力光の強さの範囲で一致していないと光が検知器
の中心にあるにもかかわらず、角度誤差出力を生じてし
まう。
In this way, with conventional iron weight, if the gains of the two signal amplifiers do not match over the entire input light intensity range, an angular error output will occur even though the light is at the center of the detector. Put it away.

本発明の目的は光位置検出装置の信号処理装置において
信号増幅部の利得の不一致による角度検出誤差をなくす
装置を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a signal processing device for an optical position detection device that eliminates angle detection errors due to mismatched gains of signal amplification sections.

光位置検出装置の信号処理装置において、2系統とも同
じ信号増幅部を使用することによ抄信号増幅部の利得の
不一致による角度検出誤差tなくする装置。
In a signal processing device for an optical position detection device, a device eliminates an angle detection error t due to a mismatch in the gains of the signal amplification sections by using the same signal amplification section for both systems.

以下5本発明の一実施例を図面を参照して説明する。Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

本発明の一実施例のブロック図を第4図に、その波形図
を第5図に示す、光が中心にあり入力光の強さが変化し
た場合について説明する。
A block diagram of an embodiment of the present invention is shown in FIG. 4, and a waveform diagram thereof is shown in FIG. 5. A case where the light is at the center and the intensity of the input light changes will be described.

検知器16にパルス光17が入射することにより生ずる
光電流In、Inがそれぞれのプリアンプ18.19で
増幅され、その出力tEuJ1雪とする。−系の出力E
1gのみ遅延回路201に通し、時間Tだけ遅延させて
11mとする。PllとELSとを加算器21で加算し
くEt4)、更に対数増幅回路22およびピーク値検出
回路23を経て出力Kxst得る。Etst+系のサン
プルホールド回路24と一系のサンプルホールド回路2
5に同時に加える。そのときの子糸サンプルホールド回
路24のゲート信号gt−はプリアンプ18の出力を単
安定マルチバイブレータ26により波形整形したものを
使い、−系サンプルホールド回路25のゲート信号11
7は遅延回路出力E1st−単安定マルチバイブレータ
27で波形整形したものを使う、それぞれのサンプルホ
ールド°回路出力E1s 、 Its を減算器28に
加え差出力Ewとする。この’Ewtサンプルホールド
回路29に加えて角度出力Eat得る。サンプルホール
ド回路29のゲート信号はKlyt−さらに単安定マル
チバイブレータ30に加え波形整形したEzlを使う。
The photocurrents In and In generated by the incidence of the pulsed light 17 on the detector 16 are amplified by the respective preamplifiers 18 and 19, and the output thereof is set as tEuJ1. - Output E of the system
Only 1g is passed through the delay circuit 201 and delayed by time T to be 11m. Pll and ELS are added by an adder 21 (Et4), and further passed through a logarithmic amplifier circuit 22 and a peak value detection circuit 23 to obtain an output Kxst. Etst+ type sample hold circuit 24 and type 1 sample hold circuit 2
Add to 5 at the same time. At that time, the gate signal gt- of the yarn sample and hold circuit 24 is obtained by waveform-shaping the output of the preamplifier 18 using a monostable multivibrator 26, and the gate signal gt- of the - system sample and hold circuit 25 is
7 uses a delay circuit output E1st whose waveform has been shaped by a monostable multivibrator 27, and adds the respective sample and hold circuit outputs E1s and Its to a subtracter 28 to obtain a difference output Ew. In addition to this 'Ewt sample hold circuit 29, an angle output Eat is obtained. The gate signal of the sample and hold circuit 29 uses Klyt--Ezl whose waveform has been shaped in addition to the monostable multivibrator 30.

以上の説明では、第1図に示す増幅器5,6は図示され
ていないが、これはその影響が少ないためで、第4図で
はプリアンプ18.19にそれぞれ含めている。その代
りに別に加算器21の直後に1個の増幅器を設けても良
い。このように本発明は信号増幅部を子糸と一系で共用
しているために、従来のように利得の不一致による角度
誤差出力がなくなる。
In the above explanation, the amplifiers 5 and 6 shown in FIG. 1 are not shown, but this is because their influence is small, and in FIG. 4 they are included in the preamplifiers 18 and 19, respectively. Alternatively, one amplifier may be separately provided immediately after the adder 21. As described above, in the present invention, since the signal amplification section is shared with the child thread in one system, there is no angular error output due to gain mismatch as in the prior art.

本発明は以上説明したように、信号増幅部を+系、−系
で共用することにより、入力光の強さの変化による角度
誤差出力はなくなる。さらに回路調整は2系統を一致さ
せる必要がなくなるので調整が容易になる。
As described above, in the present invention, by sharing the signal amplifying section with the + system and the - system, angular error output due to changes in the intensity of input light is eliminated. Further, circuit adjustment becomes easier because it is not necessary to match the two systems.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図と第2図は従来の信号処理装置のブロック図とそ
の波形図、第3図は子糸、−系の信号増幅部で利得の不
一致を生じた場合の各基の直流電圧出力と角度出力の関
係を示す図、第4図は本発明の信号処理装置のブロック
図、第5図は第4図の波形図を示す図である。 1.16・・・・・・検知器、2.17・・・・・・光
、3〜6 、18゜19・・・・・・増幅器、?、8,
22・・・・・・対数増幅器、9゜10 、23・・・
・・・ピーク値検出回路、11.12,24゜25.2
9・・・・・・サンプルホールド回路、13.21・・
・・・・加算器、15.28・・・・・・減算器、20
・・・・・・遅延回路。 A            B           
  CF2゜ 峯Z回 寥J回
Figures 1 and 2 are a block diagram of a conventional signal processing device and its waveform diagram, and Figure 3 shows the DC voltage output of each unit when a gain mismatch occurs in the signal amplification section of the - system. FIG. 4 is a block diagram of the signal processing device of the present invention, and FIG. 5 is a diagram showing the waveform diagram of FIG. 4. 1.16...Detector, 2.17...Light, 3-6, 18°19...Amplifier, ? ,8,
22... Logarithmic amplifier, 9°10, 23...
...Peak value detection circuit, 11.12, 24°25.2
9... Sample hold circuit, 13.21...
...Adder, 15.28...Subtractor, 20
...Delay circuit. A B
CF2゜Mine Z times J times

Claims (1)

【特許請求の範囲】[Claims] 2個に分割された光検知器の各分割部からの光電流のう
ち、一方を所定時間遅延させる遅延回路と、との遅延回
路の出力と他方の光電流とを加算する加算器と、この加
算された出力を増幅する増幅器と、この増幅器の出力の
ピーク値を検出するピーク値検出回路と、このピーク値
を前記所定時間間隔のサンプリングパルスでサンプルホ
ールドする2つのサンブリ、ング回路と、この2つのサ
ンプリング回路出力の差をとる減算器と、この減算器出
力を前記時間遅延を受けたサンプリングパルスト同期し
たパルスでサンプリングする回路とを備えて成ることt
−特徴とする光位置検出装置。
a delay circuit for delaying one of the photocurrents from each divided portion of the photodetector divided into two for a predetermined time; an adder for adding the output of the delay circuit and the other photocurrent; an amplifier that amplifies the summed output; a peak value detection circuit that detects the peak value of the output of the amplifier; two sampling circuits that sample and hold this peak value using sampling pulses at the predetermined time intervals; and a circuit that samples the subtracter output with a pulse synchronized with the time-delayed sampling pulse.
-Characteristic optical position detection device.
JP1347782A 1982-01-29 1982-01-29 Optical position detecting device Granted JPS58129305A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1347782A JPS58129305A (en) 1982-01-29 1982-01-29 Optical position detecting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1347782A JPS58129305A (en) 1982-01-29 1982-01-29 Optical position detecting device

Publications (2)

Publication Number Publication Date
JPS58129305A true JPS58129305A (en) 1983-08-02
JPS6217165B2 JPS6217165B2 (en) 1987-04-16

Family

ID=11834199

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1347782A Granted JPS58129305A (en) 1982-01-29 1982-01-29 Optical position detecting device

Country Status (1)

Country Link
JP (1) JPS58129305A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63257801A (en) * 1987-04-15 1988-10-25 Matsushita Electric Ind Co Ltd Loop gain control device
JPH03226624A (en) * 1990-01-31 1991-10-07 Nec Corp Star scanner
EP0944046A2 (en) * 1998-03-20 1999-09-22 Pioneer Electronic Corporation Pre-pit detecting apparatus

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63257801A (en) * 1987-04-15 1988-10-25 Matsushita Electric Ind Co Ltd Loop gain control device
JPH03226624A (en) * 1990-01-31 1991-10-07 Nec Corp Star scanner
EP0944046A2 (en) * 1998-03-20 1999-09-22 Pioneer Electronic Corporation Pre-pit detecting apparatus
EP0944046A3 (en) * 1998-03-20 2001-11-14 Pioneer Electronic Corporation Pre-pit detecting apparatus

Also Published As

Publication number Publication date
JPS6217165B2 (en) 1987-04-16

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