JPS58123669U - Horizontal holddown circuit of television receiver - Google Patents

Horizontal holddown circuit of television receiver

Info

Publication number
JPS58123669U
JPS58123669U JP2015682U JP2015682U JPS58123669U JP S58123669 U JPS58123669 U JP S58123669U JP 2015682 U JP2015682 U JP 2015682U JP 2015682 U JP2015682 U JP 2015682U JP S58123669 U JPS58123669 U JP S58123669U
Authority
JP
Japan
Prior art keywords
voltage
circuit
television receiver
horizontal
horizontal holddown
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2015682U
Other languages
Japanese (ja)
Inventor
小寺 明
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP2015682U priority Critical patent/JPS58123669U/en
Publication of JPS58123669U publication Critical patent/JPS58123669U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の水平ホールドダウン回路を示す回路図、
第2図は本考案の一実施例を示す回路図、第3図はその
動作特性図である。 1・・・・・・水平発振回路、2・・・・・・水平ドラ
イブ回路、4・・・・・・フライバックトランス、5・
・・・・・多倍圧整流回路、11・・・・・・フォーガ
ス電圧取出し用分圧回路、16・・・・・・ホールドダ
ウン用スイシチングトランジスタ。
Figure 1 is a circuit diagram showing a conventional horizontal hold-down circuit.
FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is a diagram showing its operating characteristics. 1...Horizontal oscillation circuit, 2...Horizontal drive circuit, 4...Flyback transformer, 5...
...Multiple voltage rectifier circuit, 11... Voltage divider circuit for taking out Forgas voltage, 16... Switching transistor for hold down.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] フライバックトランスの高圧巻線に接続された多倍圧整
流回路の段間にフォーカス又はスクリーン電圧取り出し
用の分圧回路を設けたテレビジョン受像機に於いて、前
記分圧回路から直流低電圧を取り出し、この直流低電圧
の所定値を越える上昇時に水平出力回路を停止させるよ
うにしたテレビジョン受像機の水平ホールドダウン回路
In a television receiver in which a voltage divider circuit for extracting focus or screen voltage is provided between the stages of a multi-voltage rectifier circuit connected to the high voltage winding of a flyback transformer, a DC low voltage is supplied from the voltage divider circuit. A horizontal hold-down circuit for a television receiver is designed to stop the horizontal output circuit when the low DC voltage rises above a predetermined value.
JP2015682U 1982-02-15 1982-02-15 Horizontal holddown circuit of television receiver Pending JPS58123669U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2015682U JPS58123669U (en) 1982-02-15 1982-02-15 Horizontal holddown circuit of television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2015682U JPS58123669U (en) 1982-02-15 1982-02-15 Horizontal holddown circuit of television receiver

Publications (1)

Publication Number Publication Date
JPS58123669U true JPS58123669U (en) 1983-08-23

Family

ID=30032330

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015682U Pending JPS58123669U (en) 1982-02-15 1982-02-15 Horizontal holddown circuit of television receiver

Country Status (1)

Country Link
JP (1) JPS58123669U (en)

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