JPS58117584A - Display device array substrate - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

TECHNICAL FIELD The present invention relates to an array substrate used as a substrate for an active matrix type display device using switching and transistor/capacitor play.

(Prior art and its problems) Display devices are widely used, mainly CRTs. In recent years, planar displays with a -crystalline center are becoming popular. Particularly recently, research and development of a type of display device called an active matrix substrate in which a nonlinear element is added to each display surface element has become active. Among these, combinations of switching transistor/capacitor arrays and liquid crystals are the most popular. Figure 1 is an equivalent circuit diagram of a switching transistor/capacitor play for liquid crystal displays, including a signal storage capacitor 1 that stores the driving voltage applied to the liquid crystal, and a switching transistor that controls the supply of the driving voltage to this capacitor 1. M as
OS FETs 2 are integrated and formed in a matrix on a semiconductor substrate made of silicon or the like. Xl, X,...ha!
Address line that controls the gate of J8 FIT 2%
Yt, Y, . . . are data input lines for supplying driving voltages such as parallel image signals to the capacitor 1, and these are also formed on the semiconductor substrate. On the semiconductor substrate on which the elements and wiring are formed in this way, a display electrode 3 is formed which is separated for each pixel via an insulating film, and the drive voltage stored in the capacitor 1 is applied to the display electrode 3. It has become so. A matrix type liquid crystal display is produced by sandwiching a liquid crystal layer between the semiconductor substrate on which the switching transistor/capacitor array and display electrodes are formed, a common transparent electrode formed on the entire surface of the transparent substrate, and an opposing substrate. The device will be configured.

FIG. 2 is an example of a cross-sectional view of a display switching transistor/capacitor array substrate using 84 substrates.

21 is a switching transistor and 22 is a signal storage capacitor. switching transistor 2
1 consists of a drain 23, a gate 25, and a source 24. Drain 23 is connected to data line 26 . 27 is a semiconductor substrate containing impurities of a conductivity type opposite to that of the drain 23 and source 24. In this case, the capacitor electrode 29 also serves as one display electrode.

A single crystal of Si is used as the semiconductor substrate 27, and the drain 2
3 and the substrate 27, the substrate 27 is usually grounded or held at a constant potential, so that the drain 23 has Il! The potential of the connected data line 26 is fixed to the substrate potential, and no charge is accumulated in the signal storage capacitor 22.

Driving the display material on the play board 20 eliminates the problem. Furthermore, the data input line 2 is fixed to the substrate potential.
All pixels connected to 6 also become undisplayable, resulting in a line of undisplayable pixels (hereinafter referred to as a line defect).
.

Line defects caused by this type of PN junction defect can be eliminated by using dielectric isolation as an element isolation method and making the substrate of each pixel transistor independent. (hereinafter referred to as point defects). In display devices, line defects are not allowed, but point defects of 0.01 Z J degree are allowed. This type of method is 808 (5ilicon On 8
There is an example using aphire). However, S.O.
No. 8 can obtain single-crystal silicon on sapphire, but it is expensive (nearly 10 times that of Siwafer) and has the disadvantage that the process is long and the cost is high. Another method is to use a compound semiconductor such as amorphous S1, poly S1, or Cd8e on a glass substrate.

However, a single crystal cannot be obtained on a glass substrate, and the value of the mobility of charge carriers is not very large. Therefore, although it can be used as a pixel switch transistor, it cannot be applied to the drive circuit of the array, which must operate at a higher frequency. Therefore, the drive circuit must be provided externally, and the number of connections between the #array and the outside becomes enormous. It is a natural requirement to integrate as many pixel array drive circuits on the same substrate as possible to reduce external connections.

Also, a common drawback of SOS or matrix arrays using poly or amorphous semiconductors on glass substrates is that one electrode of the drive voltage storage capacitor (
Normally, the lower electric button on the semiconductor layer side had to be floating, or the lower electrodes had to be connected to each other, and wiring had to be provided to take them out to the outside. When the lower electrode is floated, the function of the storage capacitor becomes unstable and lacks reliability. In addition, if a lower #l electrode connection wiring is provided, the area and capacitance of the storage capacitor will be reduced, resulting in a deterioration of the display function.Furthermore, the wiring length and wiring intersections will increase, resulting in an increase in the number of steps in device manufacturing. In some cases, this resulted in a decrease in yield and reliability.

(Object of the Invention) The present invention has been developed in view of the drawbacks of the prior art described above, and consists of sequentially forming an insulating film and a semiconductor layer on a single-crystal silicon substrate, a switching transistor in the semiconductor layer, and a capacitor in the silicon single-crystal part. Furthermore, by forming high-speed circuits on the silicon single crystal part of the substrate, it has fewer defects, has a high degree of integration, and has high-speed peripheral circuits.

Moreover, the price is comparable to that of a Si single crystal IC, the performance of the storage capacitor is high, and the device provides a display device with high reliability.

(Embodiments of the Invention) Hereinafter, an embodiment of the present invention will be specifically described with reference to the drawings.

FIG. 3 is a sectional view showing an embodiment of the present invention. A silicon nitride film 32 is provided on a silicon single crystal substrate 31, and an array of switching transistors 34 using an amorphous silicon layer 33 is provided thereon. A capacitor 35 provided on a silicon single crystal substrate is connected to each switching transistor. The switching transistors are separated by a silicon nitride film 32. The silicon nitride film 32 also serves as an interelectrode insulating film of the capacitor 35. The silicon single crystal of the substrate has
A shift register circuit 37 is provided for driving the gate electrode 36 of the switching transistor 34. With this structure, a substrate with point defects but no line defects can be obtained. Moreover, since the drive circuit for the gate of the pixel switch transistor can be integrated, it is possible to obtain a display board for a display device (chair) with fewer connections to the outside. Since it is grounded, there is no need to newly wire the lower electrode.If a liquid crystal display element is manufactured using this playback board, it is possible to display 'rvllljme'.

FIG. 4 shows another embodiment of the present invention. A silicon oxide film 42 is provided on a silicon single crystal substrate 41, and a polysilicon layer 43 is provided thereon. A pixel switching transistor 44 is provided on the polysilicon layer 43. The switching transistors 44 of adjacent pixels are insulated and separated by a feed silicon oxide film 46 and an underlying silicon oxide film 42. Connected to each switching transistor 44 is a drive voltage storage capacitor 45 formed on a silicon single crystal. The capacitor 45 is formed of a substrate 41 as a lower electrode, an oxide film 48 thinly formed on the substrate, and an upper electrode 49.

A drive circuit 47 is also formed in the silicon single crystal portion,
The switching transistor 44 is driven. In this case, since polysilicon can withstand high-temperature processes, the drive circuit section 47 on the silicon single crystal and the switching transistor 44 and signal storage capacitor 45 on the polysilicon layer 43 can be manufactured simultaneously in the same process. . A liquid crystal display element is manufactured using this array substrate,
The key is to obtain an RV image t1 display device that is free from line defects, has high quality display performance, and has a small number of external connections.

In the above, the case where an amorphous silicon layer and a polysilicon layer are used as the semiconductor layer on the insulating film has been described, but the same applies to compound semiconductor layers such as Cd8e and Q10. The case where the insulating film is also a silicon nitride film or a silicon oxide film has been described above.

Aluminum oxide or the like may also be used. The interelectrode insulating film of the canopy may be an insulating film between the substrate and the transistor, or may be separately manufactured by another process, for example, a gate oxidation process.Also, if the display material is a liquid crystal material. I only explained about electrochromic °, electroluminescence, thin film metal deposition? A light bulb using an ilm or a fluorescent display method may be used. Regarding the peripheral drive circuit, although the case where the X-axis drive circuit is integrated has not been described, it is of course possible to integrate the Y-axis drive circuit as well. Although the gate material was not described in the examples, commonly used A
Of course, it is also possible to use other positives such as l and poiy-8i, IIA, etc.

(Effects of the Invention) As explained above, according to the present invention, it is possible to provide an array for display devices with fewer defects in which drive circuits are integrated. Further, the cost per wafer is the same as that of a normal silicon single crystal IC, and the yield per wafer is also improved. Therefore, it is possible to provide a play for a display device with a low cost per chip. Furthermore, when a silicon single crystal substrate is used, when strong light is incident, the smoke on the substrate side of the signal storage capacitor tends to leak to the source of the pixel switching transistor.

According to the present invention, since the pixel switching transistor and the signal storage capacitor can be dielectrically divided, the above-mentioned light leakage phenomenon can be prevented.

[Brief explanation of the drawing]

FIG. 1 is an equivalent circuit diagram of a liquid crystal display switching transistor/capacitor array, FIG. 2 is a sectional view of a conventional display switching transistor/capacitor array substrate, and FIG. 3 is an embodiment of the present invention. FIG. 4 is a cross-sectional view of another embodiment of the present invention. 1.22... Signal storage capacitor 2.21... Switching transistor (tvL)
8 FET) 3...Display electrode, 23...Drain, 26...Data power line, 28...PN junction reverse breakdown voltage 31.41...Silicon single crystal substrate (lower voltage type of capacitor) 32...Silicon nitride film 42...Silicon oxide film 33...Amorphous silicon layer, 43...Poly silicon layer 34.44...Switching transistor. 35.45... Drive voltage storage capacitor 36 - Gate, 46... Field oxidation, 37.47...
・Drive circuit section 48...thin silicon oxide film 49...upper electrode of capacitor

Claims (5)

[Claims] (1) A semiconductor layer is partially provided on a silicon single crystal substrate with an insulating film interposed therebetween, and a switching transistor for controlling the drive voltage of the display material is provided in the semiconductor layer. 1. An array substrate for a display device, characterized in that an array having capacitors is formed on a silicon single crystal substrate, and a circuit section for driving the play is formed on the silicon single crystal substrate. (2) The array base k for a display device according to claim 1, wherein the insulating film is a silicon oxide film. (3) The array substrate for a display device according to claim 1, wherein the distribution edge film is a silicon nitride film. (4) The array substrate for a display device according to claim 1, wherein the semiconductor film is a polycrystalline silicon film. (5) The switching transistor is 1la
2. The array substrate for a display device according to claim 1, wherein the other switching transistor and the capacitor in contact with each other are electrically isolated from each other.