JPS58116313U - Muting circuit when power is OFF - Google Patents

Muting circuit when power is OFF

Info

Publication number
JPS58116313U
JPS58116313U JP1143382U JP1143382U JPS58116313U JP S58116313 U JPS58116313 U JP S58116313U JP 1143382 U JP1143382 U JP 1143382U JP 1143382 U JP1143382 U JP 1143382U JP S58116313 U JPS58116313 U JP S58116313U
Authority
JP
Japan
Prior art keywords
power amplifier
power
muting
muting circuit
vcc terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1143382U
Other languages
Japanese (ja)
Inventor
茂 山口
増「淵」　修一
Original Assignee
株式会社日立製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to JP1143382U priority Critical patent/JPS58116313U/en
Publication of JPS58116313U publication Critical patent/JPS58116313U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は、従来のパワーアンプとリレー及び電源スィッ
チの結合した回路図、第２図は本考案のパワーアンプと
リレー及び電源スィッチの結合した回路図である。 １．１′・・・パワーアンプ、２．　２’・・・リレー
、３、　３’・・・コンデンサ、４．　４’−・・・電
源スィッチ、５・・・ダイオード。FIG. 1 is a circuit diagram of a conventional power amplifier, a relay, and a power switch, and FIG. 2 is a circuit diagram of a power amplifier, a relay, and a power switch according to the present invention. 1.1'...power amplifier, 2. 2'... Relay, 3, 3'... Capacitor, 4. 4'-...Power switch, 5...Diode.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] バック接点付きのリレ一番珀いて、スイッチ切換えを行
なうパワーアンプ回路において電源の友イッチをＯＦＦ
したとき、パワーアンプのＶｃｃ端子に結合されたコン
デンサに充電された電荷を放電、　　させることにより
、パワーアンプのミューティング端子に電流を流入させ
て、ミューティングも、動作させる事を特徴とする電源
ＯＦＦ時のミューティング回路。A relay with a back contact is used to turn off the power switch in a power amplifier circuit that switches switches.
When the power amplifier's Vcc terminal is connected to the Vcc terminal of the power amplifier, a current is caused to flow into the muting terminal of the power amplifier by discharging the charge stored in the capacitor connected to the Vcc terminal of the power amplifier, thereby also operating muting. Muting circuit when OFF.
JP1143382U 1982-02-01 1982-02-01 Muting circuit when power is OFF Pending JPS58116313U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1143382U JPS58116313U (en) 1982-02-01 1982-02-01 Muting circuit when power is OFF

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1143382U JPS58116313U (en) 1982-02-01 1982-02-01 Muting circuit when power is OFF

Publications (1)

Publication Number Publication Date
JPS58116313U true JPS58116313U (en) 1983-08-09

Family

ID=30024041

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1143382U Pending JPS58116313U (en) 1982-02-01 1982-02-01 Muting circuit when power is OFF

Country Status (1)

Country Link
JP (1) JPS58116313U (en)

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