JPS58115844U - Time division multiplex transmission control system - Google Patents

Time division multiplex transmission control system

Info

Publication number
JPS58115844U
JPS58115844U JP1197182U JP1197182U JPS58115844U JP S58115844 U JPS58115844 U JP S58115844U JP 1197182 U JP1197182 U JP 1197182U JP 1197182 U JP1197182 U JP 1197182U JP S58115844 U JPS58115844 U JP S58115844U
Authority
JP
Japan
Prior art keywords
control
switch input
terminal
operation panel
main operation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1197182U
Other languages
Japanese (ja)
Inventor
辰己 嘉一
山際 宏
Original Assignee
松下電工株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 松下電工株式会社 filed Critical 松下電工株式会社
Priority to JP1197182U priority Critical patent/JPS58115844U/en
Publication of JPS58115844U publication Critical patent/JPS58115844U/en
Pending legal-status Critical Current

Links

Landscapes

  • Remote Monitoring And Control Of Power-Distribution Networks (AREA)
  • Selective Calling Equipment (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例の概略回路構成図、第2図a〜dは同上
の動作説明用タイムチャー下ミ第3図は本考案の一実施
例の概略回路構成図、第4図a〜eは同上の動作説明用
タイムチャート、第5図は同上の主操作盤のブロック図
であり、1は主操作盤、2o、  2i”・・・は制御
用端末器、3はスイッチ入力用端末器、6□・・・は照
明負荷、10はタイマ、     −11は昼光センサ
である。 To−m− 0N (0)  。FF−7−一一一二 b  − −% −・。
Fig. 1 is a schematic circuit diagram of a conventional example, Figs. is a time chart for explaining the operation as above, and Fig. 5 is a block diagram of the main operation panel as above, where 1 is the main operation panel, 2o, 2i''... are control terminals, and 3 is a switch input terminal. , 6□... is a lighting load, 10 is a timer, and -11 is a daylight sensor.To-m-0N (0).FF-7-1112b--%-.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] マイクロコンピュータのらうな論理回路を内蔵してこの
論理回路により各端末器のアドレスを順次設定し、アド
レス設定された端末器との間で制御信号乃至監視信号を
送受する主操作盤と、この主操作盤により当該アドレス
が設定されたときこの主操作盤からの制御信号を受信し
てその制御データに基き従属する照明負荷のような負荷
を制御する複数の制御用端末器と、上記主操作盤により
当該アドレスが設定されたとき信号返送時間帯にスイッ
チ入力状態についてのデータを監視信号として主操作盤
に返送するスイッチ入力用端末器とよりなり、スイッチ
入力用端末器からの監視信号を主操作盤で受信し、予め
設定されたプログラムに基きスイッチ入力用端末器の各
スイッチに対応づけられ制御用端末器の各従属負循を制
御する制御信号を作成送出するようにした時分割多重伝
送制御装置において、スイッチ入力用端末器の〒スイッ
チ入力として外光レベルが一定レベル以下であればオシ
信号を与える昼光センサをスイッチ入力用端末器に付設
し、該昼光センサの出力端とスイッチ入力用端末器のス
イッチ入力端との間に制御用端末器の負荷制御用スイッ
チを挿入して該負荷制御用スイッチのオフ時には昼光セ
ンサの出力を遮断するようにし、□゛主操作盤にはタイ
マモード時に所定の期間システムの全制御用端末器の負
荷制御用スイッチをオフさせる制御データを主操作盤に
与えるタイマを付設して成る時分割多重伝送制御システ
ム。
A main operation panel that has a built-in logic circuit of a microcomputer that sequentially sets the address of each terminal device and sends and receives control signals and monitoring signals to and from the terminal device for which the address has been set; a plurality of control terminals that receive control signals from the main operation panel when the address is set by the operation panel and control loads such as subordinate lighting loads based on the control data; and the main operation panel. When the address is set, the switch input terminal returns data about the switch input status as a monitoring signal to the main operation panel during the signal return time, and the monitoring signal from the switch input terminal is used for the main operation. Time-division multiplex transmission control in which control signals are received by the control panel and sent out based on a preset program to be associated with each switch of the switch input terminal and to control each dependent negative cycle of the control terminal. In the device, a daylight sensor is attached to the switch input terminal that provides an oscillation signal if the outside light level is below a certain level as a switch input, and the output terminal of the daylight sensor and the switch input are connected to the switch input terminal. A load control switch of the control terminal is inserted between the switch input terminal of the control terminal and the output of the daylight sensor is cut off when the load control switch is turned off. A time division multiplex transmission control system that is equipped with a timer that provides a main operation panel with control data that turns off the load control switches of all control terminals in the system for a predetermined period in timer mode.
JP1197182U 1982-01-30 1982-01-30 Time division multiplex transmission control system Pending JPS58115844U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1197182U JPS58115844U (en) 1982-01-30 1982-01-30 Time division multiplex transmission control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1197182U JPS58115844U (en) 1982-01-30 1982-01-30 Time division multiplex transmission control system

Publications (1)

Publication Number Publication Date
JPS58115844U true JPS58115844U (en) 1983-08-08

Family

ID=30024561

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1197182U Pending JPS58115844U (en) 1982-01-30 1982-01-30 Time division multiplex transmission control system

Country Status (1)

Country Link
JP (1) JPS58115844U (en)

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