JPS58112461A - Method and device for measuring dv/dt withstand amount of thyristor switch - Google Patents

Abstract

PURPOSE:To effectively measure the dv/dt withstand amount of a thyristor switch by repeatedly applying an oblique voltage between the anode and the cathode of a thyristor and judging whether the thyristor fires or not. CONSTITUTION:A pulse signal generator 25 generates a clock pulse. An evaluating pulse voltage of an oblique voltage is generated by a dv/dt withstand amount measuring pulse voltage generator 23. Waveform converters 26, 27 respectively output a control signal and a switch control signal. These evaluating pulse voltage and control voltage are supplied to a semiconductor switch circuit 21, thereby judging whether the thyristor fires or not, and the dv/dt withstand voltage of the thyristor is measured based on the gradient of the evaluating pulse.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method and apparatus for measuring the noise immunity of a v't thyristor switch, and particularly to a method and apparatus for measuring the dv/dt immunity of a thyristor switch having an on-state detection function.

Conventionally, a circuit as shown in FIG. 1 has been considered as a circuit using a thyristor (usually consisting of four pnpn layers) as an electronic switch (Japanese Patent Publication No. 52-0673, etc.). The thyristor 1 has main switch terminals 6 and 7, through which signals pass through the thyristor 1.

The circuit constituted by transistors 2 and 3 and resistors 4 and 5 is a JX circuit and turns thyristor 1 on.・
A voltage source (normally 5V) is connected to terminals 9 and 10, and a control signal of $0 is connected to terminal 8, and the opening and closing of the drive circuit is controlled by the control signal.

When evaluating the noise resistance performance of the thyristor 1 (the degree of margin against malfunction in the event of external disturbance noise and pressure), apply a voltage pulse with a sharp rise to both ends of the switch. Voltage rises! l1 judge.

The circuit 1 in Fig. 42 has a configuration suitable for this purpose, and the entire semiconductor switch in Fig. 1 is represented by 11, with terminals 6 and 7.
．． ...I measured it to 10 mag and took Figure 1 and I-tora. The main switch terminal 7 is in the 8-state state, and the terminal 6 is equipped with a turtle flow limiting resistor 14 to separate the evaluation pulse voltage v (. The power source 13 is connected, and a control signal VC is applied between the terminals 8 and 10.

Figure 43 shows waveforms during evaluation of dv/dt tolerance, which is one of the noise tolerance performances. The rise of the pressure ``d'' is similar to that of a straight line La, and the pressure is called a ramp-like sleep pressure n, which is a quasi-inclination pressure, and is applied between terminals 12 and 7 in FIG. After this voltage has completed rising, it becomes negative and returns to the appropriate voltage. Voltage vA
is the voltage at terminal 6, and current iA is the current flowing into terminal 6, both of which are added to the anode voltage and anode current of thyristor 1.

If the slope of the rising part of the voltage Vo is increased like a point source, the thyristor will eventually return to a point. This is because the voltage vo rises suddenly! When this happens, the displacement current that flows out of the capacitance inside the thyristor increases, and this serves as a trigger current for the thyristor to fire the thyristor.

The slope when the thyristor is fired is used as a measure of noise resistance, and this f d v/d is called the withstand capacity or critical voltage rise rate.

A while after the fα linear rise of the voltage vo is completed, a voltage pulse is applied to the control signal vc to turn on the υthyristor lff. This is to eliminate the residual charge accumulated in the thyristor which adversely affects the measurement of dv/dt tolerance (Japanese Patent Laid-Open No. 51-36876).

On the other hand, with the increasing functionality of thyristors, in addition to the thyristor 1 shown in FIG. 1, a thyrisk switch 16 as shown in FIG. 4 has been newly studied. f', and the dv/dt resistance of this thyristor switch 16 must also be reliably measured with high precision as in the conventional case.

This thyristor switch 16 is ' Pr N 1P2
Pi for 1 pod in OFF state to thyristor 15 of N2/4 construction
tP, is equipped with n, and P, with transistor 1
7. An electronic circuit consisting of resistors 18 and 19 is connected. The entire semiconductor switch in FIG. 4 is designated by 21. When the thyristor 15 is in the off state, the collector current of the transistor 17 does not flow, and when the thyristor 15 is in the on state, the collector current changes to P.
3” flows through the transistor 1 at this time.
By monitoring the collector current i (H or base current ib) of No. 7, it is possible to detect the on state of the thyristor 15.Also, when the thyristor 15 turns from on to off, Since IC flows into the junction p3nl from the transistor 17, p3n1
The thyristor consisting of p2n2 parts is not cut off. Therefore, by applying a relatively high voltage to either terminal 6 or 7,
Transistor 17 is turned off to cut off "c"k.

Such an on-state detection function is useful when the thyristors 15 are connected in parallel and becomes effective when one is in the off-state and the other must be kept in the off-state.

However, in order to measure the dv/dt withstand capacity of the si-risk switch 16, if we configure the measurement circuit as shown in Fig. 5 using the measurement method shown in Figs. 21 and 3 described above, and add a valley signal, It was found that the dv/dt tolerance was observed to be very low (1/10 to 1/100 of the normal tolerance value).

FIG. 6 shows a typical waveform at this time, and the signal IC is a current flowing into the power supply terminal 20 of the on-state detection circuit. Time t. The waveform between -tl is exactly the same as the waveform shown in FIG. 3, but after t2 the phenomenon of having a zero circuit occurs. When the control signal VC reaches the ItIII level at time t1, the thyristor 15 is turned on and the current lA,i
c flows.

When the voltage vo returns to OV at time t2, the current iA also decreases and eventually becomes below the holding current of the thyristor, so that p,
The current flowing into the thyristor 15 from the -nl-p2-n2 section is zero and ft1), I), n.

The bond is broken.

However, since the current i (H flows into the contacts p and rl from the collector of the transistor 17, p3n1p2 n
The thyristor consisting of the parts is not cut off and continues to flow at a certain constant value even after time t2.

At time ill t , before vo rises, a voltage sufficient to turn off transistor 7 is not applied to terminals 6 and 7, so when voltage o rises, thyristor 15 has already been turned off.
A large number of carriers exist in n, and in this state, when the rising edge of the next pulse of voltage vo arrives at time t3, dV/dt of the rising edge of l
. . . Even if the voltage is small, the thyristor 15 easily fires and does not prevent reverse breakdown voltage as shown by the dotted line. This phenomenon makes the dv/dt withstand capacity of the thyristor switch 16 appear to be very low compared to 'LJt', and it appears as if the noise resistance performance of the thyristor switch 16 has deteriorated.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and to provide a method and apparatus that can reliably measure the dv/dt resistance of a thyristor switch.

The features of the present invention that achieve the above object are as follows:
A ramped voltage with an arbitrarily selected gradient is repeatedly applied between the anode and cathode of one thyristor, and after the gradient voltage has finished falling, the residual charge of the thyristor is removed, and after the gradient d voltage has finished falling, the above The current between the thyristor and the circuit that detects the ON state of the thyristor is made zero, and it is determined whether or not the thyristor fires based on the slope voltage of the predetermined slope. The objective is to measure dt tolerance.

Once a thyristor switch with an on-state detection function is turned on, it is not possible to accurately measure the dv/dt tolerance by controlling the voltage of only the main terminal, so vo was applied once in synchronization with the external voltage vo. After that, the thyristor must be completely shut off each time. For this purpose, the current ick pulse vo for detecting the on state may be set to zero by some means after the fall of the current ick pulse vo is completed. In the present invention, in order to realize this, the source voltage 13 is set to zero.

FIG. 7 shows a principle diagram of the circuit configuration of the present invention. In the figure, the same numbers are given to the same components as those described above. 22 is a means for cutting off the power supply voltage 13 for a certain period of time, and is represented by a switch or the like.

FIG. 8 shows the temporal flow (time sequence) 1r of each waveform in the present invention. Signal v,), VA, VC.

(9) iA and ic have the same names as before.

Signal S is the switch 220 control signal.

Waveform time t. , tl, . . . , t are the same times as in the conventional example. Time t. The waveform between t2 and t2 is the same as the conventional example shown in FIG. When the signal S turns off at this point, the power supply voltage 22 is disconnected at this point, and the current i (H becomes zero.) If the power supply cutoff time is made sufficiently longer than the time required for the thyristor to cut off, the thyristor 15 can be reliably cut off. When the power supply voltage 13 is turned on at time '22, the thyristor 15 is in the off state at this time, so it will not fire.Therefore,
From time t22 onwards is time t. Q
Even if the pulse bottom pressure vo arrives at time t, the dv/dt load capacity will not be low, allowing accurate measurement of the load capacity for one shift.

A first embodiment of the invention will be described below with reference to FIG. Figure 10 shows the time sequence at this time. The circuitry around the semiconductor switch 21 in the figure is the same as the conventional example shown in FIG. 25 is a pulse signal (10) generator which generates a clock pulse CP which is the time standard of this measurement system. The evaluation pulse voltage vo, which is a ramp voltage, is generated by the dv/dt tolerance measurement pulse rotation voltage generation circuit 23. The clock pulse CP is connected to the waveform conversion circuit 24 in the pulse voltage generation circuit 23 for dv/dt tolerance measurement.
The circuit 24 converts the waveform of the CP pulse as input and outputs the waveform found at vo.

26.27 is also a waveform conversion circuit, clock pulse CP
The control signal ■c and the switch control signal Vz' are outputted from the control signal c and the switch control signal Vz'. At this time, the pulse of the control immediate signal VC is generated by inputting a clock pulse delayed until after the rise of the evaluation pulse voltage vo is completed, and the pulse of the switch control signal vEv'i is generated after the rise of vo is completed. By inputting the clock pulse CPffi delayed until after the hidden pressure vO has completed falling 9, the vo
After the completion of falling, the voltage becomes zero V for a certain period (t2. to t22).

Temporal control of VC and vB is performed within the waveform conversion circuit 26°2γ. The circuits 24, 26 and 27 are constituted by logic elements, such as one-shot multi-byte (,11) break and gate elements.

In the present embodiment, since the circuit configuration is surrounded by the cooking element, it is expected that economical efficiency will be improved. Furthermore, since the switch operation is electronic, high-speed operation can be expected.

Section 11 shows 6132 embodiments of the present invention. The same reference numerals as in FIG. 9 indicate the same *i equivalents. The switch control signal VE is applied to the transistor switch 28, and its output becomes VE1 and is applied to the terminals 9 and 20. The transistor switch 28 is switched on and off when the edge control signal E is at a high level (for example, about 5'V).
l will also be at a high level, and VE will be at a low level (for example, approximately zero V
), VEL also becomes 4V and acts as a switch.

This embodiment has the advantage that even if the currents flowing through the terminals 9 and 20 are relatively large, the measurement operation can be carried out reliably.

FIG. 12 shows a third embodiment of the present invention. In FIG. 12, the same symbols as in FIG. 4 indicate the same parts.

In addition, a pulse voltage generation circuit (12
) 23. Waveform conversion circuit 24. ．． 26, 27, and the pass signal generator 25 are the same as those shown in FIG. 9, and will therefore be omitted. Further, the omitted circuits may be the same as those in FIG. 11.

In this case, the transistor 1 constituting the on-detection circuit
The collector of a transistor 29 is connected to one end of the resistor 18 connected to the base of the transistor 7, and this transistor 29 is used as a switch. That is, the switch control signal V
E'! Transistor 2 as Z level (high voltage level)
9, the transistor 29 is turned on, and the on-state detection circuit is in an operating state. When the signal VE becomes 0 level (close to zero V), the transistor 29 is cut off, the on-state detection circuit is cut off, the current flowing to the thyristor 15 becomes zero, and at this point the thyristor 15 is definitely cut off. .

In this embodiment, a current blocking transistor 29 is built into the semiconductor switch 21', and has the advantage that it can be integrated at the same time. Further, the ff1lJ control terminal 30 used for measuring the dv/dt withstand capability of the switch 16 can be actively used for other purposes, for example, for controlling the on-state detection circuit in device design.

FIG. 13 shows a fourth embodiment of the present invention. In this example,
1. Output of the semiconductor switch 21'' in the on state.
1. ! ] A solder or a necessary transistor 31 is provided at the collector of the transistor 17 in the path, and when the on state is detected, the transistor 31 is blocked (at this time, the signal VE is at a low level), and the current for the on state and danger is passed. Y: When it is desired to pray, the transistor 31 is turned on (VE is at a high level at this time), and the collector current i c f from the transistor 17 is made to flow into the collector of the transistor 31. With the above operation, the current IC flowing into the thyristor 15 is eliminated, and the thyristor 15 can be shut off reliably.

As described above, according to the present invention, it is possible to reliably measure the dv/d withstand capacity of a thyristor switch having on-state detection capability, and the characteristics of the manufactured element (14) can be accurately grasped. can help improve quality.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of a conventional thyristor, Fig. 2 is a measurement circuit diagram for evaluating noise resistance performance, Fig. 3 is a diagram showing waveforms used in the circuit of Fig. 2, and Fig. 4 is a diagram of a conventional thyristor. A circuit diagram of the thyrisk switch to be measured, Fig. 5 is a diagram showing the evaluation method of noise resistance performance using the conventional method, Fig. 6 is a diagram showing the waveform in Fig. 5, and Fig. 7 is a diagram of the principle of the present invention. , Figure 8 is the 7th
FIG. 9 is a diagram showing the first embodiment of the present invention. FIG. 10 is a diagram showing the waveform in FIG. 9. FIG. 11 is an embodiment of π2 of the present invention. Figure 12 showing
The figure shows a third embodiment of the invention, and FIG. 13 shows a fourth embodiment of the invention. 1, 15... Thyristor, 16... Thyrisk switch, 6.7... Switch terminal, 21... Semiconductor switch (15) Required ll¥J /l Figure 2 3fJ Easy 4 times Silk C Eye 14 2 Otsu mouth 7EI 4 sticky g i word /2 super 13th country 21″

Claims (1)

[Claims] N1 of the thyristor 1 , P , Nr P 2 N2
or dv/ of a thyrisk switch including P3 or Nsk formed adjacent to P2 and separated from P or N2 and connected to a circuit that detects the entire on state of the thyristor.
In the dt withstand measurement method, the step of repeatedly applying a gradient voltage of an arbitrarily selected slope between the anode and cathode of the thyristor, and removing the remaining load of the thyristor after the rising of the gradient voltage is completed. and a step of zeroing the current between the thyristor and a circuit for detecting the on state of the thyristor after the ramp voltage has completed falling;
A method for measuring the dv/dt resistance of a thyristor switch, comprising the steps of determining whether the thyristor fires due to the slope voltage, and measuring the dv/dt resistance of the thyristor based on the slope of the slope voltage. . 2, adjacent to N, (or P2) of the thyristor of P Il'l IP 2 N2, and adjacent to Pl (or N
P3 (or Ns)'t- is formed apart from 2J and connects to the circuit that detects the entire on state of the thyristor.
A thyristor switch dv/dt withstand capability measuring device includes: pulse signal generating means for generating a clock pulse; means for repeatedly applying a ramp voltage having an arbitrarily selected slope between the anode and cathode of the thyristor; means for applying the firing pulse to the gate of the thyristor using the clock pulse delayed until after the rising of the ramp voltage is completed; A means for zeroing out the current between the thyristor and a circuit that detects the ON state of the thyristor, and a means for determining whether the thyristor fires due to the slope voltage, and calculates the dv/ of the thyristor using the slope of the slope voltage. 1. A dv/dt durability measuring device for a thyrisk switch, comprising means for measuring dt tolerance.