JPS5810885B2 - Enzanzou Fukuki no Shiyunji Danzoku Cairo - Google Patents
Enzanzou Fukuki no Shiyunji Danzoku CairoInfo
- Publication number
- JPS5810885B2 JPS5810885B2 JP49044175A JP4417574A JPS5810885B2 JP S5810885 B2 JPS5810885 B2 JP S5810885B2 JP 49044175 A JP49044175 A JP 49044175A JP 4417574 A JP4417574 A JP 4417574A JP S5810885 B2 JPS5810885 B2 JP S5810885B2
- Authority
- JP
- Japan
- Prior art keywords
- input terminal
- operational amplifier
- capacitor
- resistor
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Electronic Switches (AREA)
- Amplifiers (AREA)
Description
【発明の詳細な説明】
この発明は演算増幅器の瞬時断続回路に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an instantaneous intermittent circuit for an operational amplifier.
従来、−電源により演算増幅器のバイアスを変化させ入
力信号を断続させる場合、第１図において、電源スィッ
チ７を閉じたとき、直流阻止用コンデンサ４と利得決定
用の抵抗器５ならびに６とによる時定数により演算増幅
器が動作状態になるまで相当の時間を要する。Conventionally, when the input signal is intermittent by changing the bias of an operational amplifier using a power supply, as shown in FIG. Due to the constants, it takes a considerable amount of time for the operational amplifier to become operational.
これは演算増幅器８で低い周波数まで増幅しようとする
場合には、コンデンサ４は大きな容量値を持つ必要であ
り、その結果、必然的に時定数が長（なってこうした問
題が生じるわけである。This is because when the operational amplifier 8 is intended to amplify to a low frequency, the capacitor 4 must have a large capacitance value, and as a result, the time constant is inevitably long (this is why this problem occurs).
従来、これを解決するには、時定数を短縮する以外困難
であった。Conventionally, the only way to solve this problem was to shorten the time constant.
この発明の目的は、前述のような従来の演算増幅器にお
ける、バイアスの変化に伴う、動作状態になるまでの時
間のかかり過ぎと云う欠点を完全に除去することである
。An object of the present invention is to completely eliminate the drawback of conventional operational amplifiers, such as the fact that it takes too long to come into operation due to bias changes.
本発明によれば、常時電源が供給されており、第１の入
力端子、第２の入力端子、出力端子および前記第２の入
力端子と出力端子との間に設けられた帰還抵抗増幅器に
おいて、前記第２の入力端子に接続されるコンデンサの
両端にダイオードと抵抗器との直列回路を接続し、前記
ダイオードと抵抗器の接続点と前記電源間にスイッチを
設け、前記スイッチの開閉に応動して前記コンデンサに
貯えられた電荷量を変化させずに前記演算増幅器の増幅
機能を制御して、前記第１の入力端子に供給されあるい
は前記第２の入力端子に前記コンデンサを介して供給さ
れる入力信号を前記出力端子に断続して出力することを
特徴とする演算増幅器の瞬時断読回路が得られる。According to the present invention, in the feedback resistance amplifier to which power is always supplied and which is provided between the first input terminal, the second input terminal, the output terminal, and the second input terminal and the output terminal, A series circuit of a diode and a resistor is connected to both ends of the capacitor connected to the second input terminal, and a switch is provided between the connection point of the diode and the resistor and the power supply, and the circuit responds to opening and closing of the switch. control the amplification function of the operational amplifier without changing the amount of charge stored in the capacitor, and supply the charge to the first input terminal or the second input terminal via the capacitor. There is obtained an instantaneous interrupt reading circuit for an operational amplifier, which is characterized in that it outputs an input signal to the output terminal intermittently.
以下、図面にしたがってこの発明の詳細な説明する。The present invention will be described in detail below with reference to the drawings.
まず、第２図はこの発明を（−）接地の同相増幅器とし
た具体的な実施例を示すもので、スイッチ７が開かれて
いるとき、演算増幅器８は動作状態にあり、コンデンサ
４に加わる電圧は演算増幅器８の直流の入力インピーダ
ンスが抵抗器６のそれより充分に大きく、かつ２個の抵
抗器２と３とのそれぞれの抵抗値が等しいと仮定すれば
、演算増幅器８のＯＵＴ端子に出ている電圧はＶｃｃ／
２と等しくなり、またそのコンデンサ４に加わる直流電
圧の極性は図に示すとおりとなる。First, FIG. 2 shows a specific embodiment of the present invention as a (-) grounded in-phase amplifier. When the switch 7 is open, the operational amplifier 8 is in an operating state, and the voltage applied to the capacitor 4 is Assuming that the DC input impedance of the operational amplifier 8 is sufficiently larger than that of the resistor 6, and that the resistance values of the two resistors 2 and 3 are equal, the voltage will be applied to the OUT terminal of the operational amplifier 8. The output voltage is Vcc/
2, and the polarity of the DC voltage applied to the capacitor 4 is as shown in the figure.
つぎにスイッチ７を閉じると、ダイオード１０を通して
電源電圧Ｖｃｃが演算増幅器８の入力端子に加わる。Next, when switch 7 is closed, power supply voltage Vcc is applied to the input terminal of operational amplifier 8 through diode 10.
電圧が加わると同時に、演算増幅器８は飽和して増幅機
能が停止する。As soon as the voltage is applied, the operational amplifier 8 is saturated and its amplification function is stopped.
またこのとき抵抗器９を通してコンデンサ４のアース側
にＶｃｃ／２の電圧がかかるように抵抗器９の抵抗値を
選ぶのであるが、この実施例では抵抗器５と同じ抵抗値
にすればよい。At this time, the resistance value of the resistor 9 is selected so that a voltage of Vcc/2 is applied to the ground side of the capacitor 4 through the resistor 9, but in this embodiment, the resistance value may be the same as that of the resistor 5.
これによりコンデンサ４の両端にはスイッチ７が開かれ
ている状態下と同様の電圧が加わるので、演算増幅器８
の動作状態と同じ電荷量がコンデンサ４に貯えられるこ
とになる。As a result, the same voltage as when the switch 7 is open is applied across the capacitor 4, so the operational amplifier 8
The same amount of charge as in the operating state will be stored in the capacitor 4.
ついでスイッチ７をオンからオフにしたとき、スイッチ
オンの状態下と同様の電圧ならびに極性がコンデンサ４
に加わっているため増幅機能は瞬時に回復する。Then, when the switch 7 is turned from on to off, the voltage and polarity on the capacitor 4 are the same as when the switch is on.
The amplification function is restored instantly.
以上はダイオード１０の順方向電圧を無視した場合であ
る。The above is a case where the forward voltage of the diode 10 is ignored.
以上に述べた回路において抵抗器９を適当に選べば任意
の時間で増幅機能を回復させることができる。In the circuit described above, if the resistor 9 is appropriately selected, the amplification function can be restored at any time.
第３図はこの発明を（−）接地の逆相増幅器として使用
した具体的な例である。FIG. 3 shows a specific example in which the present invention is used as a (-) grounded negative phase amplifier.
この場合抵抗器９の値は抵抗器５の値に信号源の抵抗器
１１を加えたものにしなげればならない。In this case, the value of resistor 9 must be the value of resistor 5 plus the value of resistor 11 of the signal source.
なお、接地の極性が反対のときはダイオード１０の向き
を反対にして、なおかつスイッチ７によって加えられる
電圧を（−）電源にすれば前述のことが容易に実現され
る。Incidentally, when the polarity of the ground is opposite, the above-mentioned can be easily realized by reversing the direction of the diode 10 and making the voltage applied by the switch 7 the (-) power source.
第１図は従来の演算増幅器の断続回路を示す図、第２図
および第３図はこの発明による演算増幅器の瞬時断続回
路のそれぞれ別の実施例を示す図である。
４・・・・・・コンデンサ、５，６・・・・・・抵抗器
、７・・・・・・スイッチ、８・・・・・・演算増幅器
、９・・・・・・抵抗器、１０・・・・・・ダイオード
。FIG. 1 is a diagram showing a conventional operational amplifier intermittent circuit, and FIGS. 2 and 3 are diagrams showing different embodiments of the instantaneous operational amplifier instantaneous intermittent circuit according to the present invention. 4... Capacitor, 5, 6... Resistor, 7... Switch, 8... Operational amplifier, 9... Resistor, 10...Diode.
Claims (1)
の入力端子、出力端子および前記第２の入力端子と出力
端子間に設けられた帰還抵抗器を有する演算増幅器にお
いて、前記第２の入力端子に接続されるコンデンサの両
端にダイオードと抵抗器との直列回路を接続し、前記ダ
イオードと抵抗器の接続点と前記電源間にスイッチを設
け、前記スイッチの開閉に応動して前記コンデンサに貯
えられた電荷量を変化させずに前記演算増幅器の増幅機
能を制御して、前記第１の入力端子に供給されあるいは
前記第２の入力端子に前記コンデンサを介して供給され
る入力信号を前記出力端子に断続して出力することを特
徴とする演算増幅器の瞬時、断続回路。1 Power is always supplied, and the first input terminal and the second
In the operational amplifier having an input terminal, an output terminal, and a feedback resistor provided between the second input terminal and the output terminal, a diode and a resistor are connected to both ends of a capacitor connected to the second input terminal. A series circuit is connected, a switch is provided between the connection point of the diode and the resistor, and the power supply, and the amplification function of the operational amplifier is achieved without changing the amount of charge stored in the capacitor in response to opening and closing of the switch. of the operational amplifier, wherein the input signal supplied to the first input terminal or the second input terminal via the capacitor is intermittently outputted to the output terminal. Instantaneous, intermittent circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP49044175A JPS5810885B2 (en) | 1974-04-19 | 1974-04-19 | Enzanzou Fukuki no Shiyunji Danzoku Cairo |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP49044175A JPS5810885B2 (en) | 1974-04-19 | 1974-04-19 | Enzanzou Fukuki no Shiyunji Danzoku Cairo |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS50137646A JPS50137646A (en) | 1975-10-31 |
| JPS5810885B2 true JPS5810885B2 (en) | 1983-02-28 |
Family
ID=12684232
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP49044175A Expired JPS5810885B2 (en) | 1974-04-19 | 1974-04-19 | Enzanzou Fukuki no Shiyunji Danzoku Cairo |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5810885B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0356694U (en) * | 1989-09-30 | 1991-05-30 |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0701324B1 (en) * | 1993-09-17 | 2000-12-27 | Oki Electric Industry Company, Limited | Clock multiplying signal control circuit |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4841653A (en) * | 1971-09-27 | 1973-06-18 |
-
1974
- 1974-04-19 JP JP49044175A patent/JPS5810885B2/en not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4841653A (en) * | 1971-09-27 | 1973-06-18 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0356694U (en) * | 1989-09-30 | 1991-05-30 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS50137646A (en) | 1975-10-31 |
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