JPS58105589A - Printed circuit board - Google Patents
Printed circuit boardInfo
- Publication number
- JPS58105589A JPS58105589A JP20466681A JP20466681A JPS58105589A JP S58105589 A JPS58105589 A JP S58105589A JP 20466681 A JP20466681 A JP 20466681A JP 20466681 A JP20466681 A JP 20466681A JP S58105589 A JPS58105589 A JP S58105589A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- printed wiring
- circuit board
- printed circuit
- cross
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Structure Of Printed Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
この発明は、印刷配線用の基板部材上に印刷技術を利用
して配線を形成する印刷配線基板特に基板部材上に形成
された配線用のパターンの形状に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a printed wiring board in which wiring is formed on a board member for printed wiring using printing technology, and particularly to the shape of a pattern for wiring formed on a board member. .
従来のこの種印刷配線基板は、第1図および第2図に示
すように構成されていた。即ち、第1図および第2図に
おいて、(1)は基板部材、(2)(8)は電子部材等
を挿入するための穴、(4) 16)は穴(2) (8
)の回りに設けらねたランド、(6)はランド(4)(
5)の間に配置された配線用のノシターンである。ここ
で、ノぐターン(6)は基板部材(1)の表面上にメッ
キ等の方法を用いて薄い導体箔を作ることにより形成さ
れる。Conventional printed wiring boards of this type have been constructed as shown in FIGS. 1 and 2. That is, in FIGS. 1 and 2, (1) is a board member, (2) and (8) are holes for inserting electronic components, etc., and (4) 16) are holes (2) (8).
), the land (6) is located around the land (4) (
5) is a nositane for wiring placed between. Here, the nog turn (6) is formed by forming a thin conductive foil on the surface of the substrate member (1) using a method such as plating.
従ってパターン(6)の断面積はパターン幅に比例する
。Therefore, the cross-sectional area of the pattern (6) is proportional to the pattern width.
このよう[111&された従来の印刷配線基板は、間隔
の狭いランド間にパターンを配置する場合等には、パタ
ーン幅を細くする必要があり、従ってパターンの断面積
も小さくなる。この喪め大きな電流を流すことができな
かったり、パターンが切れやすいなどの欠点があった。In such a conventional printed wiring board with [111&], when a pattern is arranged between lands with narrow intervals, it is necessary to make the pattern width narrower, and therefore the cross-sectional area of the pattern also becomes smaller. This method had drawbacks such as not being able to pass a large current and the pattern being easily cut.
この発明は、このような従来のものの欠点を除去するた
めになされたもので、印刷配線用の基板部材上に溝切り
、穴明けなどの加工を施した上にパターンを形成するこ
とにより、パターン幅を大きくすることなくパターン断
面積を広くしようとするものである。This invention was made in order to eliminate the drawbacks of such conventional products, and it is possible to create a pattern by forming a pattern on a board member for printed wiring by performing processing such as cutting grooves and drilling holes. This attempts to widen the cross-sectional area of the pattern without increasing the width.
以下この発明の一実施例を第8図および第4図にもとづ
いて説明する。即ち第8図および第4図において、(7
)はパターンの断面積を拡げるための基板部材(1)に
形成されたV字形の溝、(8)は溝(7)の表面に形成
され念パターンである。なお、その他の構成Fi@1図
および@2図に示すものと同様であるので説明を省略す
る。An embodiment of the present invention will be described below with reference to FIGS. 8 and 4. That is, in FIGS. 8 and 4, (7
) is a V-shaped groove formed on the substrate member (1) to enlarge the cross-sectional area of the pattern, and (8) is a virtual pattern formed on the surface of the groove (7). Note that the other configurations are the same as those shown in Figures Fi @1 and Figures @2, so the explanation will be omitted.
このようKl成されたものでは、同じパターン幅をもつ
従来構造の第1図に示すパターン(6)に比べて断面積
を大きくすることができる。このため比較的大きい電流
を流しても電圧降下やパターン焼損の心配がなく、ま九
温度変化による膨張収縮や振動などの応力に対しても切
れにくいパターンが得られる。With such a structure, the cross-sectional area can be made larger than that of the pattern (6) shown in FIG. 1, which has the same pattern width and has a conventional structure. Therefore, there is no fear of voltage drop or pattern burnout even when a relatively large current is passed, and a pattern that is resistant to breakage due to stress such as expansion and contraction due to temperature changes and vibrations can be obtained.
なおこの実施例では、パターン断面積の拡張手段として
印刷配線用基板に溝を設けた場合について説明したが、
第6図に示す如く基板部材(1)に細長い穴(9)を設
け、この穴(9)の表面にパターン(8)を形成しても
よく、また第6図に示す如く基板部材11) K薄い板
QOt−立てこの板四の表面にパターン(8)を形成し
てもよい。いずれの場合もパターンヲ立体的に形成する
ことによって、パターンの断面積を広げることができる
。In this example, a case was explained in which grooves were provided in the printed wiring board as a means for expanding the cross-sectional area of the pattern.
As shown in FIG. 6, an elongated hole (9) may be provided in the substrate member (1), and a pattern (8) may be formed on the surface of the hole (9), or as shown in FIG. A pattern (8) may be formed on the surface of the thin plate QOt-stand. In either case, by forming the pattern three-dimensionally, the cross-sectional area of the pattern can be increased.
上記のようにこの発明による印刷配線基板は基板部材に
形成された凹部ま九は凸部の表面にパターンを形成し念
もので、パターンの電流容量の増大等性能が向上する0As mentioned above, in the printed wiring board according to the present invention, the concave portions formed on the board member are designed to form a pattern on the surface of the convex portions, and the performance such as an increase in the current capacity of the pattern is improved.
第1図は従来のこの種印刷配線基板の平面図、第2図は
第1図1−11断面図、第8図はこの発明の一実施例を
示す平面図、第4図は第8図■−■線断面図、第5M!
ffおよび第6図はいずれもこの発明の他の実施例を示
す断rM図である。
図中、(1)$1基板部材、(2)(8)は穴、(4)
+5)はランド、(6) (8)はパターン、(7)
は溝、(g)は穴、aOけ板である。
尚、図中同一符号は同−又は相当部分を示す。
代理人 葛 野 信 −FIG. 1 is a plan view of a conventional printed wiring board of this type, FIG. 2 is a sectional view taken along line 1-11 of FIG. 1, FIG. 8 is a plan view showing an embodiment of the present invention, and FIG. ■-■ line cross section, 5th M!
ff and FIG. 6 are both sectional rM diagrams showing other embodiments of the present invention. In the figure, (1) $1 board member, (2) (8) is hole, (4)
+5) is a land, (6) (8) is a pattern, (7)
is a groove, (g) is a hole, and is an aO plate. Note that the same reference numerals in the figures indicate the same or equivalent parts. Agent Shin Kuzuno −
Claims (2)
または凸部の表面に形成されたパターンを備えた印刷配
線基板。(1) A printed wiring board comprising a recess or a projection formed on a substrate member and a pattern formed on the surface of the recess or projection.
る特許請求の範囲第1項記載の印刷配線基板。(2) The printed wiring board according to claim 1, wherein the recess formed in the substrate member is a groove or fc is a hole.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20466681A JPS58105589A (en) | 1981-12-17 | 1981-12-17 | Printed circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20466681A JPS58105589A (en) | 1981-12-17 | 1981-12-17 | Printed circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58105589A true JPS58105589A (en) | 1983-06-23 |
Family
ID=16494269
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP20466681A Pending JPS58105589A (en) | 1981-12-17 | 1981-12-17 | Printed circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58105589A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0562069U (en) * | 1992-01-28 | 1993-08-13 | 日本電子機器株式会社 | Printed wiring board |
JPH0637205A (en) * | 1992-07-16 | 1994-02-10 | Kyocera Corp | Ceramic wiring substrate |
-
1981
- 1981-12-17 JP JP20466681A patent/JPS58105589A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0562069U (en) * | 1992-01-28 | 1993-08-13 | 日本電子機器株式会社 | Printed wiring board |
JPH0637205A (en) * | 1992-07-16 | 1994-02-10 | Kyocera Corp | Ceramic wiring substrate |
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