JPS58104193A - Production of gold plating film - Google Patents
Production of gold plating filmInfo
- Publication number
- JPS58104193A JPS58104193A JP20124981A JP20124981A JPS58104193A JP S58104193 A JPS58104193 A JP S58104193A JP 20124981 A JP20124981 A JP 20124981A JP 20124981 A JP20124981 A JP 20124981A JP S58104193 A JPS58104193 A JP S58104193A
- Authority
- JP
- Japan
- Prior art keywords
- plating film
- pinholes
- plating
- gold plating
- gold
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electroplating And Plating Baths Therefor (AREA)
- Electroplating Methods And Accessories (AREA)
- Manufacture Of Switches (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、電子機器に用いるコネクタやスイッチの表面
処理に係り、特に接点部の比較的薄り金（Ａｕ）ａ６つ
き膜の製造方法に関する０コネクタやスイッチの接点と
してのＡｎめっき膜のめっき厚さは、従来１〜０．５μ
ｍが最小とされている０これよ）薄くできない理由はめ
つきが薄いほどそれに内在するピンホールにより下地金
属の腐食が生じやすいとという欠点があるためであるＯ
ところで、このような薄いめっき膜の製造方法としては
従来、所定のめつき厚さとすゐために、一定のめっき時
間だけ連続して通電することによ）、めっＩＩＩを形成
する方法がとられていた。この方法によると上述の如き
ピンホールのためにめっＩｌｌの薄膜化が最下限１〜０
．５μｍとなる◎本発明は上述の点に鑑みてなされた屯
のでめっき膜の形成において、めっき通電時間を２回以
上に分割して行って、めっき膜を多層化することによ〕
、全体のめっき膜として、下地材に貫通すみピンホール
の数を実質的に減少させた耐食性の優れためっき膜の製
造方法を提供する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to surface treatment of connectors and switches used in electronic devices, and in particular relates to a method of manufacturing a relatively thin film coated with gold (Au) a6 at the contact portion. Conventionally, the plating thickness of the An plating film is 1 to 0.5μ.
The reason m cannot be made thinner is that the thinner the plating, the more likely it is that the underlying metal will corrode due to the inherent pinholes. Conventionally, the manufacturing method has been to form plating III by continuously applying electricity for a certain plating time in order to achieve a predetermined plating thickness. According to this method, due to the pinholes mentioned above, the thickness of the plate Ill can be reduced to a minimum of 1 to 0.
．． 5 μm ◎The present invention was made in view of the above points, so in forming a plating film, the plating current application time is divided into two or more times to form a multilayer plating film]
The present invention provides a method for producing a plating film having excellent corrosion resistance in which the number of pinholes penetrating the base material is substantially reduced as a whole plating film.
本発明蝶めっき膜の形成において、めっき通電時間を２
回以上に分割して行うことを特徴とす↓０これＫよ〕、
第１回目の通電により形成するめっき膜のピンホールと
第２回目以降に形成させゐめっ＊＊＊のピンホールとは
必ずしもその位蓋が一致するとは必らず、従ってめっき
層全体としては、下地材まで貫通して腐食の原因となり
やすい、いわゆるピンホールの数が実質的に減少するも
のでＴｏゐ・
以下本発明をシん青銅上にＡｕｂつきを行う場台を九と
して図を参照して説明する。In the formation of the butterfly plating film of the present invention, the plating current application time is 2
It is characterized by being divided into more than one time ↓0 This is K],
The pinholes in the plating film formed by the first energization and the pinholes in the plating *** formed in the second and subsequent times do not necessarily match, and therefore the plating layer as a whole This will substantially reduce the number of so-called pinholes, which tend to penetrate through to the base material and cause corrosion.Hereinafter, the present invention will be applied to thin bronze on the basis of 9, and the figure will be referred to. and explain.
実態め
以上の条件によｌＩｈ成した試料を１０ｐｐｍのＨ■Ｓ
を含むＮ嘗８Ｇ’１Ｇ−０＊２０％雰囲気中相対湿！［
９Ｇ％ＲＨ室温の□”−食雰囲気中に放れ、め−き表面
での腐食点の数を光学顕微鏡により倍率３２０倍にて検
鏡してカウントした◎結果を図に示す・図は縦軸にピン
ホール数（ｍ１５１０１”）、横軸に腐食雰囲気保持時
間（Ｈ）でプロットした。放置２００時間付近より腐食
点（ピンホール）の数に著しい差があらはれる。っま力
、２回に分けてめっきした試料（点線Δ・・・曲・・Δ
）の方が１回でめっきした試料（実線０＝０ ）よりも
同一のめっき厚であシながら腐食点の発生が少い◎本発
明によれば、高価な金ＪＩＩ８用いる為め９き厚を１μ
ｍ程度と薄くした場合にも実質的にめっき膜の中Ｋｔま
れるピンホールの数を減少させることができるので、め
つき膜の耐食性向上の効果がある。A sample prepared under the conditions described above was added to 10 ppm H■S.
Contains N嘗8G'1G-0*20% relative humidity in the atmosphere! [
9G%RH was released into the food atmosphere at room temperature, and the number of corrosion points on the plated surface was counted using an optical microscope at 320x magnification.The results are shown in the figure.The figure is on the vertical axis. The number of pinholes (m15101") is plotted on the horizontal axis, and the corrosive atmosphere retention time (H) is plotted on the horizontal axis. A significant difference in the number of corrosion points (pinholes) appears after approximately 200 hours of standing. Sample plated twice (dotted line Δ... curve... Δ
) has fewer corrosion points than the sample plated in one step (solid line 0 = 0) even though the plating thickness is the same 1μ
Even when the thickness is made as thin as approximately m, the number of pinholes in the plating film can be substantially reduced, which has the effect of improving the corrosion resistance of the plating film.
図は本発明と従来法とを比較した実施例を示す図である
。The figure is a diagram showing an example in which the present invention and a conventional method are compared.
Claims (1)
方法において、少くとも二回以上の通電切断を行って、
所定の厚さのめっき膜を形成せしめることを特徴とする
金めつき膜の製造方法０In a method of forming a gold-plated film of a predetermined thickness by electroplating, carrying out energization cutting at least twice,
Method 0 for producing a gold plating film characterized by forming a plating film with a predetermined thickness
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20124981A JPS58104193A (en) | 1981-12-14 | 1981-12-14 | Production of gold plating film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20124981A JPS58104193A (en) | 1981-12-14 | 1981-12-14 | Production of gold plating film |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58104193A true JPS58104193A (en) | 1983-06-21 |
Family
ID=16437804
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20124981A Pending JPS58104193A (en) | 1981-12-14 | 1981-12-14 | Production of gold plating film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58104193A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5583379A (en) * | 1993-09-03 | 1996-12-10 | Ngk Spark Plug Co., Ltd. | Outer lead for a semiconductor IC package having individually annealed plated layers |
-
1981
- 1981-12-14 JP JP20124981A patent/JPS58104193A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5583379A (en) * | 1993-09-03 | 1996-12-10 | Ngk Spark Plug Co., Ltd. | Outer lead for a semiconductor IC package having individually annealed plated layers |
| US5668060A (en) * | 1993-09-03 | 1997-09-16 | Ngk Spark Plug Co., Ltd. | Outer lead for a semiconductor IC package and a method of fabricating the same |
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