JPS58103633A - Semiconductor pressure transducer - Google Patents

Semiconductor pressure transducer

Info

Publication number
JPS58103633A
JPS58103633A JP20148981A JP20148981A JPS58103633A JP S58103633 A JPS58103633 A JP S58103633A JP 20148981 A JP20148981 A JP 20148981A JP 20148981 A JP20148981 A JP 20148981A JP S58103633 A JPS58103633 A JP S58103633A
Authority
JP
Japan
Prior art keywords
layer
epitaxial layer
insulating
sapphire substrate
pressure transducer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20148981A
Other languages
Japanese (ja)
Inventor
Haruo Yamauchi
山内 治男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Azbil Corp
Original Assignee
Azbil Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Azbil Corp filed Critical Azbil Corp
Priority to JP20148981A priority Critical patent/JPS58103633A/en
Publication of JPS58103633A publication Critical patent/JPS58103633A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01LMEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L9/00Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means
    • G01L9/0041Transmitting or indicating the displacement of flexible diaphragms
    • G01L9/0042Constructional details associated with semiconductive diaphragm sensors, e.g. etching, or constructional details of non-semiconductive diaphragms

Abstract

PURPOSE:To simplify an insulating and supporting structure, by forming semiconductor epitaxial layers on both surfaces of a sapphire substrate and forming an insulating layer acting as a solid electrolyte at high temp. on the side of the surface to be joined to a support. CONSTITUTION:Piezoresistance elements 2 consisting of silicon expitaxial layers are formed on the surface of a sapphire substrate 1, and a surface protective insulating film 3 consisting of SiO2 is provided thereon; at the same time, electrodes 4 of the elements 2 are formed. A silicon epitaxial layer 5 is provided on the rear surface of the substrate 1 and is thermally oxidized to form an SiO2 layer 6. Electrodes 8 contacting with the epitaxial layer by penetrating the layer 6 are provided. Voltage is applied to a metallic support 7 as anode and the electrodes 8 as cathode, to join the support 7 electrostatically to the layer 6, whereby a diaphragm part 1a is formed. Thus the insulating and supporting structure part is simplified.

Description

【発明の詳細な説明】 本発明は、サファイア基板からなるダイヤフラムを備え
た半導体圧力変換11KIllするものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention is a semiconductor pressure transducer 11KIll equipped with a diaphragm made of a sapphire substrate.

一般に、シリコン基板を用−たカップダイヤフラム型の
圧力変換器は、圧力検出器としてパッケージングする場
合、その金属ハウジングとの関に何らかの電気的結像手
段を施す必要がある。これは、圧力検出器として要求さ
れる耐電圧が5oov(Do)[1度であるのに一対し
、半導体のPN接合自体の破壊電圧は通常10〜−to
’ov@JJi!であることによる。
Generally, when a cup diaphragm type pressure transducer using a silicon substrate is packaged as a pressure sensor, it is necessary to provide some kind of electrical imaging means in relation to the metal housing. This is because while the withstand voltage required for a pressure detector is 5oov (Do) [1 degree, the breakdown voltage of the semiconductor PN junction itself is usually 10~-to
'ov@JJi! By being.

この場合、上記絶縁手段は、当然のことながら、この部
分が圧力変換器にヒステリシス、温度l1II性等の悪
影響を及ぼすことがないようにする観点から材料的、構
造的に制約され、サファイア基板にシリコンをヱピタキ
シャル成長させてなるダイヤフラムを用い九場合におい
ても、従来上記サファイア1竺自体を金属ハウジングと
の絶縁手段として用いるには至らず、ガラス支持体を介
在させてiる。
In this case, the above-mentioned insulating means is, of course, subject to material and structural constraints in order to prevent this portion from having any adverse effects on the pressure transducer, such as hysteresis and temperature l1ll characteristics. Even when using a diaphragm formed by epitaxially growing silicon, conventionally the sapphire strip itself has not been used as an insulation means from the metal housing, but a glass support has been used.

本発明は、以上のような状況に鑑みてなされ九ものであ
り、その目的は、サファイア基板からなるiイヤフラム
と金属ハウジングとの間の絶縁支持構造を簡略化した半
導体圧電変換器を提供することにある@ このような目的を達成するために、本発明は、サファイ
ア基板の両面に半導体エピタキシャル層を形成し、第1
のエピタキシャル層でピエゾ抵抗素子を形成すると共に
、第2のエピタキシャル層上に高温で固体電解質として
作用する絶縁層を形成し、金属支持体く静電接合させ九
ものである。
The present invention has been made in view of the above circumstances, and its purpose is to provide a semiconductor piezoelectric transducer with a simplified insulating support structure between an i-earphragm made of a sapphire substrate and a metal housing. In order to achieve such an object, the present invention forms semiconductor epitaxial layers on both sides of a sapphire substrate, and
A piezoresistive element is formed using the epitaxial layer, and an insulating layer that acts as a solid electrolyte at high temperature is formed on the second epitaxial layer, and electrostatically bonded to the metal support.

即ち、一般に、サファイア基板に半導体エピタキシャル
層を成長してなる半導体圧力変換器は、従来のPN@合
によろ絶縁構造を用いたものと異なり、リーク電流の心
配がな(、PNN金倉Vm −Iz特性に制約さ五ずに
ピエゾ抵抗効果のみに着目して不純物濃度を選択できる
という利点を有しているが、他方、前述したような制約
から、このサファイア基板を金属ハウジングに直**合
することはできず、ガラス台座等の介在を必要としてv
h九・ 従って、本発明では、このサファイア基板の金属支持体
との接合面に、第2の半導体エピタキシャル層を介して
高温で固体電解質として作用する絶縁材からなる絶縁層
を形成し、これを金属支持体との間の電気的絶縁手段と
して用いると共に、これにより、上記基板と金属支持体
との結合に静電接合が利用できるようにしたものである
That is, in general, semiconductor pressure transducers made by growing a semiconductor epitaxial layer on a sapphire substrate do not have to worry about leakage current (, PNN Kanakura Vm - Iz This has the advantage that the impurity concentration can be selected by focusing only on the piezoresistance effect without being restricted by the characteristics, but on the other hand, due to the constraints mentioned above, it is difficult to directly fit this sapphire substrate to the metal housing. It is not possible to do so, requiring the intervention of a glass pedestal, etc.
h9. Therefore, in the present invention, an insulating layer made of an insulating material that acts as a solid electrolyte at high temperature is formed on the joint surface of the sapphire substrate with the metal support via the second semiconductor epitaxial layer. It is used as an electrical insulating means between the substrate and the metal support, and thereby allows electrostatic bonding to be used for bonding the substrate and the metal support.

ここで、静電接合とは、金I1.半導体をガラスもしく
はセラきツクス等の高温で固体電解質として作用する絶
縁材に接合する方法のひとつで、電界を印加するどとに
より両者の融点以下の加熱で安定な機械的結合が得られ
るものであり、41Km!合される両物体間に移動が殆
んど見られないため。
Here, electrostatic bonding refers to gold I1. A method of bonding a semiconductor to an insulating material such as glass or ceramics that acts as a solid electrolyte at high temperatures. A stable mechanical bond can be obtained by heating the two to below their melting point by applying an electric field. Yes, 41km! This is because there is almost no movement between the two objects being combined.

これを金属支持体への接合に利用した場合、極めてシャ
ープなダイヤフラムの作成が可能であるOこの場合、金
属支持体の接合相手は、接合温度において固体電解質と
して作用するものであることが必要で、この点から、サ
ファイア基板を直接接合することは不可能で参るが、前
記II2のエピタキシャル層および絶縁層を介在させる
ことにより、この問題を解決した。電圧の印加は、絶縁
層側を陰極、金属支持体側を陽極として行なう。以下、
実施例を用iて本発明の詳細な説明するOIl&を図は
、本発明の一実施例を示す断面図である@同図において
、1はサファイア基板、2はサファイア基板1の主表面
上に形成した第1のシリコ/エピタキシャル層からなる
ピエゾ抵抗素子、3はこのピエゾ抵抗素子20表面上く
形成した810、からなる表面保護絶縁膜、4はピエゾ
抵抗卓子2の電極、5はサファイア基板1の他面に形成
した#I2のシリコ/エピタキシャル層、6はこのエピ
タキシャル層5の上に熱酸化により形成しtt s t
 Ot ya s 7は上記エピタキシャル層5および
熟思化8.kos層@を介してサファイア基板1に接合
し九金属支持体でらる。この金属支持体Tは、図上省略
したが、金属ハウジングの一部として、サファイアと熱
膨張係数の近似した材料、例えばコパール中インバー等
によりハウジングの他の部分と一体的に構成される。前
記サファイア基板1のうち、ζO支持体Tによる拘束を
受けな一中央部が、圧力によって起歪するダイヤフラム
部1mを構成し、前記ピエゾ抵抗素子2は、このダイヤ
7−)ム部1−に設けである。上記ピエゾ抵抗素子2は
、ブリッジ回路を構成し、その出力電圧によって圧力が
検知で暑るようにしである。また、8ハ熱酸化8i0@
層6を貫いてエピタキシャル層5KIm触させて設けた
静電接合用の1極であり、嬉2図の下面図に示すように
、基板1と支持体Tとの接合面(図中、斜線で示す)9
の中心点AK対して対称的に配置しである。静電接合に
際しては、この電極8の側を陰極、金属支持体Tの側を
陽極として電圧を印加する。
If this is used for bonding to a metal support, it is possible to create an extremely sharp diaphragm.In this case, the metal support must be bonded to something that acts as a solid electrolyte at the bonding temperature. From this point of view, it is impossible to directly bond the sapphire substrates, but this problem was solved by interposing the epitaxial layer and insulating layer of II2. The voltage is applied by using the insulating layer side as a cathode and the metal support side as an anode. below,
The figure is a cross-sectional view showing one embodiment of the present invention. A piezoresistance element made of the first silicone/epitaxial layer formed, 3 a surface protection insulating film 810 formed on the surface of the piezoresistance element 20, 4 an electrode of the piezoresistance table 2, and 5 a sapphire substrate 1. The #I2 silicon/epitaxial layer 6 formed on the other surface is formed on this epitaxial layer 5 by thermal oxidation.
Otya's 7 is the epitaxial layer 5 and the reflection 8. It is bonded to the sapphire substrate 1 via the Kos layer and is a nine-metal support. Although not shown in the figure, the metal support T is made of a material having a coefficient of thermal expansion similar to that of sapphire, such as invar in copal, and is integrally formed with other parts of the housing as a part of the metal housing. A central portion of the sapphire substrate 1 that is not constrained by the ζO support T constitutes a diaphragm portion 1m that is strained by pressure, and the piezoresistive element 2 is attached to this diaphragm portion 1m. It is a provision. The piezoresistive element 2 constitutes a bridge circuit, and the pressure is detected and heated by its output voltage. Also, 8c thermal oxidation 8i0@
This is one pole for electrostatic bonding that is provided through the layer 6 and in contact with the epitaxial layer 5KIm. )9
are arranged symmetrically with respect to the center point AK. During electrostatic bonding, a voltage is applied using the electrode 8 side as a cathode and the metal support T side as an anode.

このように熱酸化層、6と金属支持体1とを静電接合し
たことにより、当該熱鏡化8108層6およ?−N び第2のエピタキシャル層5を介して、サファイア基板
1は上記金属支持体Tに安定に接合されると共に、接合
後の上記!ファイア基板1と金属支持体1とは熱酸化1
01層6によって完全に絶縁が保たれる。
By electrostatically bonding the thermally oxidized layer 6 and the metal support 1 in this manner, the thermally mirrored 8108 layer 6 and the metal support 1 are bonded together. -N and the second epitaxial layer 5, the sapphire substrate 1 is stably bonded to the metal support T, and the above! The fire substrate 1 and the metal support 1 are thermally oxidized 1
Complete insulation is maintained by the 01 layer 6.

この場合、上記810.層6は、前述したように第2の
エピタキシャル層50表面を熱酸化することによや容J
IK形成されると共に、金属支持体Tは、金属ハウジン
グの一部として一体形成されるため、絶縁支持構造は極
めて簡略化される。
In this case, the above 810. The layer 6 is made more stable by thermally oxidizing the surface of the second epitaxial layer 50 as described above.
Since the IK is formed and the metal support T is integrally formed as a part of the metal housing, the insulating support structure is extremely simplified.

を九、この場合静電接合用の電極は、接合TM9に対し
て対称的な配置としであるため、接合面9における通電
時の電位分布が均一化され、一層均一な接合が得られる
・ なお、この場合、上記静電接合用の電極8は、基本的に
、接合面9に対してはぼ均等に分布させることが望まし
く、ガえばダイヤフラム部1aの全局をとり囲むように
連続的な形状に設けても嵐いことは勿論である。また、
この場合、特に第2のエピタキシャル層5がn−形シリ
コンであって、電極8との間にショットキ障壁が形成さ
れるような場合には、電極8と接触する部分に高導電性
のバルクコンタクト部を設ける必要がある。このような
場合には、むしろこのパルクコ/タクト部を電極と考え
て良く、当該パルクコ/タクト部を、前記接合面9に対
して均等に、例えばダイヤフラム部11をと9囲むよう
に連続して設ければ、電極8それ自体は1個所に配置し
ても、全周に設けたと同様の効果が得られることは勿−
である。
(9) In this case, since the electrodes for electrostatic bonding are arranged symmetrically with respect to the bonding TM9, the potential distribution during energization on the bonding surface 9 is made uniform, and a more uniform bonding can be obtained. In this case, the electrodes 8 for electrostatic bonding are basically desirably distributed almost evenly on the bonding surface 9, for example, in a continuous shape so as to surround the entire diaphragm portion 1a. Of course, it will be stormy even if it is set up. Also,
In this case, especially when the second epitaxial layer 5 is made of n-type silicon and a Schottky barrier is formed between it and the electrode 8, a highly conductive bulk contact is provided at the portion in contact with the electrode 8. It is necessary to establish a section. In such a case, the pulverizer/tact portion may be considered as an electrode, and the pulverizer/tact portion may be continuously and uniformly connected to the joint surface 9, for example, so as to surround the diaphragm portion 11. If provided, it goes without saying that even if the electrode 8 itself is placed in one place, the same effect as if it were provided all around the circumference can be obtained.
It is.

fs3図は、本発明の他の実施例を示す断面図であり、
第1図と同一部分は同一記号を用いてその詳細説明を省
略する。即ち、本実m例は、熱酸化8101層6と金属
支持#、1との間に、更に、絶縁層10を介在させたも
のである。この絶縁層10は、上記熱酸化StO,層6
の上に、例えばOVD法、リアクティブスパッタ法等に
より810.を堆積させるととKよって形成することが
できる。即ち、熱酸化によるSin、層6は、自らその
形成可能な膜厚が限定される。従って、要求される耐電
圧、接合の収率、を九シリコンの表”−処理の状態等に
応じ、上記熱酸化による8i0.層6のみで不十分な場
合には、上述し九ような絶縁層10を補充的に設けるこ
とが極めて有効である。この場合、靜鴫接合は、この絶
縁層10と金属支持体Tとの間で行なわれる。従って、
絶縁層10は、接合時の高温で固体電解質と作用するも
のでなければならず、逆にそのようなものであれば、例
えばスパッタリング法により形成し九ガフス層等を用い
ても良い。
Figure fs3 is a sectional view showing another embodiment of the present invention,
The same parts as in FIG. 1 are designated by the same symbols, and detailed explanation thereof will be omitted. That is, in this example, an insulating layer 10 is further interposed between the thermally oxidized 8101 layer 6 and the metal support #1. This insulating layer 10 is made of the thermally oxidized StO layer 6.
810. by OVD method, reactive sputtering method, etc. It can be formed by depositing and K. That is, the thickness of the thermally oxidized Sin layer 6 is limited. Therefore, the required withstand voltage and bonding yield should be determined according to the conditions of the 8i0 silicon treatment, etc. It is very advantageous to provide a supplementary layer 10, in which case a close bonding takes place between this insulating layer 10 and the metal support T. Therefore:
The insulating layer 10 must be one that interacts with the solid electrolyte at high temperatures during bonding, and if it is such a layer, it may be formed, for example, by a sputtering method and a nine-gafs layer or the like may be used.

1114図は、本発明の更に他の実施ガを示す断面図で
あり、第1図と同一もしくは相当部分は同−記号を用−
ている。即ち、同図から明らかなように、本実施例は、
ダイヤフラム部1mの下面部分においてs2のエピタキ
シャル層5などを除去したもので、圧力変換器としての
特性に少しでも害を与え得る要因、即ち、ヒステリシス
中す−!ルヒステリシス等の原因となり得ろ要因を極力
排除して特性の向上をはかったものである。
FIG. 1114 is a sectional view showing still another embodiment of the present invention, and the same or equivalent parts as in FIG. 1 are designated by the same symbols.
ing. That is, as is clear from the figure, in this example,
The epitaxial layer 5 of s2 is removed from the lower surface of the diaphragm portion 1m, and there are no factors that could harm the characteristics of the pressure transducer, that is, hysteresis. The aim is to improve the characteristics by eliminating as much as possible factors that may cause hysteresis.

以上説明し九ように、本発明によれば、サファイア基板
の両面に半導体エピタキシャル層を成長させ、かつ支持
体との接合面側に高温で固体電解質として作用する絶縁
材からなる絶縁層を形成して金属支持体に静電接合した
ことくより、当該サファイア基板からなるダイヤフラム
を金属支持体く機械的に安定に結合すると共に、当該金
属支持体との間に確実な絶縁を保つことが可能となった
As explained above, according to the present invention, semiconductor epitaxial layers are grown on both sides of a sapphire substrate, and an insulating layer made of an insulating material that acts as a solid electrolyte at high temperature is formed on the side that is bonded to the support. By electrostatically bonding the sapphire substrate to the metal support, it is possible to mechanically stably connect the diaphragm made of the sapphire substrate to the metal support, and to maintain reliable insulation between the metal support and the diaphragm. became.

従って、金属ハウジングとの間に絶縁用としてガラス台
座等の別部材を介在接合する必要がなく、絶縁支持構造
を簡略化で龜ると共に、圧電変換器としての特性を向上
させることができるという優れ九効果を有する。
Therefore, there is no need to interpose and join a separate member such as a glass pedestal between the metal housing and the metal housing for insulation, which simplifies the insulation support structure and improves the characteristics of the piezoelectric transducer. It has nine effects.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す#?面図、第2図は同
じく下面図、第3図および第4図はそれぞれ本発明の他
の実施例を示、す断面図である。 1・φ・・サファイア基板、la・・・・ダイヤフラム
部、2・・・・ピエゾ抵抗素子、5・・・・Is2のシ
リコンエピタキシャル層、61I・・・熱酸化8 i 
0.層、T・・・・金属支持体、8・・・・電体、9・
・・・接合面、10・・・・絶縁層。
FIG. 1 shows an embodiment of the present invention. FIG. 2 is a top view, FIG. 2 is a bottom view, and FIGS. 3 and 4 are sectional views showing other embodiments of the present invention. 1.φ...Sapphire substrate, la...Diaphragm part, 2...Piezoresistance element, 5...Is2 silicon epitaxial layer, 61I...Thermal oxidation 8i
0. Layer, T...Metal support, 8...Electric body, 9...
...Jointing surface, 10...Insulating layer.

Claims (3)

【特許請求の範囲】[Claims] (1)主面上に半導体エピタキシャル層を有するサファ
イア基板の周縁部を金属支持体に接合して中央部にダイ
ヤフラムを構成してなる半導体圧力変換器において、前
記エピタキシャル層は、前記サファイア基板の前記支持
体との接合面と反対側の主面上に形成されかクピエゾ抵
抗素子を構成する第1のエピタキシャル層と、前記サフ
ァイア基板の前記接合面側主面上に形成されたlI2の
エピタキシャル層とからなると共に、尚鍍嬉2のエピタ
キシャル層は、表面上に高温で固体電解質として作用す
る絶縁材によって形成され九絶縁層を備え、当該絶縁層
と前記金属支持体とを接電接合してなる半導体圧力変換
器。
(1) In a semiconductor pressure transducer comprising a diaphragm formed in the center by bonding the peripheral portion of a sapphire substrate having a semiconductor epitaxial layer on the main surface to a metal support, the epitaxial layer is formed on the sapphire substrate. a first epitaxial layer constituting a cup piezoresistive element formed on the main surface opposite to the bonding surface with the support; and an lI2 epitaxial layer formed on the main surface of the sapphire substrate on the bonding surface side. In addition, the epitaxial layer of Shoganki 2 has nine insulating layers formed on the surface of an insulating material that acts as a solid electrolyte at high temperatures, and the insulating layer and the metal support are electrically bonded. Semiconductor pressure transducer.
(2)絶縁層は、第2のエピタキシャル層の熱酸化層で
あることを特徴とする特許請求の範囲第1項記載の半導
体圧力変換器。
(2) The semiconductor pressure transducer according to claim 1, wherein the insulating layer is a thermally oxidized layer of the second epitaxial layer.
(3)絶縁層は、第2のエピタキシャル層の熱酸化層お
よび仁の熱酸化層上に堆積させた他の高温で固体電解質
として作用する絶縁材からなる層であることを特徴とす
る特許請求の範囲41項記載の半導体圧力変換器。
(3) A patent claim characterized in that the insulating layer is a layer consisting of a thermally oxidized layer of the second epitaxial layer and another insulating material that acts as a solid electrolyte at high temperatures and is deposited on the thermally oxidized layer of the second epitaxial layer. 42. The semiconductor pressure transducer according to item 41.
JP20148981A 1981-12-16 1981-12-16 Semiconductor pressure transducer Pending JPS58103633A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20148981A JPS58103633A (en) 1981-12-16 1981-12-16 Semiconductor pressure transducer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20148981A JPS58103633A (en) 1981-12-16 1981-12-16 Semiconductor pressure transducer

Publications (1)

Publication Number Publication Date
JPS58103633A true JPS58103633A (en) 1983-06-20

Family

ID=16441901

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20148981A Pending JPS58103633A (en) 1981-12-16 1981-12-16 Semiconductor pressure transducer

Country Status (1)

Country Link
JP (1) JPS58103633A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5181417A (en) * 1989-07-10 1993-01-26 Nippon Soken, Inc. Pressure detecting device
JPWO2020262460A1 (en) * 2019-06-25 2020-12-30

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5181417A (en) * 1989-07-10 1993-01-26 Nippon Soken, Inc. Pressure detecting device
JPWO2020262460A1 (en) * 2019-06-25 2020-12-30
WO2020262460A1 (en) * 2019-06-25 2020-12-30 長野計器株式会社 Optical sensor and physical quantity measurement device

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