JPS58103544U - hold down circuit - Google Patents

hold down circuit

Info

Publication number
JPS58103544U
JPS58103544U JP85282U JP85282U JPS58103544U JP S58103544 U JPS58103544 U JP S58103544U JP 85282 U JP85282 U JP 85282U JP 85282 U JP85282 U JP 85282U JP S58103544 U JPS58103544 U JP S58103544U
Authority
JP
Japan
Prior art keywords
circuit
down circuit
hold down
input terminal
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP85282U
Other languages
Japanese (ja)
Other versions
JPH0214289Y2 (en
Inventor
徹 笹部
西井 洋
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP85282U priority Critical patent/JPS58103544U/en
Publication of JPS58103544U publication Critical patent/JPS58103544U/en
Application granted granted Critical
Publication of JPH0214289Y2 publication Critical patent/JPH0214289Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Details Of Television Scanning (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Power Conversion In General (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のホールドダウン回路の一例を示す回路図
であり、第2図が本考案によるホールドダウン回路の一
実施例を示す回路図である。 1:電源入力端子、4:平滑コンデンサ、11゜12:
ホールドダウン用スイッチングトランジスタ、16:放
電用スイッチングトランジスタ。
FIG. 1 is a circuit diagram showing an example of a conventional hold-down circuit, and FIG. 2 is a circuit diagram showing an embodiment of the hold-down circuit according to the present invention. 1: Power input terminal, 4: Smoothing capacitor, 11゜12:
Hold-down switching transistor, 16: Discharge switching transistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電源電圧の上昇を検出して動作するスイッチング回路を
設け、このスイッチング回路により入力端に平滑用コン
デンサが接続された負荷回路への電源供給を遮断するよ
うにした回路に於いて、前記スイッチング回路の動作時
に導通するスイッチング素子を前記入力端に接続し、こ
のスイッチング素子により前記コンデンサの放電ループ
を形成するようにしたことを特徴とするホールドダウン
回路。
In a circuit that is provided with a switching circuit that operates by detecting a rise in power supply voltage, and that cuts off the power supply to a load circuit whose input terminal is connected to a smoothing capacitor, the switching circuit A hold-down circuit characterized in that a switching element that is conductive during operation is connected to the input terminal, and the switching element forms a discharge loop for the capacitor.
JP85282U 1982-01-06 1982-01-06 hold down circuit Granted JPS58103544U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP85282U JPS58103544U (en) 1982-01-06 1982-01-06 hold down circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP85282U JPS58103544U (en) 1982-01-06 1982-01-06 hold down circuit

Publications (2)

Publication Number Publication Date
JPS58103544U true JPS58103544U (en) 1983-07-14
JPH0214289Y2 JPH0214289Y2 (en) 1990-04-18

Family

ID=30013905

Family Applications (1)

Application Number Title Priority Date Filing Date
JP85282U Granted JPS58103544U (en) 1982-01-06 1982-01-06 hold down circuit

Country Status (1)

Country Link
JP (1) JPS58103544U (en)

Also Published As

Publication number Publication date
JPH0214289Y2 (en) 1990-04-18

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