JPS58102945A - Electrostatic recording medium - Google Patents

Electrostatic recording medium

Info

Publication number
JPS58102945A
JPS58102945A JP20207381A JP20207381A JPS58102945A JP S58102945 A JPS58102945 A JP S58102945A JP 20207381 A JP20207381 A JP 20207381A JP 20207381 A JP20207381 A JP 20207381A JP S58102945 A JPS58102945 A JP S58102945A
Authority
JP
Japan
Prior art keywords
layer
resistance layer
electrostatic
recording medium
latent image
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20207381A
Other languages
Japanese (ja)
Inventor
Masatoshi Kimura
正利 木村
Junzo Nakajima
淳三 中島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP20207381A priority Critical patent/JPS58102945A/en
Publication of JPS58102945A publication Critical patent/JPS58102945A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03GELECTROGRAPHY; ELECTROPHOTOGRAPHY; MAGNETOGRAPHY
    • G03G5/00Recording members for original recording by exposure, e.g. to light, to heat, to electrons; Manufacture thereof; Selection of materials therefor
    • G03G5/02Charge-receiving layers
    • G03G5/0202Dielectric layers for electrography

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Photoreceptors In Electrophotography (AREA)

Abstract

PURPOSE:To prevent the occurence of spots and voids by laminating a high resistance layer, a low resistance layer and a dielectric layer on an internal metallic support to form the surface of the rotary cylinder of an electrostatic recording device for forming an electrostatic latent image. CONSTITUTION:A metallic drum 11 for a rotary cylinder for forming an electrostatic latent image is coated with a high resistance layer having 3X10<9>OMEGA.cm volume resistivity in 100mum thickness, a lower resistance layer having 10<7>OMEGA/cm<2> surface resistance in 10mum thickness and a dielectric layer 14 of a substance having 32 dielectric constant in 20mum thickness in succession to form a recording medium 1. The medium 1 is charged to +450V surface potential with a uniform charging corotron (not shown), and the potential of both ends of the layer 13 is set to -150V prescribed value. In accordance with a signal, -150V voltage is applied to a noncontact pin electrode 3. Thus, medium discharge is repeated several times in place of a single large discharge, and a fine latent image free from spots and voids is formed.

Description

【発明の詳細な説明】 (1)発SO技術分野 本発明は静電記録装置に用いる静電記録媒体に係1、と
くにビン電極との閾の放電によp靜電漕像を形成した後
普通紙に転写可能な静電記録媒体に関するものでるる。
DETAILED DESCRIPTION OF THE INVENTION (1) Technical field of SO generation The present invention relates to an electrostatic recording medium used in an electrostatic recording device. This article concerns electrostatic recording media that can be transferred to paper.

(2)従来技術と間両点 従来、本出願人は$111iAに示すような昔通紙に転
写が可能な静電記録方式を既に提県している。
(2) Prior Art and Disadvantages The present applicant has already proposed an electrostatic recording method capable of transferring onto paper, as shown in $111iA.

この方式は金属ドラム11上に一電体属1bを構成し、
ζO#電体Il&1bに対しコ臣す放電!2によp一様
に正に帯電し、その後文字パターンに従って記録ドラム
1に対し非接触に配置されたビン電極5に負の電圧vp
を印加し、放電によって静電#像を形成すゐ。その後、
磁気ブラシ現像機4によp現像し、コロナ放電器5によ
ル普通g6に転写する。この方式に用iられてiる記録
ドラム1は従来金属ドラム1a上に酵電体属1bを形成
したもので6つ九。しかしこのような静電記録媒体では
ビン電極30ドツトに対し、異常に大きなドラ)8にの
#壕、いわゆるスポット中、印字欠落、いわゆるボイド
が発生する仁とが多く印字品位が悪化するという欠点が
あった。
In this method, a single electric element 1b is constructed on a metal drum 11,
ζO# Discharge to the electric body Il & 1b! 2, p is uniformly positively charged, and then a negative voltage vp is applied to the bottle electrode 5, which is arranged in a non-contact manner with respect to the recording drum 1 according to the character pattern.
is applied, and an electrostatic image is formed by discharge. after that,
The image is developed by a magnetic brush developing device 4, and transferred to a normal image 6 by a corona discharger 5. The recording drum 1 used in this method is conventionally made of a metal drum 1a with a ferroelectric material 1b formed thereon. However, in this type of electrostatic recording medium, the printing quality deteriorates because of the 30 dots of the bin electrode, and there are many abnormally large # grooves, so-called spots, missing prints, and so-called voids. was there.

ま九、ピン電極5を静電記録媒体に接触させる紀罎方式
において娘、金属ドラム1&上に記録層である誘電体膜
1bを形成した場合、記録層にピンホール等の欠陥があ
ると、ビン電極5と金属ドラム1aとの閏で火花放電が
生じる。これを解決する丸め、本出願人による4IIi
llll昭50−152753号の発明に示すように、
金属ドラム上に10・〜1oaΩ国の体積固有抵抗を有
する半導体性中間層を厚さ十〜数十μlIl形成し、そ
の上に記録層である誘電体jllbを形成し九2層構造
ドラムが使用される。しかし、このドラムを第1図に示
す静電記録媒体に採用し紀碌を行なつ九とζろ、誘電体
膜のみの場合と同様、スボツ)またはボイドが発生する
場合があル、両速と同様に印字品位を感化する欠点が6
つ九。
(9) When the dielectric film 1b, which is the recording layer, is formed on the metal drum 1 and the dielectric film 1b is formed on the metal drum 1 in the method of bringing the pin electrode 5 into contact with the electrostatic recording medium, if there is a defect such as a pinhole in the recording layer, A spark discharge occurs between the bottle electrode 5 and the metal drum 1a. Rounding to solve this, 4IIi by the applicant
As shown in the invention of llll No. 152753/1983,
A semiconducting intermediate layer having a volume resistivity of 10 to 1 oaΩ is formed on a metal drum to a thickness of 10 to several tens of microliters, and a dielectric material JLLB serving as a recording layer is formed on top of this to form a 92-layer structure drum. be done. However, when this drum is used in the electrostatic recording medium shown in Figure 1, it is possible that, as in the case of using only a dielectric film, spots or voids may occur. Similarly, there are 6 drawbacks that affect printing quality.
Nineteen.

(3)発&jIiOil的 本発明の目的はボイドまたはスポットのない棗好なm傷
形成が′可能な静電記録媒体を提供することである。
(3) An object of the present invention is to provide an electrostatic recording medium capable of forming fine scratches without voids or spots.

(4)発明の構成 前記−的を連成するため、本発明の静電記録織体紘静電
紀碌装置に使用し、導電性支持体上に設は丸記録層にビ
ン電極との間の放電にょル靜電潜儂を形成し良後普通紙
に転写可能な静電記録媒体において、前記記録層が下層
よ)高抵抗層と、放電時間に関連する所定電位に設定し
た抵抗層と。
(4) Structure of the Invention In order to couple the above-mentioned target, the electrostatic recording fabric of the present invention is used in the electrostatic recording device, and is placed on a conductive support between the round recording layer and the bottle electrode. In an electrostatic recording medium capable of forming a static electric potential during a discharge and then being transferred onto plain paper, the recording layer comprises a high resistance layer (the lower layer) and a resistance layer set to a predetermined potential related to the discharge time.

さらにその上に放電にょ)静電潜像を形成する酵電体層
とを設は九ことt−特徴とするものである。
Furthermore, a fermentation material layer for forming an electrostatic latent image (discharge) is provided thereon.

(5)発明の実施例 本発明の詳細な説明する。まず静電記碌における#像形
成メカニズムを詳細に検討し九結果、潜像形成にはビン
電極先端からの初期電子の放出およびそれに続く電子な
だれ増倍現象が重要な関係を有するものである。ボイド
の発生原因はビン電極先端からの初期電子の供給不足で
To6.スポットの発生原因は電子なだれ増倍による過
剰電流であることが明らかとなった。
(5) Embodiments of the Invention The present invention will be explained in detail. First, we investigated the image formation mechanism in electrostatic recording in detail, and found that the initial electron emission from the tip of the bottle electrode and the subsequent electron avalanche multiplication phenomenon are important in latent image formation. The cause of the void is the insufficient supply of initial electrons from the tip of the bottle electrode. It became clear that the cause of the spot generation was excessive current due to electron avalanche multiplication.

初期電子の供給線ビン電極先端からの電界放出でる91
単位時間蟲pの供給量nはビン電極先端の電界強度が通
常の靜電紀録で使用されている電界範囲内ではほぼ次式
で示されることがわかった。
Field emission from the tip of the initial electron supply line bottle electrode 91
It has been found that the supply amount n of insects p per unit time is approximately expressed by the following equation when the electric field strength at the tip of the bottle electrode is within the electric field range used in ordinary Seidenki.

An−AE+B  (5QMV/” <E<50MV/
u)(1)ただし、  A;比例係数  B;定数E;
電界 ま九、放電時に流れる放電電流1はほぼ次式で表わされ
ることが明らかになった。
An-AE+B (5QMV/” <E<50MV/
u) (1) However, A: Proportionality coefficient B: Constant E;
It has become clear that the electric field M9 and the discharge current 1 flowing during discharge are approximately expressed by the following equation.

leωCVeo               (2)
九ボし、   ―=2π1/T(T:イオ/の移紳時間
)C−πi、C・(記録層容量) r・:ビン電極中径 Co;記録層の単位面積轟p の容量 Vao ;記鎌電圧と放電開始型 圧との差 すなわち潜像強度 これよルスポットを抑制するためには、Vao を九は
Ct小さくすればよいことがわかる。とζろが、Voo
を小さくすれば、α)式で水車れゐ初期電子数が少なく
なル、ボイドO尭生原因となるとと−に、潜像強直が小
さくな〕高い現像員度を得ることかで龜なくなる。
leωCVeo (2)
9 points, -=2π1/T (T: transfer time of io/) C-πi, C・(recording layer capacity) r・: bottle electrode medium diameter Co; recording layer unit area p capacity Vao; It can be seen that in order to suppress the difference between the sickle voltage and the discharge starting pressure, that is, the latent image intensity, and the spot, it is sufficient to make Vao smaller by 9 Ct. and ζroga, Voo
If the value of the latent image is made small, the initial number of electrons in the water wheel will be small in equation (α), and the latent image stiffness will be small, which will cause the void O to be generated.

ビン電極半Ar@=25μ町紀―電圧600vとして記
録層容量Cを変化鳴せなからスボツ)O発生しない条件
を求め九とζろ、記録層容量C・は約50PFA−以下
であることがわがつ九。
The recording layer capacitance C was changed with a voltage of 600 V, so I searched for conditions that would not cause O to occur. Nineteen.

とζろが、現像機構の研究よp必要な記録層容量は50
QPF/lxj以上であることが知られている。オ。
However, according to research on the development mechanism, the required recording layer capacity is 50
It is known that it is greater than QPF/lxj. Oh.

九、潜像形成パルスが印加されている閾、Qが50PF
/aIj以下となると、記一層を含めた放電開始電圧が
高(なル、ボイドの発生原因となる。この丸め、放電電
流が流れると亀のみCIが50PF/−以下、それ以外
はC・が6ΩOPF乙−以上となるような静電紀am体
を構成すればスポットま九はボイドのない良好な潜像が
形成で禽ゐと考えられる。
9. Threshold to which the latent image forming pulse is applied, Q is 50PF
/aIj or less, the discharge starting voltage including the layer becomes high (and causes voids to occur.When the discharge current flows, only the turtle's CI is 50PF/- or less, and the other parts are C. It is thought that if an electrostatic body is constructed with an OPF of 6Ω or more, a good latent image with no voids will be formed at the spot.

第2図は本発明の要部の基本構成説明図である。FIG. 2 is an explanatory diagram of the basic configuration of the main parts of the present invention.

同図において、金属支持体11上に下層から容量50P
FA−以下の体積抵抗率10暮〜10宜1Ω国とした高
抵抗層12を設け、その上に表向抵抗10−〜10”Ω
/口の抵抗層1sと、6らにその上に容量300PF〜
以上の誘電体層14を設は九5属構造とし、抵抗層15
0両端を金属支持体11に接続することによル、ピン電
4に15よル空l116t−介して放電を行なつ死時に
は50PF/<−以下の容量となplそれ以外のときに
は500PF/i−以上の容量となるようにし丸もので
ある。
In the same figure, a capacity of 50P is placed on the metal support 11 from the bottom layer.
A high-resistance layer 12 with a volume resistivity of 10 to 10 Ω of less than FA- is provided, and a surface resistance of 10 to 10" Ω is provided thereon.
/ 1s resistance layer at the mouth and a capacitance of 300PF~ on it
The dielectric layer 14 described above has a 95-group structure, and the resistance layer 15
By connecting both ends of 0 to the metal support 11, a discharge is made to the pin voltage 4 through the 15-hole 116t, and at the time of death, the capacity is 50PF/<- or less. Otherwise, it is 500PF/i. -It is round and has a capacity of more than

上記の構成をもとにして、記―媒体の動作原理をalj
llする。パルス電圧印加後、放電開端時まで紘抵抗層
15を電流が矢印方向(実際は放射状)に流れ、この南
自によルピン電極15に対応する高抵抗層120面積が
大きくなル、この高抵抗層12の容量とビン電極15直
下O9,1l116との閾で印加電圧が分割されること
になる丸め、^い電圧が空隙16に印加されることにな
る。一方、放電時には、放電時間が非常に短いため、抵
抗層15を横方向に流れる電流が少なくな)、放電時の
容量は誘電体層14および高抵抗層12の容量の直列回
路となる。
Based on the above configuration, the operating principle of the storage medium is
I'll do it. After the pulse voltage is applied, a current flows in the direction of the arrow (actually radially) in the resistance layer 15 until the discharge opens, and this causes the area of the high resistance layer 120 corresponding to the lupin electrode 15 to become large. The applied voltage is divided by the threshold of the capacitor 12 and the voltage O9, 1l116 immediately below the bottle electrode 15, so that a high voltage is applied to the gap 16. On the other hand, during discharging, since the discharging time is very short, the current flowing laterally through the resistance layer 15 is small), and the capacitance during discharging becomes a series circuit of the capacitance of the dielectric layer 14 and the high resistance layer 12.

この丸め、高抵抗層12(D容量、が小さいと放電によ
って発生し九わずかな負の電荷が誘電体層14に付着し
て、すぐに誘電体層14の電位が低下し放電が停止され
る。その後抵抗層150横方向に電流が流れ空−に再度
At/%電圧が印加され、再び放電が行なわれる。この
手順を〈)返して潜像が形成される。すなわち、従来の
大きな放電1回の代pに中位の放電が複数回繰遮光され
るからスポット中ボイドが回避されることになる。
If this rounded high resistance layer 12 (D capacitance) is small, a small amount of negative charge will be generated by discharge and will adhere to the dielectric layer 14, and the potential of the dielectric layer 14 will immediately drop and the discharge will be stopped. Thereafter, a current flows in the lateral direction of the resistive layer 150, and the At/% voltage is again applied to the resistive layer 150, causing discharge to occur again.This procedure is repeated (<) to form a latent image. That is, since light is blocked by multiple medium discharges in place of one large discharge p as in the conventional case, voids in the spot can be avoided.

本発明では上述のように、中間の抵抗層1sに流れる誘
導電流を利用し、放電時とそれ以外の時とで容量変化を
作為ようにし九ものである。
As described above, the present invention uses the induced current flowing through the intermediate resistance layer 1s to artificially change the capacitance between discharge and other times.

いま菖smに示すように、第2図の構成につ龜金属支持
体11とピン電1i15との閾にスイッチ(SW)を介
し電圧VPs九とえば600vを印加する。−電体層1
40表面表面上Vs、空隙電圧Vgとすれば、空−電圧
の立上ルは次式で示される。
As shown in FIG. 2, a voltage VPs, for example 600 V, is applied to the threshold of the metal support 11 and the pin electrode 1i15 through a switch (SW) in the configuration shown in FIG. -Electric layer 1
40 surface When Vs on the surface and Vg are the air gap voltages, the rise of the air gap voltage is expressed by the following equation.

丸だし  K”−1+Ce/Cp   Co;記録層の
合成容量1/Kt=Re(Cp−I−C@)  Cp;
 i1%抵抗抵抗容量・rfe;余剰関数   RC;
抵抗層の抵抗値なお、(3)式は空隙電圧OI&終値で
正規化し九ものである。
Round K”-1+Ce/Cp Co; Composite capacity of recording layer 1/Kt=Re(Cp-I-C@) Cp;
i1% resistance resistance capacitance/rfe; surplus function RC;
The resistance value of the resistance layer.Equation (3) is normalized by the air gap voltage OI and the final value.

一般には記録パルスの印加電圧間隔は数十μs楊度であ
る。
Generally, the interval between the applied voltages of recording pulses is several tens of microseconds.

このために必要な抵抗層150*面抵抗R@は(3)式
よ)約10”Q/口以下となる。一方、約2nsのイオ
ン移動時間内に容量が変化しない条件を求めると、(3
)弐Raは約10−シロ以上となる。これよp抵抗層1
30表面抵抗胞が10・Ω/口(Re(10・Ω/口の
範囲であれば本発明の目的を達成できることがわかる。
The resistance layer 150 * surface resistance R@ required for this purpose is approximately 10"Q/port or less (according to equation (3)). On the other hand, when determining the condition that the capacitance does not change within the ion movement time of approximately 2 ns, ( 3
) 2 Ra is approximately 10-shiro or more. This is p resistance layer 1
It can be seen that the object of the present invention can be achieved if the surface resistance cell is within the range of 10·Ω/mouth (Re(10·Ω/mouth).

高抵抗層12の抵抗値はパルス印加後、抵抗層13上の
電荷を中和し、抵抗層15の電位を#デぼ一定に侃つた
めに必要なものである。
The resistance value of the high resistance layer 12 is necessary to neutralize the charge on the resistance layer 13 and keep the potential of the resistance layer 15 almost constant after the pulse is applied.

パルス電圧印加周期は1ライフ 400ns 84度で
ある。
The pulse voltage application period is 1 life, 400 ns, and 84 degrees.

これよp時定数が100ns ii度以上であれば充分
であると考えられ・る。
It is considered that it is sufficient if the p time constant is 100 ns II degrees or more.

この条件よp14抵抗層120体積抵抗皐^は約10”
Ω・個以上となる。一方、上限は各プロセス間での干渉
がない条件よ)求められる。一般には各プロセスの物場
的配置に関係するが、ははa1秒程度と考えておけば充
分である。
Under these conditions, the volume resistance of the p14 resistive layer 120 is approximately 10"
It becomes Ω・pieces or more. On the other hand, the upper limit is determined by the condition that there is no interference between processes. Generally speaking, it is related to the physical layout of each process, but it is sufficient to consider that it is about a1 second.

これよpp、は1011Ω・1以下となる。This means that pp is less than 1011Ω·1.

以上よル、高抵抗層120体積抵抗率β、は10”Ω・
国くρ、(1011Ω・1となる。この条件を用いれば
、各プロセス間の相互干渉がなく良好な潜像形成が行な
える。
Based on the above, the volume resistivity β of the high resistance layer 120 is 10”Ω・
The value ρ is (10 11 Ω·1). If this condition is used, there is no mutual interference between the processes, and a good latent image can be formed.

一方、^抵抗層12が完全な絶縁体であれば抵抗層15
に流れる電fILt−遍幽な電位に設定したとζろに流
してやる必要がある。このため、後述するように金属支
持体11上く形成された高抵抗層12上に、抵抗層15
0幅が高抵抗層120幅よ)大きくなるようにし、両端
を金属支持体11上に接続できるように段違1/sK處
布し、その上から誘電体層を塗布するようにすれば、藺
単に抵抗層13の接地が可能となる。この方式で紘抵抗
層接地〇九めO特別な機構は必要なく、シかも^抵抗層
O艦抗値の選択I!囲が広くなるという利点がある。
On the other hand, if the resistance layer 12 is a perfect insulator, the resistance layer 15
If the electric current fILt flowing through is set to a uniform potential, it is necessary to flow it in a uniform direction. Therefore, as will be described later, the resistance layer 15 is placed on the high resistance layer 12 formed on the metal support 11.
If the 0 width is made larger than the width of the high resistance layer 120, and the steps are 1/sK so that both ends can be connected to the metal support 11, the dielectric layer is applied from above. This allows the resistance layer 13 to be easily grounded. With this method, there is no need for a special mechanism to ground the resistance layer, and it may be possible to select the resistance value of the resistance layer! It has the advantage of being wider.

第4図は本発&j1o実施例0構成説明図である。FIG. 4 is an explanatory diagram of the configuration of Embodiment 0 of the present invention.

同図に訃いて、金属ドラム11上に体積抵抗率3×10
−Ω・aw Oj%抵抗層12を100μ寓塗布し、そ
の上に表rH抵抗10’Ω/LlO抵抗層15 t 1
0am jk布t、、さらにその上に比誘電率52の物
質の#電体層14を20μm塗布した構造の静電紀鎌媒
体1を作成する。この記録謀体1t−第1図に示すよう
に、一様帯電コロトpン2にょ〕表面電位+450V 
ec帯電する。そして、抵抗層150両端を放電時間に
関連する電位0〜−150vの所定値に設定しておく。
As shown in the figure, a volume resistivity of 3×10 is placed on the metal drum 11.
- 100μ of the resistance layer 12 of Ω・aw Oj% is applied, and a surface rH resistance of 10′Ω/LIO resistance layer 15 t 1 is applied thereon.
An electrostatic sickle medium 1 having a structure of 0 am jk cloth t and a #electric layer 14 of a material having a relative dielectric constant of 52 coated thereon to a thickness of 20 μm is prepared. As shown in FIG.
EC charges. Then, both ends of the resistance layer 150 are set to a predetermined potential value of 0 to -150V related to the discharge time.

そ()IIk20 tugの生麺を設は九非接触ビン電
[5に一150VC)電圧を印加し、静電潜像を形成す
ることによp1スポットおよびボイドのない良好なS像
が形成される。
A good S-image without p1 spots and voids was formed by applying a voltage of 9 non-contact electric bottles (5 to 150 VC) to the fresh noodles of IIk20 tug to form an electrostatic latent image. Ru.

第5図は本発明の他の実施例の構成iI!嘴図である。FIG. 5 shows the configuration of another embodiment of the present invention! This is a beak diagram.

同図において、高抵抗層12に誘電体膜を用い、抵抗層
12C)j1m端を金属支持体11に接続し九構成であ
る。七〇@0条件はJIEJ図と同じである。この記録
媒体1′を用いて実験を行なり九ところ、各プロセス関
O相互作用もなく、スポット中ボイドの発生のな%/′
&嵐好な潜像が形成された。なお、今回の実施例では金
属支持体を金属ドラムとし九が、勿論ベルト状に構成し
良導電性材料でもよいことは69までもない。
In the figure, a dielectric film is used for the high resistance layer 12, and the ends of the resistance layer 12C)j1m are connected to the metal support 11, resulting in a nine-layer configuration. The 70@0 condition is the same as the JIEJ diagram. An experiment was conducted using this recording medium 1', and it was found that there was no interaction between each process, and there was no occurrence of voids in the spot.
& A beautiful latent image was formed. In this embodiment, the metal support is a metal drum; however, it goes without saying that it may be constructed in the form of a belt and may be made of a highly conductive material.

(句発例の効果 以上1!明し九ように、本発明によれば、初期電子の供
給不足がなく、かつ放電時の電流が抵抗層と高抵抗層の
機能によp抑制できるので、スポット中ボイドのない良
好な漕儂を形成することかで龜る。
(Effects of Phrase Example 1! As explained above, according to the present invention, there is no shortage of initial electron supply, and the current during discharge can be suppressed by the functions of the resistance layer and the high resistance layer. It is important to form a good distance without voids in the spot.

【図面の簡単な説明】[Brief explanation of drawings]

1s1図拡靜電記録方式の一般説明図、為2図は本発明
の要部の基本構成a開園、第3図は同上の動作説明図、
第4図は本発@O実施例の構成説明図、籐5図は本発@
O他の実施例の構成説明図で6〕、図中、1は記―縄体
、2,5紘コロナ放電器、3.15はビン電極、4Fi
磁気ブラシ現像機、6は普通紙、11は金属支持体、1
2紘Am抗層、15は抵抗層、14は鍔上体層、16は
空隙を示す。 特許出願人富士通株式金社 後代場人 弁塩士 1)坂 善 重 第百図 第2図
Figure 1s1 is a general explanatory diagram of the enlarged electromagnetic recording system, Figure 2 is the basic configuration of the main parts of the present invention, and Figure 3 is an explanatory diagram of the same operation as above.
Figure 4 is an explanatory diagram of the configuration of the present @O embodiment, and Figure 5 is the present @O embodiment.
6 in the diagram to explain the configuration of another embodiment], in the figure, 1 is a rope body, 2.5 is a corona discharger, 3.15 is a bottle electrode, and 4Fi
Magnetic brush developing machine, 6 is plain paper, 11 is metal support, 1
2 shows the Am resistance layer, 15 shows the resistance layer, 14 shows the epigastric layer, and 16 shows the void. Patent Applicant: Fujitsu Ltd. Kinsha, Successor: Benshio 1) Yoshiyoshi Saka, Figure 100, Figure 2

Claims (4)

【特許請求の範囲】[Claims] (1)静電記録装置に使用し、導電性支持体上に設は九
記鎌層にビ/電億との閾の放電にょル靜電潜像を形成し
死後普通紙に転写可能な静電記録媒体において、―紀記
鍮層が下層よル高抵抗層と、放電時間に関連する所定電
位に設定した抵抗層と。 さらにその上に放電によ)静電#像を形成する誘電体層
とを設は九ことを特徴とすゐ静電記録媒体。
(1) Used in an electrostatic recording device and forms a electrostatic latent image on a conductive support layer with a threshold voltage of V/electron, which can be transferred to plain paper after death. In the recording medium, the lower layer includes a high resistance layer and a resistance layer set at a predetermined potential related to the discharge time. An electrostatic recording medium further comprising a dielectric layer for forming an electrostatic image (by discharge) thereon.
(2)前記高抵抗層O体積抵抗率を101〜1g1lΩ
国とし九ことを特徴とする特許請求の範1811I&1
項記載の静電記録媒体。
(2) The volume resistivity of the high resistance layer O is 101 to 1g1lΩ
Claims 1811I&1 characterized by nine countries
Electrostatic recording medium described in Section 1.
(3)前記抵抗層の表面抵抗を106〜10@Q/口と
し九ことを特徴とする特許請求OIl囲第1項記載の静
電記録媒体。
(3) The electrostatic recording medium according to claim 1, wherein the resistance layer has a surface resistance of 10@6 to 10@Q/mouth.
(4) #配紙抗層の両端を前記導電性支持体に直接接
続したことを特徴とする特許請求の範!I菖1項Ik2
戚O静電紀鍮織体。 (句前記高抵抗層の容量を50PF/−以下とすゐこと
を特徴とする特許請求の範囲第1項記載の静電記録媒体
(4) # Claims characterized in that both ends of the paper distribution layer are directly connected to the conductive support! Iris 1 section Ik2
QiO electrostatic brass fabric. (The electrostatic recording medium according to claim 1, wherein the capacitance of the high resistance layer is 50 PF/- or less.
JP20207381A 1981-12-15 1981-12-15 Electrostatic recording medium Pending JPS58102945A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20207381A JPS58102945A (en) 1981-12-15 1981-12-15 Electrostatic recording medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20207381A JPS58102945A (en) 1981-12-15 1981-12-15 Electrostatic recording medium

Publications (1)

Publication Number Publication Date
JPS58102945A true JPS58102945A (en) 1983-06-18

Family

ID=16451496

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20207381A Pending JPS58102945A (en) 1981-12-15 1981-12-15 Electrostatic recording medium

Country Status (1)

Country Link
JP (1) JPS58102945A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0282251A (en) * 1988-09-20 1990-03-22 Canon Inc Recording display device
JPH0282250A (en) * 1988-09-20 1990-03-22 Canon Inc Recording display device
EP0360571A2 (en) * 1988-09-20 1990-03-28 Canon Kabushiki Kaisha Image holding member and image forming device using the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0282251A (en) * 1988-09-20 1990-03-22 Canon Inc Recording display device
JPH0282250A (en) * 1988-09-20 1990-03-22 Canon Inc Recording display device
EP0360571A2 (en) * 1988-09-20 1990-03-28 Canon Kabushiki Kaisha Image holding member and image forming device using the same

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