JPS58101259U - Electronic equipment with schedule notification function - Google Patents
Electronic equipment with schedule notification functionInfo
- Publication number
- JPS58101259U JPS58101259U JP1981193919U JP19391981U JPS58101259U JP S58101259 U JPS58101259 U JP S58101259U JP 1981193919 U JP1981193919 U JP 1981193919U JP 19391981 U JP19391981 U JP 19391981U JP S58101259 U JPS58101259 U JP S58101259U
- Authority
- JP
- Japan
- Prior art keywords
- data
- date
- schedule
- notification function
- time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Calculators And Similar Devices (AREA)
- Electric Clocks (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図はこの考案の一実施例を示す概略システム構成図
、第2図は同実施例のCPUの詳細な回路図構成図、第
3図は同実施例のRAMの部分フォーマット、第4図は
同実施例のスケジュールメモリのフォーマット、第5図
は同実施例の動作を説明するためのフローチャート、第
6図は第5図のフローに従って印字された記録紙の印字
状態図、第7図は前記実施例の第1の変更例の動作を説
明するための部分フローチャート、第8図は第7図のフ
ローに従って印字された記録紙の印字状態図、第9図は
前記実施例の第2の変更例の動作を説明するための部分
フローチャートである。
1・・−CPU、 3・・・スケジュールメモリ、7・
・・入力部、7a・・・スケジュールキー、9・・・印
字部、13・・・RAM、14・・・演算回路。
NLノp慰L−1−!
■弘−」Fig. 1 is a schematic system configuration diagram showing an embodiment of this invention, Fig. 2 is a detailed circuit diagram of the CPU of the embodiment, Fig. 3 is a partial format of the RAM of the embodiment, and Fig. 4 5 is a flowchart for explaining the operation of the same embodiment, FIG. 6 is a diagram showing the printing state of the recording paper printed according to the flow of FIG. 5, and FIG. FIG. 8 is a partial flowchart for explaining the operation of the first modified example of the embodiment, FIG. 8 is a diagram showing the printing state of recording paper printed according to the flow of FIG. 7, and FIG. It is a partial flowchart for explaining the operation|movement of the example of a change. 1...-CPU, 3... Schedule memory, 7...
...Input section, 7a...Schedule key, 9...Printing section, 13...RAM, 14...Arithmetic circuit. NL nop consolation L-1-! ■Hiroshi-”
Claims (1)
タからなる一連のスケジュールデータを複数記憶するス
ケジュールデータ記憶手段と、所定の期待を示す期間デ
ータを入力する入力手段と、所定キーの操作時に前記ス
ケジュールデータを順次読み出す読出手段と、この読出
手段によって読み出された前記スケジュールデータ記憶
手段内の日時データが前記入力された期間データに含ま
れるか書かを判別する判別手段と、この判別手段により
前記期間データに含まれると判別された日時データ及び
その日時データに対応するスケジュールデータを印字す
る印字手段とを備えてなるスケジュール報知機能を有す
る電子機器。schedule data storage means for storing a plurality of series of schedule data consisting of date and time data indicating a date or time and message data; input means for inputting period data indicating predetermined expectations; a reading means for reading data; a determining means for determining whether the date and time data in the schedule data storage means read by the reading means is included in the input period data; An electronic device having a schedule notification function, comprising date and time data that is determined to be scheduled, and a printing unit that prints schedule data corresponding to the date and time data.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1981193919U JPS58101259U (en) | 1981-12-26 | 1981-12-26 | Electronic equipment with schedule notification function |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1981193919U JPS58101259U (en) | 1981-12-26 | 1981-12-26 | Electronic equipment with schedule notification function |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58101259U true JPS58101259U (en) | 1983-07-09 |
JPS6239466Y2 JPS6239466Y2 (en) | 1987-10-08 |
Family
ID=30107254
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1981193919U Granted JPS58101259U (en) | 1981-12-26 | 1981-12-26 | Electronic equipment with schedule notification function |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58101259U (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55103742A (en) * | 1979-01-31 | 1980-08-08 | Mitsubishi Electric Corp | Fabrication of electrode of semiconductor element |
JPS5677784A (en) * | 1979-11-29 | 1981-06-26 | Canon Inc | Time memory device |
JPS5689784A (en) * | 1979-12-21 | 1981-07-21 | Tokyo Electric Co Ltd | Schedule control unit |
-
1981
- 1981-12-26 JP JP1981193919U patent/JPS58101259U/en active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55103742A (en) * | 1979-01-31 | 1980-08-08 | Mitsubishi Electric Corp | Fabrication of electrode of semiconductor element |
JPS5677784A (en) * | 1979-11-29 | 1981-06-26 | Canon Inc | Time memory device |
JPS5689784A (en) * | 1979-12-21 | 1981-07-21 | Tokyo Electric Co Ltd | Schedule control unit |
Also Published As
Publication number | Publication date |
---|---|
JPS6239466Y2 (en) | 1987-10-08 |
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