JPS5793578A - Mos memory cell and method of producing same - Google Patents
Mos memory cell and method of producing sameInfo
- Publication number
- JPS5793578A JPS5793578A JP56162889A JP16288981A JPS5793578A JP S5793578 A JPS5793578 A JP S5793578A JP 56162889 A JP56162889 A JP 56162889A JP 16288981 A JP16288981 A JP 16288981A JP S5793578 A JPS5793578 A JP S5793578A
- Authority
- JP
- Japan
- Prior art keywords
- memory cell
- producing same
- mos memory
- mos
- producing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
- H01L29/7884—Programmable transistors with only two possible levels of programmation charging by hot carrier injection
- H01L29/7885—Hot carrier injection from the channel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/196,838 US4412310A (en) | 1980-10-14 | 1980-10-14 | EPROM Cell with reduced programming voltage and method of fabrication |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5793578A true JPS5793578A (en) | 1982-06-10 |
Family
ID=22726978
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56162889A Pending JPS5793578A (en) | 1980-10-14 | 1981-10-14 | Mos memory cell and method of producing same |
Country Status (4)
Country | Link |
---|---|
US (1) | US4412310A (en) |
JP (1) | JPS5793578A (en) |
DE (1) | DE3139846A1 (en) |
GB (1) | GB2085226B (en) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57157573A (en) * | 1981-03-25 | 1982-09-29 | Fujitsu Ltd | Semiconductor non-volatile memory cell |
DE3316096A1 (en) * | 1983-05-03 | 1984-11-08 | Siemens AG, 1000 Berlin und 8000 München | METHOD FOR PRODUCING STORAGE CELLS WITH A FLOATING GATE MOS FIELD EFFECT TRANSISTOR |
US4494301A (en) * | 1983-09-01 | 1985-01-22 | Rca Corporation | Method of making semiconductor device with multi-levels of polycrystalline silicon conductors |
JPS60234372A (en) * | 1984-05-07 | 1985-11-21 | Toshiba Corp | Manufacture of semiconductor device |
EP0160965B1 (en) * | 1984-05-07 | 1990-01-31 | Kabushiki Kaisha Toshiba | Method of manufacturing a semiconductor device with a stacked-gate-electrode structure |
FR2600810A1 (en) * | 1986-06-27 | 1987-12-31 | Eurotechnique Sa | METHOD FOR PROGRAMMING DATA IN AN ELECTRICALLY PROGRAMMABLE DEAD MEMORY |
KR920013709A (en) * | 1990-12-21 | 1992-07-29 | 김광호 | Nonvolatile semiconductor memory device and manufacturing method thereof |
US5247477A (en) * | 1991-05-31 | 1993-09-21 | Altera Corporation | Method of programming floating gate memory devices aided by potential applied to read channel |
US5198381A (en) * | 1991-09-12 | 1993-03-30 | Vlsi Technology, Inc. | Method of making an E2 PROM cell with improved tunneling properties having two implant stages |
US5541876A (en) * | 1994-06-01 | 1996-07-30 | United Microelectronics Corporation | Memory cell fabricated by floating gate structure |
US5627091A (en) * | 1994-06-01 | 1997-05-06 | United Microelectronics Corporation | Mask ROM process for making a ROM with a trench shaped channel |
JP2929944B2 (en) * | 1994-09-09 | 1999-08-03 | 株式会社デンソー | Method for manufacturing semiconductor device |
US5706227A (en) * | 1995-12-07 | 1998-01-06 | Programmable Microelectronics Corporation | Double poly split gate PMOS flash memory cell |
KR100252253B1 (en) * | 1997-01-04 | 2000-05-01 | 윤종용 | An electrically erasable programmble rom |
US7030038B1 (en) * | 1997-07-31 | 2006-04-18 | Texas Instruments Incorporated | Low temperature method for forming a thin, uniform oxide |
KR100846392B1 (en) * | 2006-08-31 | 2008-07-15 | 주식회사 하이닉스반도체 | Semiconductor memory device |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4004159A (en) * | 1973-05-18 | 1977-01-18 | Sanyo Electric Co., Ltd. | Electrically reprogrammable nonvolatile floating gate semi-conductor memory device and method of operation |
US4016588A (en) * | 1974-12-27 | 1977-04-05 | Nippon Electric Company, Ltd. | Non-volatile semiconductor memory device |
US4203158A (en) * | 1978-02-24 | 1980-05-13 | Intel Corporation | Electrically programmable and erasable MOS floating gate memory device employing tunneling and method of fabricating same |
US4180826A (en) * | 1978-05-19 | 1979-12-25 | Intel Corporation | MOS double polysilicon read-only memory and cell |
JPS55113359A (en) * | 1979-02-22 | 1980-09-01 | Fujitsu Ltd | Semiconductor integrated circuit device |
-
1980
- 1980-10-14 US US06/196,838 patent/US4412310A/en not_active Expired - Lifetime
-
1981
- 1981-09-07 GB GB8126961A patent/GB2085226B/en not_active Expired
- 1981-10-07 DE DE19813139846 patent/DE3139846A1/en active Granted
- 1981-10-14 JP JP56162889A patent/JPS5793578A/en active Pending
Also Published As
Publication number | Publication date |
---|---|
DE3139846A1 (en) | 1982-06-16 |
DE3139846C2 (en) | 1990-04-26 |
US4412310A (en) | 1983-10-25 |
GB2085226B (en) | 1985-08-21 |
GB2085226A (en) | 1982-04-21 |
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